Doc fixes and SPI block mode support
- Various smaller fixes for documentation - Added support for SPI blockmode
This commit is contained in:
@ -55,7 +55,7 @@
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//! `Error = core::convert::Infallible`, the value-level API can return a real
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//! error. If the [`DynPin`] is not in the correct [`DynPinMode`] for the
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//! operation, the trait functions will return
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//! [`InvalidPinType`](Error::InvalidPinType).
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//! [`InvalidPinType`](PinError::InvalidPinType).
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use super::pins::{
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common_reg_if_functions, FilterType, InterruptEdge, InterruptLevel, Pin, PinError, PinId,
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@ -3,8 +3,8 @@
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//! The implementation of this GPIO module is heavily based on the
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//! [ATSAMD HAL implementation](https://docs.rs/atsamd-hal/0.13.0/atsamd_hal/gpio/v2/index.html).
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//!
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//! This API provides two different submodules, [`pins`] and [`dynpins`],
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//! representing two different ways to handle GPIO pins. The default, [`pins`],
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//! This API provides two different submodules, [`mod@pins`] and [`dynpins`],
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//! representing two different ways to handle GPIO pins. The default, [`mod@pins`],
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//! is a type-level API that tracks the state of each pin at compile-time. The
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//! alternative, [`dynpins`] is a type-erased, value-level API that tracks the
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//! state of each pin at run-time.
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@ -26,16 +26,17 @@
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//! }
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//! ```
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//!
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//! A `PinId` identifies a pin by it's group (A, B) and pin number. Each
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//! `PinId` instance is named according to its datasheet identifier, e.g.
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//! [`PA02`].
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//! A [`PinId`] identifies a pin by it's group (A, B) and pin number. Each
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//! [`PinId`] instance is named according to its datasheet identifier, e.g.
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//! PA02.
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//!
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//! A `PinMode` represents the various pin modes. The available `PinMode`
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//! variants are [`Input`], [`Output`] and [`Alternate`], each with its own corresponding
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//! configurations.
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//!
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//! It is not possible for users to create new instances of a [`Pin`]. Singleton
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//! instances of each pin are made available to users through the [`Pins`]
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//! instances of each pin are made available to users through the [`PinsA`] and
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//! [`PinsB`]
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//! struct.
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//!
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//! To create the [`PinsA`] or [`PinsB`] struct, users must supply the PAC
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@ -84,7 +85,8 @@
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//! This module also provides additional, type-level tools to work with GPIO
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//! pins.
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//!
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//! The [`AnyPin`] trait defines an [`AnyKind`] type class
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//! The [`AnyPin`] trait defines an
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//! [`AnyKind`](https://docs.rs/atsamd-hal/0.13.0/atsamd_hal/typelevel/index.html) type class
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//! for all `Pin` types.
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use super::dynpins::{DynAlternate, DynGroup, DynInput, DynOutput, DynPinId, DynPinMode};
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@ -229,7 +231,8 @@ impl OutputConfig for ReadableOpenDrain {
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/// Type-level variant of [`PinMode`] for output modes
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///
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/// Type `C` is one of two output configurations: [`PushPull`] or [`Readable`]
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/// Type `C` is one of four output configurations: [`PushPull`], [`OpenDrain`] or
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/// their respective readable versions
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pub struct Output<C: OutputConfig> {
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cfg: PhantomData<C>,
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}
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@ -543,7 +546,8 @@ pub type SpecificPin<P> = Pin<<P as AnyPin>::Id, <P as AnyPin>::Mode>;
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/// Type class for [`Pin`] types
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///
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/// This trait uses the [`AnyKind`] trait pattern to create a [type class] for
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/// This trait uses the [`AnyKind`](https://docs.rs/atsamd-hal/0.13.0/atsamd_hal/typelevel/index.html)
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/// trait pattern to create a [type class] for
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/// [`Pin`] types. See the `AnyKind` documentation for more details on the
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/// pattern.
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pub trait AnyPin: Is<Type = SpecificPin<Self>> {
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99
src/spi.rs
99
src/spi.rs
@ -1,4 +1,8 @@
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//! API for the SPI peripheral
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//!
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//! ## Examples
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//!
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//! - [Blocking SPI example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/spi.rs)
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use crate::Sealed;
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use crate::{
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clock::{enable_peripheral_clock, PeripheralClocks},
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@ -181,6 +185,8 @@ pub trait GenericTransferConfig {
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fn frequency(&mut self, spi_clk: Hertz);
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}
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/// This struct contains all configuration parameter which are transfer specific
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/// and might change for transfers to different SPI slaves
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#[derive(Copy, Clone)]
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pub struct TransferConfig<HWCS> {
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pub spi_clk: Hertz,
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@ -189,9 +195,30 @@ pub struct TransferConfig<HWCS> {
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/// false
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pub hw_cs: Option<HWCS>,
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pub sod: bool,
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/// If this is enabled, all data in the FIFO is transmitted in a single frame unless
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/// the BMSTOP bit is set on a dataword. A frame is defined as CSn being active for the
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/// duration of multiple data words
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pub blockmode: bool,
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}
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impl<HWCS> TransferConfig<HWCS> {
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pub fn new(
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spi_clk: Hertz,
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mode: Mode,
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hw_cs: Option<HWCS>,
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blockmode: bool,
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sod: bool,
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) -> Self {
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TransferConfig {
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spi_clk,
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mode,
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hw_cs,
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sod,
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blockmode,
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}
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}
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}
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impl<HWCS> GenericTransferConfig for TransferConfig<HWCS> {
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/// Slave Output Disable
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fn sod(&mut self, sod: bool) {
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@ -211,32 +238,6 @@ impl<HWCS> GenericTransferConfig for TransferConfig<HWCS> {
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}
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}
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/// Configuration options for a single transfer. These can be used to reconfigure the SPI bus
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/// for transaction to different devices
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impl<HWCS: OptionalHwCs<SPIA>> TransferConfig<HWCS> {
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pub fn cfg_spia(spi_clk: Hertz, mode: Mode, hw_cs: Option<HWCS>) -> Self {
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TransferConfig {
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spi_clk,
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mode,
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hw_cs,
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sod: false,
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blockmode: false,
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}
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}
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}
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impl<HWCS: OptionalHwCs<SPIB>> TransferConfig<HWCS> {
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pub fn cfg_spib(spi_clk: Hertz, mode: Mode, hw_cs: Option<HWCS>) -> Self {
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TransferConfig {
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spi_clk,
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mode,
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hw_cs,
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sod: false,
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blockmode: false,
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}
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}
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}
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#[derive(Default)]
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/// Configuration options for the whole SPI bus. See Programmer Guide p.92 for more details
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pub struct SpiConfig {
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@ -301,6 +302,7 @@ pub struct SpiBase<SPI, Word = u8> {
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spi: SPI,
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cfg: SpiConfig,
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sys_clk: Hertz,
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blockmode: bool,
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_word: PhantomData<Word>,
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}
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pub struct Spi<SPI, PINS, Word = u8> {
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@ -330,7 +332,8 @@ macro_rules! spi {
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/// )
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/// ```
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///
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/// in the function call
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/// in the function call. You can delete the pin type information by calling
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/// the [`downgrade`](Self::downgrade) function
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///
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/// ## Arguments
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/// * `transfer_cfg` - Transfer configuration which includes configuration
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@ -359,12 +362,14 @@ macro_rules! spi {
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let mut mode = MODE_0;
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let mut clk_prescale = 0x02;
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let mut ss = 0;
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let mut init_blockmode = false;
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if let Some(transfer_cfg) = transfer_cfg {
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mode = transfer_cfg.mode;
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clk_prescale = sys_clk.0 / (transfer_cfg.spi_clk.0 * (scrdv as u32 + 1));
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if transfer_cfg.hw_cs.is_some() {
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ss = HwCs::CS_ID as u8;
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}
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init_blockmode = transfer_cfg.blockmode;
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}
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let (cpo_bit, cph_bit) = match mode {
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@ -404,6 +409,7 @@ macro_rules! spi {
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spi,
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cfg: spi_cfg,
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sys_clk,
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blockmode: init_blockmode,
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_word: PhantomData,
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},
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pins,
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@ -470,6 +476,7 @@ macro_rules! spi {
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pub fn cfg_transfer<HwCs: OptionalHwCs<$SPIX>>(&mut self, transfer_cfg: &TransferConfig<HwCs>) {
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self.cfg_clock(transfer_cfg.spi_clk);
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self.cfg_mode(transfer_cfg.mode);
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self.blockmode = transfer_cfg.blockmode;
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self.spi.ctrl1.modify(|_, w| {
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if transfer_cfg.sod {
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w.sod().set_bit();
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@ -491,7 +498,7 @@ macro_rules! spi {
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}
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}
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// Changing the word size also requires a type conversion
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/// Changing the word size also requires a type conversion
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impl <Sck: PinSck<$SPIX>, Miso: PinMiso<$SPIX>, Mosi: PinMosi<$SPIX>>
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From<Spi<$SPIX, (Sck, Miso, Mosi), u8>> for Spi<$SPIX, (Sck, Miso, Mosi), u16>
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{
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@ -507,6 +514,7 @@ macro_rules! spi {
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spi_base: SpiBase {
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spi: old_spi.spi_base.spi,
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cfg: old_spi.spi_base.cfg,
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blockmode: old_spi.spi_base.blockmode,
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sys_clk: old_spi.spi_base.sys_clk,
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_word: PhantomData,
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},
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@ -515,7 +523,7 @@ macro_rules! spi {
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}
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}
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// Changing the word size also requires a type conversion
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/// Changing the word size also requires a type conversion
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impl <Sck: PinSck<$SPIX>, Miso: PinMiso<$SPIX>, Mosi: PinMosi<$SPIX>>
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From<Spi<$SPIX, (Sck, Miso, Mosi), u16>> for
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Spi<$SPIX, (Sck, Miso, Mosi), u8>
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@ -532,6 +540,7 @@ macro_rules! spi {
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spi_base: SpiBase {
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spi: old_spi.spi_base.spi,
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cfg: old_spi.spi_base.cfg,
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blockmode: old_spi.spi_base.blockmode,
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sys_clk: old_spi.spi_base.sys_clk,
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_word: PhantomData,
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},
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@ -546,15 +555,6 @@ macro_rules! spi {
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{
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type Error = Infallible;
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/// Read a word from the slave. Must be preceeded by a [`send`] call
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#[inline(always)]
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fn read(&mut self) -> nb::Result<$WORD, Self::Error> {
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if self.spi.status.read().rne().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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}
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Ok((self.spi.data.read().bits() & 0xffff) as $WORD)
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}
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/// Sends a word to the slave
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#[inline(always)]
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fn send(&mut self, word: $WORD) -> nb::Result<(), Self::Error> {
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@ -564,6 +564,15 @@ macro_rules! spi {
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self.spi.data.write(|w| unsafe { w.bits(word as u32) });
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Ok(())
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}
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/// Read a word from the slave. Must be preceeded by a [`send`](Self::send) call
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#[inline(always)]
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fn read(&mut self) -> nb::Result<$WORD, Self::Error> {
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if self.spi.status.read().rne().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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}
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Ok((self.spi.data.read().bits() & 0xffff) as $WORD)
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}
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}
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impl<Sck: PinSck<$SPIX>, Miso: PinMiso<$SPIX>, Mosi: PinMosi<$SPIX>>
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@ -592,15 +601,25 @@ macro_rules! spi {
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write_words: &'w [$WORD],
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read_words: Option<&'w mut [$WORD]>,
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) -> Result<(), Infallible> {
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// FIFO has a depth of 16. Only fill the first half for now
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const FIFO_WORDS: usize = 8;
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// FIFO has a depth of 16.
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const FIFO_WORDS: usize = 12;
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if self.blockmode {
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self.spi.ctrl1.modify(|_, w| {
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w.mtxpause().set_bit()
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})
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}
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// Fill the first half of the write FIFO
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let len = write_words.len();
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let mut write = write_words.iter();
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for _ in 0..core::cmp::min(FIFO_WORDS, len) {
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nb::block!(self.send(*write.next().unwrap())).ok().unwrap();
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}
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if self.blockmode {
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self.spi.ctrl1.modify(|_, w| {
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w.mtxpause().clear_bit()
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})
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}
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if let Some(read) = read_words {
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let mut read = read.iter_mut();
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@ -12,8 +12,8 @@ impl Sealed for NoneT {}
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/// Marker trait for type identity
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///
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/// This trait is used as part of the [`AnyKind`] trait pattern. It represents
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/// the concept of type identity, because all implementors have
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/// This trait is used as part of the [`AnyKind`](https://docs.rs/atsamd-hal/0.13.0/atsamd_hal/typelevel/index.html)
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/// trait pattern. It represents the concept of type identity, because all implementors have
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/// `<Self as Is>::Type == Self`. When used as a trait bound with a specific
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/// type, it guarantees that the corresponding type parameter is exactly the
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/// specific type. Stated differently, it guarantees that `T == Specific` in
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