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f376a43f41
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Major refactoring
Rust/va108xx-hal/pipeline/head There was a failure building this commit
- Improved IRQ handling, which makes most unsafe unmask operations
in user code absolete
- Add first UART RX handlers which use an IRQ
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2021-12-19 14:18:10 +01:00 |
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fb158caf6e
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HAL update
Rust/va108xx-hal/pipeline/head This commit looks good
Rust/va108xx-hal/pipeline/pr-main This commit looks good
- SPI: Clear TX and RX FIFO for transfers
- Added `port_mux` function to manually select function for pins
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2021-12-12 14:21:49 +01:00 |
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779d5a94ec
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Timer API now macroless
- Separation of TIM reg and TIM pin IF
- Improvements of API
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2021-12-05 23:00:28 +01:00 |
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554b9c8550
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Added EDAC API
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2021-12-04 22:00:45 +01:00 |
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