7 Commits

Author SHA1 Message Date
3fc8ce519a Merge pull request 'SPI Bugfix' (#3) from mueller/spi-bugfix into main
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Reviewed-on: #3
2021-12-11 17:53:11 +01:00
2ad405d325 update changelog, bump to v0.4.1
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2021-12-11 17:46:05 +01:00
063a7a56e5 init blockmode was not set 2021-12-11 17:45:06 +01:00
1db363fe1a Merge pull request 'Replaced Hertz by impl Into<Hertz> completely' (#2) from mueller/impl-into-hertz into main
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Reviewed-on: #2
2021-12-09 23:28:58 +01:00
659b7e8f27 Replaced Hertz by impl Into<Hertz> completely
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2021-12-09 23:19:21 +01:00
5f6914a93a update changelog and some more links
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2021-12-06 16:04:55 +01:00
2de11478fb updated all example links 2021-12-06 16:02:51 +01:00
11 changed files with 44 additions and 29 deletions

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@ -8,6 +8,23 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
## [unreleased]
## [v0.4.1]
### Fixed
- Initial blockmode setting was not set in SPI constructor
## [v0.4.0]
### Changed
- Replaced `Hertz` by `impl Into<Hertz>` completely and removed
`+ Copy` where not necessary
## [v0.3.1]
- Updated all links to point to new repository
## [v0.3.0]
### Added

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@ -1,6 +1,6 @@
[package]
name = "va108xx-hal"
version = "0.3.0"
version = "0.4.1"
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
edition = "2021"
description = "HAL for the Vorago VA108xx family of microcontrollers"

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@ -59,7 +59,7 @@ your custom board.
The hello world of embedded development is usually to blinky a LED. This example
is contained within the
[examples folder](https://github.com/robamu-org/va108xx-hal-rs/tree/main/examples/blinky.rs).
[examples folder](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/blinky.rs).
1. Set up your Rust cross-compiler if you have not done so yet. See more in the [build chapter](#Building)
2. Create a new binary crate with `cargo init`
@ -85,4 +85,4 @@ is contained within the
7. Flashing the board might work differently for different boards and there is usually
more than one way. You can find example instructions for the REB1 development board
[here](https://github.com/robamu/vorago-reb1-rs).
[here](https://github.com/robamu-org/vorago-reb1-rs).

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@ -114,12 +114,8 @@ fn main() -> ! {
match SPI_BUS_SEL {
SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
if let Some(ref mut spi) = *spia_ref.borrow_mut() {
let transfer_cfg = TransferConfig::new_no_hw_cs(
SPI_SPEED_KHZ.khz().into(),
SPI_MODE,
BLOCKMODE,
false,
);
let transfer_cfg =
TransferConfig::new_no_hw_cs(SPI_SPEED_KHZ.khz(), SPI_MODE, BLOCKMODE, false);
spi.cfg_transfer(&transfer_cfg);
}
}
@ -127,7 +123,7 @@ fn main() -> ! {
if let Some(ref mut spi) = *spib_ref.borrow_mut() {
let hw_cs_pin = pinsb.pb2.into_funsel_1();
let transfer_cfg = TransferConfig::new(
SPI_SPEED_KHZ.khz().into(),
SPI_SPEED_KHZ.khz(),
SPI_MODE,
Some(hw_cs_pin),
BLOCKMODE,

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@ -25,7 +25,7 @@ fn main() -> ! {
(tx, rx),
115200.bps(),
&mut dp.SYSCONFIG,
50.mhz().into(),
50.mhz(),
);
let (mut tx, mut rx) = uartb.split();
writeln!(tx, "Hello World\r").unwrap();

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@ -20,7 +20,7 @@
//!
//! ## Examples
//!
//! - [Blinky example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/blinky.rs)
//! - [Blinky example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/blinky.rs)
pub mod dynpins;
pub use dynpins::*;

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@ -231,7 +231,7 @@ macro_rules! i2c_base {
impl I2cBase<$I2CX> {
pub fn $i2cx(
i2c: $I2CX,
sys_clk: impl Into<Hertz> + Copy,
sys_clk: impl Into<Hertz>,
speed_mode: I2cSpeed,
ms_cfg: Option<&MasterConfig>,
sl_cfg: Option<&SlaveConfig>,
@ -740,7 +740,7 @@ macro_rules! i2c_slave {
fn $i2cx_slave(
i2c: $I2CX,
cfg: SlaveConfig,
sys_clk: impl Into<Hertz> + Copy,
sys_clk: impl Into<Hertz>,
speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>,
) -> Self {
@ -897,7 +897,7 @@ macro_rules! i2c_slave {
pub fn i2ca(
i2c: $I2CX,
cfg: SlaveConfig,
sys_clk: impl Into<Hertz> + Copy,
sys_clk: impl Into<Hertz>,
speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>,
) -> Result<Self, Error> {
@ -912,7 +912,7 @@ macro_rules! i2c_slave {
pub fn $i2cx(
i2c: $I2CX,
cfg: SlaveConfig,
sys_clk: impl Into<Hertz> + Copy,
sys_clk: impl Into<Hertz>,
speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>,
) -> Self {

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@ -4,7 +4,7 @@
//!
//! ## Examples
//!
//! - [PWM example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/pwm.rs)
//! - [PWM example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/pwm.rs)
use core::marker::PhantomData;
use crate::{clock::enable_peripheral_clock, gpio::DynPinId};

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@ -2,7 +2,7 @@
//!
//! ## Examples
//!
//! - [Blocking SPI example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/spi.rs)
//! - [Blocking SPI example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/spi.rs)
use crate::Sealed;
use crate::{
clock::{enable_peripheral_clock, PeripheralClocks},
@ -218,9 +218,9 @@ pub struct ReducedTransferConfig {
}
impl TransferConfig<NoneT> {
pub fn new_no_hw_cs(spi_clk: Hertz, mode: Mode, blockmode: bool, sod: bool) -> Self {
pub fn new_no_hw_cs(spi_clk: impl Into<Hertz>, mode: Mode, blockmode: bool, sod: bool) -> Self {
TransferConfig {
spi_clk,
spi_clk: spi_clk.into(),
mode,
hw_cs: None,
sod,
@ -231,14 +231,14 @@ impl TransferConfig<NoneT> {
impl<HWCS: HwCs> TransferConfig<HWCS> {
pub fn new(
spi_clk: Hertz,
spi_clk: impl Into<Hertz>,
mode: Mode,
hw_cs: Option<HWCS>,
blockmode: bool,
sod: bool,
) -> Self {
TransferConfig {
spi_clk,
spi_clk: spi_clk.into(),
mode,
hw_cs,
sod,
@ -428,6 +428,7 @@ macro_rules! spi {
w.sod().bit(sod);
w.ms().bit(ms);
w.mdlycap().bit(mdlycap);
w.blockmode().bit(init_blockmode);
unsafe { w.ss().bits(ss) }
});
@ -452,7 +453,7 @@ macro_rules! spi {
}
#[inline]
pub fn cfg_clock(&mut self, spi_clk: Hertz) {
pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) {
self.spi_base.cfg_clock(spi_clk);
}
@ -482,8 +483,8 @@ macro_rules! spi {
impl<WORD: Word> SpiBase<$SPIX, WORD> {
#[inline]
pub fn cfg_clock(&mut self, spi_clk: Hertz) {
let clk_prescale = self.sys_clk.0 / (spi_clk.0 * (self.cfg.scrdv as u32 + 1));
pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) {
let clk_prescale = self.sys_clk.0 / (spi_clk.into().0 * (self.cfg.scrdv as u32 + 1));
self.spi
.clkprescale
.write(|w| unsafe { w.bits(clk_prescale) });

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@ -2,7 +2,8 @@
//!
//! ## Examples
//!
//! - [MS and second tick implementation](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/timer-ticks.rs)
//! - [MS and second tick implementation](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/timer-ticks.rs)
//! - [Cascade feature example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/cascade.rs)
use crate::{
clock::{enable_peripheral_clock, PeripheralClocks},
gpio::{

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@ -2,7 +2,7 @@
//!
//! ## Examples
//!
//! - [UART example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/uart.rs)
//! - [UART example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/uart.rs)
use core::{convert::Infallible, ptr};
use core::{marker::PhantomData, ops::Deref};
use libm::floorf;
@ -306,12 +306,12 @@ macro_rules! uart_impl {
pins: PINS,
config: impl Into<Config>,
syscfg: &mut SYSCONFIG,
sys_clk: Hertz
sys_clk: impl Into<Hertz>
) -> Self
{
enable_peripheral_clock(syscfg, $clk_enb_enum);
Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init(
config.into(), sys_clk
config.into(), sys_clk.into()
)
}
}