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@ -158,9 +158,9 @@ where
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{
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/// Create a new stronlgy typed PWM pin
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pub fn new(
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vtp: (Pin, Tim),
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sys_clk: impl Into<Hertz> + Copy,
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sys_cfg: &mut pac::Sysconfig,
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sys_clk: impl Into<Hertz> + Copy,
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tim_and_pin: (Pin, Tim),
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initial_period: impl Into<Hertz> + Copy,
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) -> Self {
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let mut pin = PwmPin {
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@ -171,7 +171,7 @@ where
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current_rst_val: 0,
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sys_clk: sys_clk.into(),
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},
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reg: unsafe { TimAndPinRegister::new(vtp.0, vtp.1) },
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reg: unsafe { TimAndPinRegister::new(tim_and_pin.0, tim_and_pin.1) },
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mode: PhantomData,
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};
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enable_peripheral_clock(sys_cfg, crate::clock::PeripheralClocks::Gpio);
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@ -225,12 +225,13 @@ where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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pub fn pwma(
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vtp: (Pin, Tim),
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sys_clk: impl Into<Hertz> + Copy,
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sys_cfg: &mut pac::Sysconfig,
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sys_clk: impl Into<Hertz> + Copy,
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pin_and_tim: (Pin, Tim),
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initial_period: impl Into<Hertz> + Copy,
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) -> Self {
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let mut pin: PwmPin<Pin, Tim, PwmA> = Self::new(vtp, sys_clk, sys_cfg, initial_period);
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let mut pin: PwmPin<Pin, Tim, PwmA> =
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Self::new(sys_cfg, sys_clk, pin_and_tim, initial_period);
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pin.enable_pwm_a();
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pin
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}
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@ -241,12 +242,13 @@ where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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pub fn pwmb(
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vtp: (Pin, Tim),
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sys_clk: impl Into<Hertz> + Copy,
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sys_cfg: &mut pac::Sysconfig,
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sys_clk: impl Into<Hertz> + Copy,
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pin_and_tim: (Pin, Tim),
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initial_period: impl Into<Hertz> + Copy,
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) -> Self {
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let mut pin: PwmPin<Pin, Tim, PwmB> = Self::new(vtp, sys_clk, sys_cfg, initial_period);
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let mut pin: PwmPin<Pin, Tim, PwmB> =
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Self::new(sys_cfg, sys_clk, pin_and_tim, initial_period);
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pin.enable_pwm_b();
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pin
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}
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