some more defmt updates

This commit is contained in:
Robin Müller 2025-04-16 17:14:35 +02:00
parent acb652e940
commit 5f88f094ca
Signed by: muellerr
GPG Key ID: A649FB78196E3849
20 changed files with 310 additions and 310 deletions

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@ -8,8 +8,9 @@ cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
cortex-m-rt = "0.7"
embedded-hal = "1"
embedded-io = "0.6"
rtt-target = "0.6"
panic-rtt-target = "0.2"
defmt-rtt = "0.4"
defmt = "1"
panic-probe = { version = "1", features = ["defmt"] }
# Even though we do not use this directly, we need to activate this feature explicitely
# so that RTIC compiles because thumv6 does not have CAS operations natively.

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@ -4,9 +4,11 @@
#[rtic::app(device = pac)]
mod app {
use panic_rtt_target as _;
use rtic_example::SYSCLK_FREQ;
use rtt_target::{rprintln, rtt_init_default, set_print_channel};
// Import panic provider.
use panic_probe as _;
// Import global logger.
use defmt_rtt as _;
use va108xx_hal::{
clock::{set_clk_div_register, FilterClkSel},
gpio::{FilterType, InterruptEdge},
@ -19,19 +21,12 @@ mod app {
rtic_monotonics::systick_monotonic!(Mono, 1_000);
#[derive(Debug, PartialEq)]
#[derive(Debug, PartialEq, defmt::Format)]
pub enum PressMode {
Toggle,
Keep,
}
#[derive(Debug, PartialEq)]
pub enum CfgMode {
Prompt,
Fixed,
}
const CFG_MODE: CfgMode = CfgMode::Fixed;
// You can change the press mode here
const DEFAULT_MODE: PressMode = PressMode::Toggle;
@ -47,18 +42,11 @@ mod app {
#[init]
fn init(cx: init::Context) -> (Shared, Local) {
let channels = rtt_init_default!();
set_print_channel(channels.up.0);
rprintln!("-- Vorago Button IRQ Example --");
defmt::println!("-- Vorago Button IRQ Example --");
Mono::start(cx.core.SYST, SYSCLK_FREQ.raw());
let mode = match CFG_MODE {
// Ask mode from user via RTT
CfgMode::Prompt => prompt_mode(channels.down.0),
// Use mode hardcoded in `DEFAULT_MODE`
CfgMode::Fixed => DEFAULT_MODE,
};
rprintln!("Using {:?} mode", mode);
let mode = DEFAULT_MODE;
defmt::info!("Using {:?} mode", mode);
let mut dp = cx.device;
let pinsa = PinsA::new(dp.porta);
@ -107,21 +95,4 @@ mod app {
leds[0].on();
}
}
fn prompt_mode(mut down_channel: rtt_target::DownChannel) -> PressMode {
rprintln!("Using prompt mode");
rprintln!("Please enter the mode [0: Toggle, 1: Keep]");
let mut read_buf: [u8; 16] = [0; 16];
let mut read;
loop {
read = down_channel.read(&mut read_buf);
for &byte in &read_buf[..read] {
match byte as char {
'0' => return PressMode::Toggle,
'1' => return PressMode::Keep,
_ => continue, // Ignore other characters
}
}
}
}
}

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@ -4,8 +4,10 @@
#[rtic::app(device = pac)]
mod app {
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_default};
// Import panic provider.
use panic_probe as _;
// Import global logger.
use defmt_rtt as _;
use va108xx_hal::pac;
#[local]
@ -16,8 +18,7 @@ mod app {
#[init]
fn init(_ctx: init::Context) -> (Shared, Local) {
rtt_init_default!();
rprintln!("-- Vorago RTIC template --");
defmt::println!("-- Vorago RTIC template --");
(Shared {}, Local {})
}

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@ -1,4 +1,4 @@
//! More complex UART application
//! More complex UART application on UART PA8 (TX) and PA9 (RX).
//!
//! Uses the IRQ capabilities of the VA10820 peripheral and the RTIC framework to poll the UART in
//! a non-blocking way. All received data will be sent back to the sender.
@ -14,13 +14,19 @@ const RX_RING_BUF_SIZE: usize = 1024;
mod app {
use super::*;
use embedded_io::Write;
use panic_rtt_target as _;
use ringbuf::traits::{Consumer, Observer, Producer};
use rtic_example::SYSCLK_FREQ;
// Import panic provider.
use panic_probe as _;
// Import global logger.
use defmt_rtt as _;
use rtic_monotonics::Monotonic;
use rtt_target::{rprintln, rtt_init_print};
use va108xx_hal::{
pac, pins::PinsA, prelude::*, uart::{self, RxWithInterrupt, Tx}, InterruptConfig
pac,
pins::PinsA,
prelude::*,
uart::{self, RxWithInterrupt, Tx},
InterruptConfig,
};
#[local]
@ -38,8 +44,7 @@ mod app {
#[init]
fn init(cx: init::Context) -> (Shared, Local) {
rtt_init_print!();
rprintln!("-- VA108xx UART Echo with IRQ example application--");
defmt::println!("-- VA108xx UART Echo with IRQ example application--");
Mono::start(cx.core.SYST, SYSCLK_FREQ.raw());
@ -54,7 +59,8 @@ mod app {
(tx, rx),
115200.Hz().into(),
InterruptConfig::new(pac::Interrupt::OC3, true, true),
).unwrap();
)
.unwrap();
let (tx, rx) = irq_uart.split();
let mut rx = rx.into_rx_with_irq();
@ -99,7 +105,7 @@ mod app {
}
if ringbuf_full {
// Could also drop oldest data, but that would require the consumer to be shared.
rprintln!("buffer full, data was dropped");
defmt::println!("buffer full, data was dropped");
}
}

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@ -5,14 +5,17 @@
#[rtic::app(device = pac, dispatchers = [OC31, OC30, OC29])]
mod app {
use cortex_m::asm;
use panic_rtt_target as _;
use rtic_example::SYSCLK_FREQ;
use rtic_monotonics::systick::prelude::*;
use rtic_monotonics::Monotonic;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import global logger.
use defmt_rtt as _;
use va108xx_hal::{
gpio::{Output, PinState},
pac, pins::PinsA,
pac,
pins::PinsA,
};
#[local]
@ -29,8 +32,7 @@ mod app {
#[init]
fn init(cx: init::Context) -> (Shared, Local) {
rtt_init_print!();
rprintln!("-- Vorago VA108xx RTIC template --");
defmt::println!("-- Vorago VA108xx RTIC template --");
Mono::start(cx.core.SYST, SYSCLK_FREQ.raw());
@ -56,7 +58,7 @@ mod app {
)]
async fn blinky(cx: blinky::Context) {
loop {
rprintln!("toggling LEDs");
defmt::println!("toggling LEDs");
cx.local.led0.toggle();
cx.local.led1.toggle();
cx.local.led2.toggle();

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@ -7,13 +7,15 @@ edition = "2021"
cortex-m = {version = "0.7", features = ["critical-section-single-core"]}
cortex-m-rt = "0.7"
panic-halt = "1"
panic-rtt-target = "0.2"
critical-section = "1"
rtt-target = "0.6"
defmt-rtt = "0.4"
defmt = "1"
panic-probe = { version = "1", features = ["defmt"] }
embedded-hal = "1"
embedded-hal-nb = "1"
embedded-io = "0.6"
cortex-m-semihosting = "0.5.0"
portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }
[dependencies.va108xx-hal]
version = "0.11"

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@ -10,8 +10,10 @@ use core::cell::RefCell;
use cortex_m::interrupt::Mutex;
use cortex_m_rt::entry;
use embedded_hal::delay::DelayNs;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use va108xx_hal::{
pac::{self, interrupt},
prelude::*,
@ -23,15 +25,14 @@ static CSD_TGT_2: Mutex<RefCell<Option<CountdownTimer>>> = Mutex::new(RefCell::n
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx Cascade example application--");
defmt::println!("-- VA108xx Cascade example application--");
let dp = pac::Peripherals::take().unwrap();
let mut delay = CountdownTimer::new(50.MHz(), dp.tim0);
// Will be started periodically to trigger a cascade
let mut cascade_triggerer = CountdownTimer::new(50.MHz(), dp.tim3).auto_disable(true);
cascade_triggerer.enable_interupt(InterruptConfig::new(pac::Interrupt::OC1, true, false));
cascade_triggerer.enable_interrupt(InterruptConfig::new(pac::Interrupt::OC1, true, false));
cascade_triggerer.enable();
// First target for cascade
@ -49,7 +50,7 @@ fn main() -> ! {
// Normally it should already be sufficient to activate IRQ in the CTRL
// register but a full interrupt is use here to display print output when
// the timer expires
cascade_target_1.enable_interupt(InterruptConfig::new(pac::Interrupt::OC2, true, false));
cascade_target_1.enable_interrupt(InterruptConfig::new(pac::Interrupt::OC2, true, false));
// The counter will only activate when the cascade signal is coming in so
// it is okay to call start here to set the reset value
cascade_target_1.start(1.Hz());
@ -69,7 +70,7 @@ fn main() -> ! {
// Normally it should already be sufficient to activate IRQ in the CTRL
// register but a full interrupt is use here to display print output when
// the timer expires
cascade_target_2.enable_interupt(InterruptConfig::new(pac::Interrupt::OC3, true, false));
cascade_target_2.enable_interrupt(InterruptConfig::new(pac::Interrupt::OC3, true, false));
// The counter will only activate when the cascade signal is coming in so
// it is okay to call start here to set the reset value
cascade_target_2.start(1.Hz());
@ -87,7 +88,7 @@ fn main() -> ! {
CSD_TGT_2.borrow(cs).replace(Some(cascade_target_2));
});
loop {
rprintln!("-- Triggering cascade in 0.5 seconds --");
defmt::info!("-- Triggering cascade in 0.5 seconds --");
cascade_triggerer.start(2.Hz());
delay.delay_ms(5000);
}
@ -96,20 +97,20 @@ fn main() -> ! {
#[interrupt]
fn OC1() {
static mut IDX: u32 = 0;
rprintln!("{}: Cascade triggered timed out", &IDX);
defmt::info!("{}: Cascade triggered timed out", &IDX);
*IDX += 1;
}
#[interrupt]
fn OC2() {
static mut IDX: u32 = 0;
rprintln!("{}: First cascade target timed out", &IDX);
defmt::info!("{}: First cascade target timed out", &IDX);
*IDX += 1;
}
#[interrupt]
fn OC3() {
static mut IDX: u32 = 0;
rprintln!("{}: Second cascade target timed out", &IDX);
defmt::info!("{}: Second cascade target timed out", &IDX);
*IDX += 1;
}

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@ -1,11 +1,15 @@
//! Simple PWM example
//!
//! Outputs a PWM waveform on pin PA3.
#![no_main]
#![no_std]
use cortex_m_rt::entry;
use embedded_hal::{delay::DelayNs, pwm::SetDutyCycle};
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use va108xx_hal::{
pac,
pins::PinsA,
@ -16,8 +20,7 @@ use va108xx_hal::{
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx PWM example application--");
defmt::println!("-- VA108xx PWM example application--");
let dp = pac::Peripherals::take().unwrap();
let pinsa = PinsA::new(dp.porta);
let mut pwm = pwm::PwmPin::new(50.MHz(), (pinsa.pa3, dp.tim3), 10.Hz()).unwrap();
@ -36,7 +39,7 @@ fn main() -> ! {
current_duty_cycle += 0.02;
counter += 1;
if counter % 10 == 0 {
rprintln!("current duty cycle: {}", current_duty_cycle);
defmt::info!("current duty cycle: {}", current_duty_cycle);
}
pwm.set_duty_cycle(get_duty_from_percent(current_duty_cycle))
@ -57,8 +60,8 @@ fn main() -> ! {
upper_limit -= 0.01;
pwmb.set_pwmb_lower_limit(get_duty_from_percent(lower_limit));
pwmb.set_pwmb_upper_limit(get_duty_from_percent(upper_limit));
rprintln!("Lower limit: {}", pwmb.pwmb_lower_limit());
rprintln!("Upper limit: {}", pwmb.pwmb_upper_limit());
defmt::info!("Lower limit: {}", pwmb.pwmb_lower_limit());
defmt::info!("Upper limit: {}", pwmb.pwmb_upper_limit());
}
pwm = PwmPin::<PwmA>::from(pwmb);
}

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@ -1,20 +0,0 @@
//! Code to test RTT logger functionality
#![no_main]
#![no_std]
use cortex_m_rt::entry;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use va108xx_hal as _;
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108XX RTT example --");
let mut counter = 0;
loop {
rprintln!("{}: Hello, world!", counter);
counter += 1;
cortex_m::asm::delay(25_000_000);
}
}

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@ -1,23 +1,21 @@
//! SPI example application
#![no_main]
#![no_std]
use core::cell::RefCell;
use cortex_m_rt::entry;
use embedded_hal::{
delay::DelayNs,
spi::{Mode, SpiBus, MODE_0},
};
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use va108xx_hal::{
pac::{self, interrupt},
pac,
pins::{PinsA, PinsB},
prelude::*,
spi::{self, configure_pin_as_hw_cs_pin, Spi, SpiClkConfig, TransferConfig},
timer::CountdownTimer,
InterruptConfig,
};
#[derive(PartialEq, Debug)]
@ -43,16 +41,12 @@ const FILL_WORD: u8 = 0x0f;
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx SPI example application--");
let mut dp = pac::Peripherals::take().unwrap();
defmt::println!("-- VA108xx SPI example application--");
let dp = pac::Peripherals::take().unwrap();
let mut delay = CountdownTimer::new(50.MHz(), dp.tim0);
let spi_clk_cfg = SpiClkConfig::from_clk(50.MHz(), SPI_SPEED_KHZ.kHz())
.expect("creating SPI clock config failed");
//let spia_ref: RefCell<Option<SpiBase<pac::Spia, u8>>> = RefCell::new(None);
//let spib_ref: RefCell<Option<SpiBase<pac::Spib, u8>>> = RefCell::new(None);
let spi = None;
let pinsa = PinsA::new(dp.porta);
let pinsb = PinsB::new(dp.portb);
@ -62,7 +56,7 @@ fn main() -> ! {
}
// Set up the SPI peripheral
let spi = match SPI_BUS_SEL {
let mut spi = match SPI_BUS_SEL {
SpiBusSelect::SpiAPortA => {
let (sck, mosi, miso) = (pinsa.pa31, pinsa.pa30, pinsa.pa29);
let mut spia = Spi::new(50.MHz(), dp.spia, (sck, miso, mosi), spi_cfg).unwrap();
@ -122,7 +116,7 @@ fn main() -> ! {
let tx_buf: [u8; 3] = [0x01, 0x02, 0x03];
spi.transfer(&mut reply_buf[0..3], &tx_buf).unwrap();
assert_eq!(tx_buf, reply_buf[0..3]);
rprintln!(
defmt::info!(
"Received reply: {}, {}, {}",
reply_buf[0],
reply_buf[1],
@ -132,7 +126,7 @@ fn main() -> ! {
let mut tx_rx_buf: [u8; 3] = [0x03, 0x02, 0x01];
spi.transfer_in_place(&mut tx_rx_buf).unwrap();
rprintln!(
defmt::info!(
"Received reply: {}, {}, {}",
tx_rx_buf[0],
tx_rx_buf[1],

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@ -2,17 +2,19 @@
#![no_main]
#![no_std]
use core::cell::Cell;
use cortex_m_rt::entry;
use critical_section::Mutex;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use embedded_hal::delay::DelayNs;
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use portable_atomic::AtomicU32;
use va108xx_hal::{
clock::{get_sys_clock, set_sys_clock},
pac::{self, interrupt},
prelude::*,
time::Hertz,
timer::{default_ms_irq_handler, CountdownTimer, Event, InterruptConfig, MS_COUNTER},
timer::{CountdownTimer, InterruptConfig},
};
#[allow(dead_code)]
@ -21,14 +23,15 @@ enum LibType {
Hal,
}
static SEC_COUNTER: Mutex<Cell<u32>> = Mutex::new(Cell::new(0));
static MS_COUNTER: AtomicU32 = AtomicU32::new(0);
static SEC_COUNTER: AtomicU32 = AtomicU32::new(0);
#[entry]
fn main() -> ! {
rtt_init_print!();
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
let mut delay = CountdownTimer::new(50.MHz(), dp.tim2);
let mut last_ms = 0;
rprintln!("-- Vorago system ticks using timers --");
defmt::info!("-- Vorago system ticks using timers --");
set_sys_clock(50.MHz());
let lib_type = LibType::Hal;
match lib_type {
@ -65,23 +68,23 @@ fn main() -> ! {
}
LibType::Hal => {
let mut ms_timer = CountdownTimer::new(get_sys_clock().unwrap(), dp.tim0);
ms_timer.enable_interupt(InterruptConfig::new(interrupt::OC0, true, true));
ms_timer.enable_interrupt(InterruptConfig::new(interrupt::OC0, true, true));
ms_timer.start(1.kHz());
let mut second_timer = CountdownTimer::new(get_sys_clock().unwrap(), dp.tim1);
second_timer.enable_interupt(InterruptConfig::new(interrupt::OC1, true, true));
second_timer.enable_interrupt(InterruptConfig::new(interrupt::OC1, true, true));
second_timer.start(1.Hz());
}
}
loop {
let current_ms = critical_section::with(|cs| MS_COUNTER.borrow(cs).get());
let current_ms = MS_COUNTER.load(portable_atomic::Ordering::Relaxed);
if current_ms - last_ms >= 1000 {
// To prevent drift.
last_ms += 1000;
rprintln!("MS counter: {}", current_ms);
let second = critical_section::with(|cs| SEC_COUNTER.borrow(cs).get());
rprintln!("Second counter: {}", second);
defmt::info!("MS counter: {}", current_ms);
let second = SEC_COUNTER.load(portable_atomic::Ordering::Relaxed);
defmt::info!("Second counter: {}", second);
}
cortex_m::asm::delay(10000);
delay.delay_ms(50);
}
}
@ -95,15 +98,11 @@ fn unmask_irqs() {
#[interrupt]
#[allow(non_snake_case)]
fn OC0() {
default_ms_irq_handler()
MS_COUNTER.fetch_add(1, portable_atomic::Ordering::Relaxed);
}
#[interrupt]
#[allow(non_snake_case)]
fn OC1() {
critical_section::with(|cs| {
let mut sec = SEC_COUNTER.borrow(cs).get();
sec += 1;
SEC_COUNTER.borrow(cs).set(sec);
});
SEC_COUNTER.fetch_add(1, portable_atomic::Ordering::Relaxed);
}

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@ -13,14 +13,15 @@
use cortex_m_rt::entry;
use embedded_hal_nb::{nb, serial::Read};
use embedded_io::Write as _;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use va108xx_hal::{pac, pins::PinsA, prelude::*, uart};
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx UART example application--");
defmt::println!("-- VA108xx UART example application--");
let dp = pac::Peripherals::take().unwrap();

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@ -3,7 +3,7 @@
#![no_std]
use cortex_m_rt::entry;
use panic_rtt_target as _;
use panic_probe as _;
use va108xx_hal as _;
#[entry]

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@ -58,10 +58,10 @@ macro_rules! hw_cs_multi_pin {
$cs_id:path
) => {
#[doc = concat!(
"Newtype wrapper to use [Pin] [`", stringify!($pin_ty),
"`] as a HW CS pin for [`", stringify!($spi_id),
"`] with [`", stringify!($cs_id), "`]."
)]
"Newtype wrapper to use [Pin] [`", stringify!($pin_ty),
"`] as a HW CS pin for [`", stringify!($spi_id),
"`] with [`", stringify!($cs_id), "`]."
)]
pub struct $name(Pin<$pin_id>);
impl $name {

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@ -20,7 +20,8 @@ use fugit::RateExtU32;
use vorago_shared_periphs::{
gpio::{Pin, PinIdProvider},
ioconfig::regs::FunSel,
Port,
sysconfig::enable_peripheral_clock,
PeripheralSelect, Port,
};
/// Get the peripheral block of a TIM peripheral given the index.
@ -317,8 +318,7 @@ pub unsafe trait TimRegInterface {
///
/// Only the bit related to the corresponding TIM peripheral is modified
#[inline]
#[allow(dead_code)]
fn clear_tim_reset_bit(&self) {
fn assert_tim_reset(&self) {
unsafe {
va108xx::Peripherals::steal()
.sysconfig
@ -328,8 +328,7 @@ pub unsafe trait TimRegInterface {
}
#[inline]
#[allow(dead_code)]
fn set_tim_reset_bit(&self) {
fn deassert_tim_reset(&self) {
unsafe {
va108xx::Peripherals::steal()
.sysconfig
@ -337,6 +336,12 @@ pub unsafe trait TimRegInterface {
.modify(|r, w| w.bits(r.bits() | self.mask_32()));
}
}
fn assert_tim_reset_for_cycles(&self, cycles: u32) {
self.assert_tim_reset();
cortex_m::asm::delay(cycles);
self.deassert_tim_reset();
}
}
#[derive(Debug, PartialEq, Eq)]
@ -369,27 +374,35 @@ unsafe impl TimRegInterface for CountdownTimer {
}
impl CountdownTimer {
/// Configures a TIM peripheral as a periodic count down timer
pub fn new<Tim: TimMarker>(sys_clk: Hertz, _tim: Tim) -> Self {
/// Create a countdown timer structure for a given TIM peripheral.
///
/// This does not enable the timer. You can use the [Self::load], [Self::start],
/// [Self::enable_interrupt] and [Self::enable] API to set up and configure the countdown
/// timer.
pub fn new<Tim: TimMarker + TimRegInterface>(sys_clk: Hertz, tim: Tim) -> Self {
enable_tim_clk(Tim::ID.raw_id());
let cd_timer = CountdownTimer {
tim.assert_tim_reset_for_cycles(2);
CountdownTimer {
tim: Tim::ID,
sys_clk,
rst_val: 0,
curr_freq: 0.Hz(),
last_cnt: 0,
};
cd_timer
.tim
.reg_block()
.ctrl()
.modify(|_, w| w.enable().set_bit());
cd_timer
}
}
pub fn enable_interupt(&mut self, irq_cfg: InterruptConfig) {
#[inline(always)]
pub fn enable(&mut self) {
self.tim
.reg_block()
.enable()
.write(|w| unsafe { w.bits(1) });
}
pub fn enable_interrupt(&mut self, irq_cfg: InterruptConfig) {
if irq_cfg.route {
let irqsel = unsafe { pac::Irqsel::steal() };
enable_peripheral_clock(PeripheralSelect::Irqsel);
irqsel
.tim0(self.raw_id() as usize)
.write(|w| unsafe { w.bits(irq_cfg.id as u32) });
@ -403,35 +416,23 @@ impl CountdownTimer {
.modify(|_, w| w.irq_enb().set_bit());
}
#[inline(always)]
pub fn enable(&mut self) {
self.tim
.reg_block()
.enable()
.write(|w| unsafe { w.bits(1) });
/// Calls [Self::load] to configure the specified frequency and then calls [Self::enable].
pub fn start(&mut self, frequency: impl Into<Hertz>) {
self.load(frequency);
self.enable();
}
/// This function only clears the interrupt enable bit.
///
/// It does not mask the interrupt in the NVIC or un-route the IRQ.
#[inline(always)]
pub fn disable_interrupt(&mut self) {
self.tim
.reg_block()
.ctrl()
.modify(|_, w| w.irq_enb().clear_bit());
}
/// Disables the TIM and the dedicated TIM clock.
pub fn stop(self) {
self.tim
.reg_block()
.ctrl()
.write(|w| w.enable().clear_bit());
let syscfg = unsafe { va108xx::Sysconfig::steal() };
syscfg
.tim_clk_enable()
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.raw_id())) });
/// Return `Ok` if the timer has wrapped. Peripheral will automatically clear the
/// flag and restart the time if configured correctly
pub fn wait(&mut self) -> nb::Result<(), void::Void> {
let cnt = self.tim.reg_block().cnt_value().read().bits();
if (cnt > self.last_cnt) || cnt == 0 {
self.last_cnt = self.rst_val;
Ok(())
} else {
self.last_cnt = cnt;
Err(nb::Error::WouldBlock)
}
}
/// Load the count down timer with a timeout but do not start it.
@ -556,45 +557,34 @@ impl CountdownTimer {
pub fn curr_freq(&self) -> Hertz {
self.curr_freq
}
}
/// CountDown implementation for TIMx
impl CountdownTimer {
#[inline]
pub fn start<T>(&mut self, timeout: T)
where
T: Into<Hertz>,
{
self.load(timeout);
self.enable();
/// This function only clears the interrupt enable bit.
///
/// It does not mask the interrupt in the NVIC or un-route the IRQ.
#[inline(always)]
pub fn disable_interrupt(&mut self) {
self.tim
.reg_block()
.ctrl()
.modify(|_, w| w.irq_enb().clear_bit());
}
/// Return `Ok` if the timer has wrapped. Peripheral will automatically clear the
/// flag and restart the time if configured correctly
pub fn wait(&mut self) -> nb::Result<(), void::Void> {
let cnt = self.tim.reg_block().cnt_value().read().bits();
if (cnt > self.last_cnt) || cnt == 0 {
self.last_cnt = self.rst_val;
Ok(())
} else {
self.last_cnt = cnt;
Err(nb::Error::WouldBlock)
}
}
/// Returns [false] if the timer was not active, and true otherwise.
pub fn cancel(&mut self) -> bool {
if !self.tim.reg_block().ctrl().read().enable().bit_is_set() {
return false;
}
/// Disables the TIM and the dedicated TIM clock.
pub fn stop_with_clock_disable(self) {
self.tim
.reg_block()
.ctrl()
.write(|w| w.enable().clear_bit());
true
let syscfg = unsafe { va108xx::Sysconfig::steal() };
syscfg
.tim_clk_enable()
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.raw_id())) });
}
}
/// CountDown implementation for TIMx
impl CountdownTimer {}
//==================================================================================================
// Delay implementations
//==================================================================================================

View File

@ -13,8 +13,8 @@ fn main() -> ! {
rprintln!("-- Vorago Temperature Sensor and I2C Example --");
let dp = pac::Peripherals::take().unwrap();
let mut delay = CountdownTimer::new(50.MHz(), dp.tim0);
let mut temp_sensor = Adt75TempSensor::new(50.MHz(), dp.i2ca)
.expect("Creating temperature sensor struct failed");
let mut temp_sensor =
Adt75TempSensor::new(50.MHz(), dp.i2ca).expect("Creating temperature sensor struct failed");
loop {
let temp = temp_sensor
.read_temperature()

View File

@ -33,11 +33,7 @@ fn main() -> ! {
let dp = pac::Peripherals::take().unwrap();
let pinsa = PinsA::new(dp.porta);
let mut delay = CountdownTimer::new(50.MHz(), dp.tim0);
let (sck, mosi, miso) = (
pinsa.pa20,
pinsa.pa19,
pinsa.pa18,
);
let (sck, mosi, miso) = (pinsa.pa20, pinsa.pa19, pinsa.pa18);
let cs_pin = pinsa.pa16;
let hw_cs_id = configure_pin_as_hw_cs_pin(cs_pin);
@ -50,12 +46,7 @@ fn main() -> ! {
)
.mode(MODE_3)
.slave_output_disable(true);
let mut spi = Spi::new(
50.MHz(),
dp.spib,
(sck, miso, mosi),
spi_cfg,
).unwrap();
let mut spi = Spi::new(50.MHz(), dp.spib, (sck, miso, mosi), spi_cfg).unwrap();
spi.cfg_hw_cs(hw_cs_id);
let mut tx_rx_buf: [u8; 3] = [0; 3];

View File

@ -14,20 +14,19 @@ use max116xx_10bit::VoltageRefMode;
use max116xx_10bit::{AveragingConversions, AveragingResults};
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use va108xx_hal::gpio::Port;
use va108xx_hal::spi::{OptionalHwCs, SpiClkConfig};
use va108xx_hal::gpio::{Input, Output, PinState, Port};
use va108xx_hal::pins::PinsA;
use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClkConfig};
use va108xx_hal::timer::CountdownTimer;
use va108xx_hal::{
gpio::PinsA,
pac::{self, interrupt},
pac,
prelude::*,
spi::{Spi, SpiBase, SpiConfig},
timer::{default_ms_irq_handler, set_up_ms_tick, DelayMs, InterruptConfig},
spi::{HwChipSelectId, Spi, SpiConfig},
};
use va108xx_hal::{port_function_select, FunSel};
use vorago_reb1::max11619::{
max11619_externally_clocked_no_wakeup, max11619_externally_clocked_with_wakeup,
max11619_internally_clocked, EocPin, AN2_CHANNEL, POTENTIOMETER_CHANNEL,
max11619_internally_clocked, AN2_CHANNEL, POTENTIOMETER_CHANNEL,
};
#[derive(Debug, PartialEq, Copy, Clone)]
@ -57,34 +56,34 @@ const MUX_MODE: MuxMode = MuxMode::None;
// This is probably more or less a re-implementation of https://docs.rs/embedded-hal-bus/latest/embedded_hal_bus/spi/struct.ExclusiveDevice.html.
// Users should look at the embedded-hal-bus crate for sharing the bus.
pub struct SpiWithHwCs<Delay, HwCs> {
inner: SpiBase<pac::Spib, u8>,
pub struct SpiWithHwCs<Delay> {
inner: Spi<u8>,
delay_provider: Delay,
hw_cs: HwCs,
hw_cs_id: HwChipSelectId,
}
impl<Delay: DelayNs, HwCs: OptionalHwCs<pac::Spib>> SpiWithHwCs<Delay, HwCs> {
pub fn new(spi: SpiBase<pac::Spib, u8>, hw_cs: HwCs, delay_provider: Delay) -> Self {
impl<Delay: DelayNs> SpiWithHwCs<Delay> {
pub fn new(spi: Spi<u8>, hw_cs_id: HwChipSelectId, delay_provider: Delay) -> Self {
Self {
inner: spi,
hw_cs,
hw_cs_id,
delay_provider,
}
}
}
impl<Delay, HwCs> embedded_hal::spi::ErrorType for SpiWithHwCs<Delay, HwCs> {
impl<Delay> embedded_hal::spi::ErrorType for SpiWithHwCs<Delay> {
type Error = Infallible;
}
impl<Delay: DelayNs, HwCs: OptionalHwCs<pac::Spib>> SpiDevice for SpiWithHwCs<Delay, HwCs> {
impl<Delay: DelayNs> SpiDevice for SpiWithHwCs<Delay> {
fn transaction(
&mut self,
operations: &mut [spi::Operation<'_, u8>],
) -> Result<(), Self::Error> {
// Only the HW CS is configured here. This is not really necessary, but showcases
// that we could scale this multiple SPI devices.
self.inner.cfg_hw_cs_with_pin(&self.hw_cs);
self.inner.cfg_hw_cs(self.hw_cs_id);
for operation in operations {
match operation {
spi::Operation::Read(buf) => self.inner.read(buf).ok().unwrap(),
@ -111,28 +110,17 @@ fn main() -> ! {
rprintln!("-- Vorago ADC Example --");
let mut dp = pac::Peripherals::take().unwrap();
let tim0 = set_up_ms_tick(
InterruptConfig::new(pac::Interrupt::OC0, true, true),
&mut dp.sysconfig,
Some(&mut dp.irqsel),
SYS_CLK,
dp.tim0,
);
let delay = DelayMs::new(tim0).unwrap();
let mut delay = CountdownTimer::new(SYS_CLK, dp.tim0);
unsafe {
cortex_m::peripheral::NVIC::unmask(pac::Interrupt::OC0);
}
let pinsa = PinsA::new(&mut dp.sysconfig, dp.porta);
let pinsa = PinsA::new(dp.porta);
let spi_cfg = SpiConfig::default()
.clk_cfg(SpiClkConfig::from_clk(SYS_CLK, 3.MHz()).unwrap())
.mode(MODE_0)
.blockmode(true);
let (sck, mosi, miso) = (
pinsa.pa20.into_funsel_2(),
pinsa.pa19.into_funsel_2(),
pinsa.pa18.into_funsel_2(),
);
let (sck, mosi, miso) = (pinsa.pa20, pinsa.pa19, pinsa.pa18);
if MUX_MODE == MuxMode::PortB19to17 {
port_function_select(&mut dp.ioconfig, Port::B, 19, FunSel::Sel1).ok();
@ -141,39 +129,30 @@ fn main() -> ! {
port_function_select(&mut dp.ioconfig, Port::B, 16, FunSel::Sel1).ok();
}
// Set the accelerometer chip select low in case the board slot is populated
let mut accel_cs = pinsa.pa16.into_push_pull_output();
accel_cs.set_high();
Output::new(pinsa.pa16, PinState::Low);
let spi = Spi::new(
&mut dp.sysconfig,
50.MHz(),
dp.spib,
(sck, miso, mosi),
spi_cfg,
)
.downgrade();
let delay_provider = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
let spi_with_hwcs = SpiWithHwCs::new(spi, pinsa.pa17.into_funsel_2(), delay_provider);
let hw_cs_id = configure_pin_as_hw_cs_pin(pinsa.pa17);
let spi = Spi::new(50.MHz(), dp.spib, (sck, miso, mosi), spi_cfg).unwrap();
let delay_spi = CountdownTimer::new(SYS_CLK, dp.tim1);
let spi_with_hwcs = SpiWithHwCs::new(spi, hw_cs_id, delay_spi);
match EXAMPLE_MODE {
ExampleMode::NotUsingEoc => spi_example_externally_clocked(spi_with_hwcs, delay),
ExampleMode::NotUsingEoc => spi_example_externally_clocked(spi_with_hwcs, &mut delay),
ExampleMode::UsingEoc => {
spi_example_internally_clocked(spi_with_hwcs, delay, pinsa.pa14.into_floating_input());
spi_example_internally_clocked(
spi_with_hwcs,
&mut delay,
Input::new_floating(pinsa.pa14),
);
}
ExampleMode::NotUsingEocWithDelay => {
let delay_us = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim2);
spi_example_externally_clocked_with_delay(spi_with_hwcs, delay, delay_us);
spi_example_externally_clocked_with_delay(spi_with_hwcs, &mut delay);
}
}
}
#[interrupt]
#[allow(non_snake_case)]
fn OC0() {
default_ms_irq_handler();
}
/// Use the SPI clock as the conversion clock
fn spi_example_externally_clocked(spi: impl SpiDevice, mut delay: DelayMs) -> ! {
fn spi_example_externally_clocked(spi: impl SpiDevice, delay: &mut impl DelayNs) -> ! {
let mut adc = max11619_externally_clocked_no_wakeup(spi)
.expect("Creating externally clocked MAX11619 device failed");
if READ_MODE == ReadMode::AverageN {
@ -228,11 +207,7 @@ fn spi_example_externally_clocked(spi: impl SpiDevice, mut delay: DelayMs) -> !
}
}
fn spi_example_externally_clocked_with_delay(
spi: impl SpiDevice,
mut delay: DelayMs,
mut delay_us: impl DelayNs,
) -> ! {
fn spi_example_externally_clocked_with_delay(spi: impl SpiDevice, delay: &mut impl DelayNs) -> ! {
let mut adc =
max11619_externally_clocked_with_wakeup(spi).expect("Creating MAX116xx device failed");
let mut cmd_buf: [u8; 32] = [0; 32];
@ -244,7 +219,7 @@ fn spi_example_externally_clocked_with_delay(
ReadMode::Single => {
rprintln!("Reading single potentiometer channel");
let pot_val = adc
.read_single_channel(&mut cmd_buf, POTENTIOMETER_CHANNEL, &mut delay_us)
.read_single_channel(&mut cmd_buf, POTENTIOMETER_CHANNEL, delay)
.expect("Creating externally clocked MAX11619 ADC failed");
rprintln!("Single channel read:");
rprintln!("\tPotentiometer value: {}", pot_val);
@ -255,7 +230,7 @@ fn spi_example_externally_clocked_with_delay(
&mut cmd_buf,
&mut res_buf.iter_mut(),
POTENTIOMETER_CHANNEL,
&mut delay_us,
delay,
)
.expect("Multi-Channel read failed");
print_res_buf(&res_buf);
@ -266,7 +241,7 @@ fn spi_example_externally_clocked_with_delay(
&mut cmd_buf,
&mut res_buf.iter_mut(),
AN2_CHANNEL,
&mut delay_us,
delay,
)
.expect("Multi-Channel read failed");
rprintln!("Multi channel read from 2 to 3:");
@ -283,7 +258,11 @@ fn spi_example_externally_clocked_with_delay(
}
/// This function uses the EOC pin to determine whether the conversion finished
fn spi_example_internally_clocked(spi: impl SpiDevice, mut delay: DelayMs, eoc_pin: EocPin) -> ! {
fn spi_example_internally_clocked(
spi: impl SpiDevice,
delay: &mut impl DelayNs,
eoc_pin: Input,
) -> ! {
let mut adc = max11619_internally_clocked(
spi,
eoc_pin,

View File

@ -15,12 +15,12 @@ fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108XX REB1 NVM example --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
let mut timer = CountdownTimer::new(&mut dp.sysconfig, CLOCK_FREQ, dp.tim0);
let mut nvm = M95M01::new(&mut dp.sysconfig, CLOCK_FREQ, dp.spic);
let mut timer = CountdownTimer::new(CLOCK_FREQ, dp.tim0);
let mut nvm = M95M01::new(CLOCK_FREQ, dp.spic);
let status_reg = nvm.read_status_reg().expect("reading status reg failed");
if status_reg.zero_segment() == 0b111 {
if status_reg.zero_segment().value() == 0b111 {
panic!("status register unexpected values");
}

View File

@ -15,6 +15,10 @@
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"preLaunchTask": "rust: cargo build led blinky",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/blinky-leds",
"interface": "jtag",
"runToEntryPoint": "main",
@ -39,6 +43,10 @@
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"preLaunchTask": "rust: cargo build hal tests",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/board-tests",
"interface": "jtag",
"runToEntryPoint": "main",
@ -63,6 +71,10 @@
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"preLaunchTask": "rust: cargo build rtt",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/rtt-log",
"interface": "jtag",
"runToEntryPoint": "main",
@ -87,6 +99,10 @@
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"preLaunchTask": "rust: cargo build button blinky",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/blinky-button-irq",
"interface": "jtag",
"runToEntryPoint": "main",
@ -113,6 +129,10 @@
"preLaunchTask": "rust: cargo build systick",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/timer-ticks",
"interface": "jtag",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"runToEntryPoint": "main",
"rttConfig": {
"enabled": true,
@ -133,7 +153,11 @@
"servertype": "jlink",
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx-base.svd.patched",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rust: cargo build uart",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/uart",
"interface": "jtag",
@ -158,6 +182,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rust: cargo build spi",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/spi",
"interface": "jtag",
@ -182,6 +210,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx-base.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rust: cargo build temp sensor",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/adt75-temp-sensor",
"interface": "jtag",
@ -206,6 +238,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx-base.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rust: cargo build button blinky rtic",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/blinky-button-rtic",
"interface": "jtag",
@ -230,6 +266,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx-base.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "uart-echo-rtic-example",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/uart-echo-rtic",
"interface": "jtag",
@ -254,6 +294,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rust: cargo build pwm",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/pwm",
"interface": "jtag",
@ -278,6 +322,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rust: cargo build cascade",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/cascade",
"interface": "jtag",
@ -302,6 +350,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rust: cargo build accelerometer",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/adxl343-accelerometer",
"interface": "jtag",
@ -318,19 +370,6 @@
]
}
},
{
"type": "cortex-debug",
"request": "launch",
"name": "Blinky HAL",
"servertype": "jlink",
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"preLaunchTask": "blinky-hal",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/blinky",
"interface": "jtag",
"runToEntryPoint": "main",
},
{
"type": "cortex-debug",
"request": "launch",
@ -339,6 +378,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rust: cargo build adc",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/max11619-adc",
"interface": "jtag",
@ -363,6 +406,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "uart-echo-rtic-example",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/uart-echo-rtic",
"interface": "jtag",
@ -387,6 +434,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "reb1-nvm",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/nvm",
"interface": "jtag",
@ -411,6 +462,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "rtic-example",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/rtic-example",
"interface": "jtag",
@ -435,6 +490,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "embassy-example",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/embassy-example",
"interface": "jtag",
@ -459,6 +518,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "bootloader",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/release/bootloader",
"interface": "jtag",
@ -483,6 +546,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "flashloader",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/release/flashloader",
"interface": "jtag",
@ -507,6 +574,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "async-gpio",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/async-gpio",
"interface": "jtag",
@ -531,6 +602,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "async-uart-tx",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/async-uart-tx",
"interface": "jtag",
@ -555,6 +630,10 @@
"cwd": "${workspaceRoot}",
"device": "Cortex-M0",
"svdFile": "./va108xx/svd/va108xx.svd.patched",
"serverArgs": [
"-jtagconf",
"-1,-1"
],
"preLaunchTask": "async-uart-rx",
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/async-uart-rx",
"interface": "jtag",
@ -572,4 +651,4 @@
}
},
]
}
}