rust/va108xx-rs
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some more defmt updates

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This commit is contained in:
Robin Müller
2025-04-16 17:14:35 +02:00
parent acb652e940
commit 5f88f094ca
20 changed files with 310 additions and 310 deletions
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6
examples/simple/Cargo.toml
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@ -7,13 +7,15 @@ edition = "2021"
cortex-m = {version = "0.7", features = ["critical-section-single-core"]}
cortex-m-rt = "0.7"
panic-halt = "1"
panic-rtt-target = "0.2"
critical-section = "1"
rtt-target = "0.6"
defmt-rtt = "0.4"
defmt = "1"
panic-probe = { version = "1", features = ["defmt"] }
embedded-hal = "1"
embedded-hal-nb = "1"
embedded-io = "0.6"
cortex-m-semihosting = "0.5.0"
portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }
[dependencies.va108xx-hal]
version = "0.11"

23
examples/simple/examples/cascade.rs
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@ -10,8 +10,10 @@ use core::cell::RefCell;
use cortex_m::interrupt::Mutex;
use cortex_m_rt::entry;
use embedded_hal::delay::DelayNs;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use va108xx_hal::{
pac::{self, interrupt},
prelude::*,
@ -23,15 +25,14 @@ static CSD_TGT_2: Mutex<RefCell<Option<CountdownTimer>>> = Mutex::new(RefCell::n
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx Cascade example application--");
defmt::println!("-- VA108xx Cascade example application--");
let dp = pac::Peripherals::take().unwrap();
let mut delay = CountdownTimer::new(50.MHz(), dp.tim0);
// Will be started periodically to trigger a cascade
let mut cascade_triggerer = CountdownTimer::new(50.MHz(), dp.tim3).auto_disable(true);
cascade_triggerer.enable_interupt(InterruptConfig::new(pac::Interrupt::OC1, true, false));
cascade_triggerer.enable_interrupt(InterruptConfig::new(pac::Interrupt::OC1, true, false));
cascade_triggerer.enable();
// First target for cascade
@ -49,7 +50,7 @@ fn main() -> ! {
// Normally it should already be sufficient to activate IRQ in the CTRL
// register but a full interrupt is use here to display print output when
// the timer expires
cascade_target_1.enable_interupt(InterruptConfig::new(pac::Interrupt::OC2, true, false));
cascade_target_1.enable_interrupt(InterruptConfig::new(pac::Interrupt::OC2, true, false));
// The counter will only activate when the cascade signal is coming in so
// it is okay to call start here to set the reset value
cascade_target_1.start(1.Hz());
@ -69,7 +70,7 @@ fn main() -> ! {
// Normally it should already be sufficient to activate IRQ in the CTRL
// register but a full interrupt is use here to display print output when
// the timer expires
cascade_target_2.enable_interupt(InterruptConfig::new(pac::Interrupt::OC3, true, false));
cascade_target_2.enable_interrupt(InterruptConfig::new(pac::Interrupt::OC3, true, false));
// The counter will only activate when the cascade signal is coming in so
// it is okay to call start here to set the reset value
cascade_target_2.start(1.Hz());
@ -87,7 +88,7 @@ fn main() -> ! {
CSD_TGT_2.borrow(cs).replace(Some(cascade_target_2));
});
loop {
rprintln!("-- Triggering cascade in 0.5 seconds --");
defmt::info!("-- Triggering cascade in 0.5 seconds --");
cascade_triggerer.start(2.Hz());
delay.delay_ms(5000);
}
@ -96,20 +97,20 @@ fn main() -> ! {
#[interrupt]
fn OC1() {
static mut IDX: u32 = 0;
rprintln!("{}: Cascade triggered timed out", &IDX);
defmt::info!("{}: Cascade triggered timed out", &IDX);
*IDX += 1;
}
#[interrupt]
fn OC2() {
static mut IDX: u32 = 0;
rprintln!("{}: First cascade target timed out", &IDX);
defmt::info!("{}: First cascade target timed out", &IDX);
*IDX += 1;
}
#[interrupt]
fn OC3() {
static mut IDX: u32 = 0;
rprintln!("{}: Second cascade target timed out", &IDX);
defmt::info!("{}: Second cascade target timed out", &IDX);
*IDX += 1;
}

17
examples/simple/examples/pwm.rs
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@ -1,11 +1,15 @@
//! Simple PWM example
//!
//! Outputs a PWM waveform on pin PA3.
#![no_main]
#![no_std]
use cortex_m_rt::entry;
use embedded_hal::{delay::DelayNs, pwm::SetDutyCycle};
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use va108xx_hal::{
pac,
pins::PinsA,
@ -16,8 +20,7 @@ use va108xx_hal::{
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx PWM example application--");
defmt::println!("-- VA108xx PWM example application--");
let dp = pac::Peripherals::take().unwrap();
let pinsa = PinsA::new(dp.porta);
let mut pwm = pwm::PwmPin::new(50.MHz(), (pinsa.pa3, dp.tim3), 10.Hz()).unwrap();
@ -36,7 +39,7 @@ fn main() -> ! {
current_duty_cycle += 0.02;
counter += 1;
if counter % 10 == 0 {
rprintln!("current duty cycle: {}", current_duty_cycle);
defmt::info!("current duty cycle: {}", current_duty_cycle);
}
pwm.set_duty_cycle(get_duty_from_percent(current_duty_cycle))
@ -57,8 +60,8 @@ fn main() -> ! {
upper_limit -= 0.01;
pwmb.set_pwmb_lower_limit(get_duty_from_percent(lower_limit));
pwmb.set_pwmb_upper_limit(get_duty_from_percent(upper_limit));
rprintln!("Lower limit: {}", pwmb.pwmb_lower_limit());
rprintln!("Upper limit: {}", pwmb.pwmb_upper_limit());
defmt::info!("Lower limit: {}", pwmb.pwmb_lower_limit());
defmt::info!("Upper limit: {}", pwmb.pwmb_upper_limit());
}
pwm = PwmPin::<PwmA>::from(pwmb);
}

20
examples/simple/examples/rtt-log.rs
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@ -1,20 +0,0 @@
//! Code to test RTT logger functionality
#![no_main]
#![no_std]
use cortex_m_rt::entry;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use va108xx_hal as _;
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108XX RTT example --");
let mut counter = 0;
loop {
rprintln!("{}: Hello, world!", counter);
counter += 1;
cortex_m::asm::delay(25_000_000);
}
}

26
examples/simple/examples/spi.rs
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@ -1,23 +1,21 @@
//! SPI example application
#![no_main]
#![no_std]
use core::cell::RefCell;
use cortex_m_rt::entry;
use embedded_hal::{
delay::DelayNs,
spi::{Mode, SpiBus, MODE_0},
};
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use va108xx_hal::{
pac::{self, interrupt},
pac,
pins::{PinsA, PinsB},
prelude::*,
spi::{self, configure_pin_as_hw_cs_pin, Spi, SpiClkConfig, TransferConfig},
timer::CountdownTimer,
InterruptConfig,
};
#[derive(PartialEq, Debug)]
@ -43,16 +41,12 @@ const FILL_WORD: u8 = 0x0f;
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx SPI example application--");
let mut dp = pac::Peripherals::take().unwrap();
defmt::println!("-- VA108xx SPI example application--");
let dp = pac::Peripherals::take().unwrap();
let mut delay = CountdownTimer::new(50.MHz(), dp.tim0);
let spi_clk_cfg = SpiClkConfig::from_clk(50.MHz(), SPI_SPEED_KHZ.kHz())
.expect("creating SPI clock config failed");
//let spia_ref: RefCell<Option<SpiBase<pac::Spia, u8>>> = RefCell::new(None);
//let spib_ref: RefCell<Option<SpiBase<pac::Spib, u8>>> = RefCell::new(None);
let spi = None;
let pinsa = PinsA::new(dp.porta);
let pinsb = PinsB::new(dp.portb);
@ -62,7 +56,7 @@ fn main() -> ! {
}
// Set up the SPI peripheral
let spi = match SPI_BUS_SEL {
let mut spi = match SPI_BUS_SEL {
SpiBusSelect::SpiAPortA => {
let (sck, mosi, miso) = (pinsa.pa31, pinsa.pa30, pinsa.pa29);
let mut spia = Spi::new(50.MHz(), dp.spia, (sck, miso, mosi), spi_cfg).unwrap();
@ -122,7 +116,7 @@ fn main() -> ! {
let tx_buf: [u8; 3] = [0x01, 0x02, 0x03];
spi.transfer(&mut reply_buf[0..3], &tx_buf).unwrap();
assert_eq!(tx_buf, reply_buf[0..3]);
rprintln!(
defmt::info!(
"Received reply: {}, {}, {}",
reply_buf[0],
reply_buf[1],
@ -132,7 +126,7 @@ fn main() -> ! {
let mut tx_rx_buf: [u8; 3] = [0x03, 0x02, 0x01];
spi.transfer_in_place(&mut tx_rx_buf).unwrap();
rprintln!(
defmt::info!(
"Received reply: {}, {}, {}",
tx_rx_buf[0],
tx_rx_buf[1],

43
examples/simple/examples/timer-ticks.rs
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@ -2,17 +2,19 @@
#![no_main]
#![no_std]
use core::cell::Cell;
use cortex_m_rt::entry;
use critical_section::Mutex;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use embedded_hal::delay::DelayNs;
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use portable_atomic::AtomicU32;
use va108xx_hal::{
clock::{get_sys_clock, set_sys_clock},
pac::{self, interrupt},
prelude::*,
time::Hertz,
timer::{default_ms_irq_handler, CountdownTimer, Event, InterruptConfig, MS_COUNTER},
timer::{CountdownTimer, InterruptConfig},
};
#[allow(dead_code)]
@ -21,14 +23,15 @@ enum LibType {
Hal,
}
static SEC_COUNTER: Mutex<Cell<u32>> = Mutex::new(Cell::new(0));
static MS_COUNTER: AtomicU32 = AtomicU32::new(0);
static SEC_COUNTER: AtomicU32 = AtomicU32::new(0);
#[entry]
fn main() -> ! {
rtt_init_print!();
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
let mut delay = CountdownTimer::new(50.MHz(), dp.tim2);
let mut last_ms = 0;
rprintln!("-- Vorago system ticks using timers --");
defmt::info!("-- Vorago system ticks using timers --");
set_sys_clock(50.MHz());
let lib_type = LibType::Hal;
match lib_type {
@ -65,23 +68,23 @@ fn main() -> ! {
}
LibType::Hal => {
let mut ms_timer = CountdownTimer::new(get_sys_clock().unwrap(), dp.tim0);
ms_timer.enable_interupt(InterruptConfig::new(interrupt::OC0, true, true));
ms_timer.enable_interrupt(InterruptConfig::new(interrupt::OC0, true, true));
ms_timer.start(1.kHz());
let mut second_timer = CountdownTimer::new(get_sys_clock().unwrap(), dp.tim1);
second_timer.enable_interupt(InterruptConfig::new(interrupt::OC1, true, true));
second_timer.enable_interrupt(InterruptConfig::new(interrupt::OC1, true, true));
second_timer.start(1.Hz());
}
}
loop {
let current_ms = critical_section::with(|cs| MS_COUNTER.borrow(cs).get());
let current_ms = MS_COUNTER.load(portable_atomic::Ordering::Relaxed);
if current_ms - last_ms >= 1000 {
// To prevent drift.
last_ms += 1000;
rprintln!("MS counter: {}", current_ms);
let second = critical_section::with(|cs| SEC_COUNTER.borrow(cs).get());
rprintln!("Second counter: {}", second);
defmt::info!("MS counter: {}", current_ms);
let second = SEC_COUNTER.load(portable_atomic::Ordering::Relaxed);
defmt::info!("Second counter: {}", second);
}
cortex_m::asm::delay(10000);
delay.delay_ms(50);
}
}
@ -95,15 +98,11 @@ fn unmask_irqs() {
#[interrupt]
#[allow(non_snake_case)]
fn OC0() {
default_ms_irq_handler()
MS_COUNTER.fetch_add(1, portable_atomic::Ordering::Relaxed);
}
#[interrupt]
#[allow(non_snake_case)]
fn OC1() {
critical_section::with(|cs| {
let mut sec = SEC_COUNTER.borrow(cs).get();
sec += 1;
SEC_COUNTER.borrow(cs).set(sec);
});
SEC_COUNTER.fetch_add(1, portable_atomic::Ordering::Relaxed);
}

9
examples/simple/examples/uart.rs
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@ -13,14 +13,15 @@
use cortex_m_rt::entry;
use embedded_hal_nb::{nb, serial::Read};
use embedded_io::Write as _;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Import panic provider.
use panic_probe as _;
// Import logger.
use defmt_rtt as _;
use va108xx_hal::{pac, pins::PinsA, prelude::*, uart};
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx UART example application--");
defmt::println!("-- VA108xx UART example application--");
let dp = pac::Peripherals::take().unwrap();

2
examples/simple/src/main.rs
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@ -3,7 +3,7 @@
#![no_std]
use cortex_m_rt::entry;
use panic_rtt_target as _;
use panic_probe as _;
use va108xx_hal as _;
#[entry]