fix examples
This commit is contained in:
@@ -14,7 +14,7 @@ use va108xx_hal::{
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pac,
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pac,
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pins::{PinsA, PinsB},
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pins::{PinsA, PinsB},
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prelude::*,
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prelude::*,
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spi::{self, configure_pin_as_hw_cs_pin, Spi, SpiClkConfig, TransferConfig},
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spi::{self, configure_pin_as_hw_cs_pin, Spi, SpiClockConfig, TransferConfig},
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timer::CountdownTimer,
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timer::CountdownTimer,
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};
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};
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@@ -45,7 +45,7 @@ fn main() -> ! {
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let dp = pac::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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let mut delay = CountdownTimer::new(dp.tim0, 50.MHz());
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let mut delay = CountdownTimer::new(dp.tim0, 50.MHz());
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let spi_clk_cfg = SpiClkConfig::from_clk(50.MHz(), SPI_SPEED_KHZ.kHz())
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let spi_clk_cfg = SpiClockConfig::from_clk(50.MHz(), SPI_SPEED_KHZ.kHz())
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.expect("creating SPI clock config failed");
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.expect("creating SPI clock config failed");
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let pinsa = PinsA::new(dp.porta);
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let pinsa = PinsA::new(dp.porta);
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let pinsb = PinsB::new(dp.portb);
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let pinsb = PinsB::new(dp.portb);
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@@ -41,8 +41,8 @@ fn main() -> ! {
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dp.sysconfig
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dp.sysconfig
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.tim_clk_enable()
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.tim_clk_enable()
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.modify(|r, w| w.bits(r.bits() | (1 << 0) | (1 << 1)));
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.modify(|r, w| w.bits(r.bits() | (1 << 0) | (1 << 1)));
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dp.irqsel.tim0(0).write(|w| w.bits(0x00));
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dp.irqsel.tim(0).write(|w| w.bits(0x00));
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dp.irqsel.tim0(1).write(|w| w.bits(0x01));
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dp.irqsel.tim(1).write(|w| w.bits(0x01));
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}
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}
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let sys_clk: Hertz = 50.MHz();
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let sys_clk: Hertz = 50.MHz();
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@@ -11,7 +11,7 @@ use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use rtt_target::{rprintln, rtt_init_print};
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use va108xx_hal::gpio::{Output, PinState};
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use va108xx_hal::gpio::{Output, PinState};
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use va108xx_hal::pins::PinsA;
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use va108xx_hal::pins::PinsA;
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use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClkConfig};
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use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClockConfig};
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use va108xx_hal::timer::CountdownTimer;
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use va108xx_hal::timer::CountdownTimer;
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use va108xx_hal::{
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use va108xx_hal::{
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pac,
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pac,
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@@ -42,7 +42,7 @@ fn main() -> ! {
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let spi_cfg = SpiConfig::default()
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let spi_cfg = SpiConfig::default()
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.clk_cfg(
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.clk_cfg(
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SpiClkConfig::from_clk(50.MHz(), 1.MHz()).expect("creating SPI clock config failed"),
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SpiClockConfig::from_clk(50.MHz(), 1.MHz()).expect("creating SPI clock config failed"),
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)
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)
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.mode(MODE_3)
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.mode(MODE_3)
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.slave_output_disable(true);
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.slave_output_disable(true);
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@@ -9,7 +9,7 @@ use cortex_m_rt::entry;
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use panic_rtt_target as _;
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use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use rtt_target::{rprintln, rtt_init_print};
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use va108xx_hal::{
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use va108xx_hal::{
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clock::{set_clk_div_register, FilterClkSel},
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clock::{set_clk_div_register, FilterClockSelect},
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gpio::{FilterType, InterruptEdge},
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gpio::{FilterType, InterruptEdge},
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pac::{self, interrupt},
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pac::{self, interrupt},
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pins::PinsA,
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pins::PinsA,
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@@ -46,8 +46,8 @@ fn main() -> ! {
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if PRESS_MODE == PressMode::Toggle {
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if PRESS_MODE == PressMode::Toggle {
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// This filter debounces the switch for edge based interrupts
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// This filter debounces the switch for edge based interrupts
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button.configure_filter_type(FilterType::FilterFourCycles, FilterClkSel::Clk1);
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button.configure_filter_type(FilterType::FilterFourCycles, FilterClockSelect::Clk1);
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set_clk_div_register(&mut dp.sysconfig, FilterClkSel::Clk1, 50_000);
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set_clk_div_register(&mut dp.sysconfig, FilterClockSelect::Clk1, 50_000);
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}
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}
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button.configure_and_enable_edge_interrupt(
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button.configure_and_enable_edge_interrupt(
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edge_irq,
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edge_irq,
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@@ -16,14 +16,14 @@ use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use rtt_target::{rprintln, rtt_init_print};
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use va108xx_hal::gpio::{Input, Output, PinState, Port};
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use va108xx_hal::gpio::{Input, Output, PinState, Port};
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use va108xx_hal::pins::PinsA;
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use va108xx_hal::pins::PinsA;
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use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClkConfig};
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use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClockConfig};
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use va108xx_hal::timer::CountdownTimer;
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use va108xx_hal::timer::CountdownTimer;
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use va108xx_hal::{
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use va108xx_hal::{
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pac,
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pac,
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prelude::*,
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prelude::*,
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spi::{HwChipSelectId, Spi, SpiConfig},
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spi::{HwChipSelectId, Spi, SpiConfig},
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};
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};
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use va108xx_hal::{port_function_select, FunSel};
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use va108xx_hal::{port_function_select, FunctionSelect};
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use vorago_reb1::max11619::{
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use vorago_reb1::max11619::{
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max11619_externally_clocked_no_wakeup, max11619_externally_clocked_with_wakeup,
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max11619_externally_clocked_no_wakeup, max11619_externally_clocked_with_wakeup,
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max11619_internally_clocked, AN2_CHANNEL, POTENTIOMETER_CHANNEL,
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max11619_internally_clocked, AN2_CHANNEL, POTENTIOMETER_CHANNEL,
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@@ -117,16 +117,16 @@ fn main() -> ! {
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let pinsa = PinsA::new(dp.porta);
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let pinsa = PinsA::new(dp.porta);
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let spi_cfg = SpiConfig::default()
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let spi_cfg = SpiConfig::default()
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.clk_cfg(SpiClkConfig::from_clk(SYS_CLK, 3.MHz()).unwrap())
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.clk_cfg(SpiClockConfig::from_clk(SYS_CLK, 3.MHz()).unwrap())
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.mode(MODE_0)
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.mode(MODE_0)
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.blockmode(true);
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.blockmode(true);
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let (sck, mosi, miso) = (pinsa.pa20, pinsa.pa19, pinsa.pa18);
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let (sck, mosi, miso) = (pinsa.pa20, pinsa.pa19, pinsa.pa18);
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if MUX_MODE == MuxMode::PortB19to17 {
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if MUX_MODE == MuxMode::PortB19to17 {
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port_function_select(&mut dp.ioconfig, Port::B, 19, FunSel::Sel1).ok();
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port_function_select(&mut dp.ioconfig, Port::B, 19, FunctionSelect::Sel1).ok();
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port_function_select(&mut dp.ioconfig, Port::B, 18, FunSel::Sel2).ok();
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port_function_select(&mut dp.ioconfig, Port::B, 18, FunctionSelect::Sel2).ok();
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port_function_select(&mut dp.ioconfig, Port::B, 17, FunSel::Sel1).ok();
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port_function_select(&mut dp.ioconfig, Port::B, 17, FunctionSelect::Sel1).ok();
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port_function_select(&mut dp.ioconfig, Port::B, 16, FunSel::Sel1).ok();
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port_function_select(&mut dp.ioconfig, Port::B, 16, FunctionSelect::Sel1).ok();
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}
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}
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// Set the accelerometer chip select low in case the board slot is populated
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// Set the accelerometer chip select low in case the board slot is populated
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Output::new(pinsa.pa16, PinState::Low);
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Output::new(pinsa.pa16, PinState::Low);
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@@ -5,7 +5,7 @@ use cortex_m_rt::entry;
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use embedded_hal::delay::DelayNs;
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use embedded_hal::delay::DelayNs;
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use panic_rtt_target as _;
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use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use rtt_target::{rprintln, rtt_init_print};
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use va108xx_hal::{pac, spi::SpiClkConfig, time::Hertz, timer::CountdownTimer};
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use va108xx_hal::{pac, spi::SpiClockConfig, time::Hertz, timer::CountdownTimer};
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use vorago_reb1::m95m01::{M95M01, PAGE_SIZE};
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use vorago_reb1::m95m01::{M95M01, PAGE_SIZE};
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const CLOCK_FREQ: Hertz = Hertz::from_raw(50_000_000);
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const CLOCK_FREQ: Hertz = Hertz::from_raw(50_000_000);
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@@ -18,7 +18,7 @@ fn main() -> ! {
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let dp = pac::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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let mut delay = CountdownTimer::new(dp.tim0, CLOCK_FREQ);
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let mut delay = CountdownTimer::new(dp.tim0, CLOCK_FREQ);
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let clk_config = SpiClkConfig::new(2, 4);
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let clk_config = SpiClockConfig::new(2, 4);
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let mut nvm = M95M01::new(dp.spic, clk_config);
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let mut nvm = M95M01::new(dp.spic, clk_config);
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let status_reg = nvm.read_status_reg().expect("reading status reg failed");
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let status_reg = nvm.read_status_reg().expect("reading status reg failed");
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if status_reg.zero_segment().value() == 0b111 {
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if status_reg.zero_segment().value() == 0b111 {
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