Merge branch 'main' into readme-fix
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commit
e3996d9166
@ -36,8 +36,7 @@
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//! Users may try to convert value-level pins back to their type-level
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//! equivalents. However, this option is fallible, because the compiler cannot
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//! guarantee the pin has the correct ID or is in the correct mode at
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//! compile-time. Use [`TryFrom`](core::convert::TryFrom)/
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//! [`TryInto`](core::convert::TryInto) for this conversion.
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//! compile-time. Use [TryFrom]/[TryInto] for this conversion.
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//!
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//! ```
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//! // Convert to a `DynPin`
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@ -55,7 +54,7 @@
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//! `Error = core::convert::Infallible`, the value-level API can return a real
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//! error. If the [`DynPin`] is not in the correct [`DynPinMode`] for the
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//! operation, the trait functions will return
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//! [`InvalidPinType`](PinError::InvalidPinType).
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//! [InvalidPinTypeError].
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use super::{
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pins::{FilterType, InterruptEdge, InterruptLevel, Pin, PinId, PinMode, PinState},
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@ -29,72 +29,47 @@
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//! }
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//! ```
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//!
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//! A `PinId` identifies a pin by it's group (A, B, C or D) and pin number. Each
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//! `PinId` instance is named according to its datasheet identifier, e.g.
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//! [`PA02`].
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//! A [PinId] identifies a pin by it's group (A or B) and pin number. Each
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//! [PinId] instance is named according to its datasheet identifier, e.g.
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//! [PA2].
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//!
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//! A `PinMode` represents the various pin modes. The available `PinMode`
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//! variants are [`Disabled`], [`Input`], [`Interrupt`], [`Output`] and
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//! [`Alternate`], each with its own corresponding configurations.
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//! A [PinMode] represents the various pin modes. The available [PinMode]
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//! variants are [`Input`], [`Output`] and [`Alternate`], each with its own
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//! corresponding configurations.
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//!
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//! It is not possible for users to create new instances of a [`Pin`]. Singleton
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//! instances of each pin are made available to users through the [`Pins`]
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//! instances of each pin are made available to users through the PinsX
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//! struct.
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//!
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//! To create the [`Pins`] struct, users must supply the PAC
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//! [`PORT`](crate::pac::PORT) peripheral. The [`Pins`] struct takes
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//! ownership of the [`PORT`] and provides the corresponding pins. Each [`Pin`]
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//! within the [`Pins`] struct can be moved out and used individually.
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//! Example for the pins of PORT A:
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//!
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//! To create the [PinsA] struct, users must supply the PAC
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//! [Port](crate::pac::Porta) peripheral. The [PinsA] struct takes
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//! ownership of the [Porta] and provides the corresponding pins. Each [`Pin`]
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//! within the [PinsA] struct can be moved out and used individually.
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//!
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//!
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//! ```
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//! let mut peripherals = Peripherals::take().unwrap();
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//! let pins = Pins::new(peripherals.PORT);
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//! let pinsa = PinsA::new(peripherals.PORT);
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//! ```
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//!
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//! Pins can be converted between modes using several different methods.
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//!
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//! ```
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//! ```no_run
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//! // Use one of the literal function names
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//! let pa27 = pins.pa27.into_floating_input();
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//! let pa0 = pinsa.pa0.into_floating_input();
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//! // Use a generic method and one of the `PinMode` variant types
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//! let pa27 = pins.pa27.into_mode::<FloatingInput>();
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//! let pa0 = pinsa.pa0.into_mode::<FloatingInput>();
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//! // Specify the target type and use `From`/`Into`
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//! let pa27: Pin<PA27, FloatingInput> = pins.pa27.into();
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//! let pa0: Pin<PA0, FloatingInput> = pinsa.pa27.into();
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//! ```
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//!
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//! # Embedded HAL traits
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//!
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//! This module implements all of the embedded HAL GPIO traits for each [`Pin`]
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//! in the corresponding [`PinMode`]s, namely: [`InputPin`], [`OutputPin`],
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//! [`ToggleableOutputPin`] and [`StatefulOutputPin`].
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//!
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//! For example, you can control the logic level of an `OutputPin` like so
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//!
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//! ```
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//! use atsamd_hal::pac::Peripherals;
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//! use atsamd_hal::gpio::Pins;
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//! use crate::ehal_02::digital::v2::OutputPin;
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//!
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//! let mut peripherals = Peripherals::take().unwrap();
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//! let mut pins = Pins::new(peripherals.PORT);
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//! pins.pa27.set_high();
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//! ```
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//!
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//! # Type-level features
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//!
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//! This module also provides additional, type-level tools to work with GPIO
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//! pins.
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//!
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//! The [`OptionalPinId`] and [`OptionalPin`] traits use the [`OptionalKind`]
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//! pattern to act as type-level versions of [`Option`] for `PinId` and `Pin`
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//! respectively. And the [`AnyPin`] trait defines an [`AnyKind`] type class
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//! for all `Pin` types.
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//!
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//! [type classes]: crate::typelevel#type-classes
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//! [type-level enum]: crate::typelevel#type-level-enum
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//! [`OptionalKind`]: crate::typelevel#optionalkind-trait-pattern
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//! [`AnyKind`]: crate::typelevel#anykind-trait-pattern
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//! and [`StatefulOutputPin`].
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use super::dynpins::{DynAlternate, DynGroup, DynInput, DynOutput, DynPinId, DynPinMode};
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use super::reg::RegisterInterface;
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use crate::{
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@ -137,9 +112,9 @@ pub enum PinState {
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/// Type-level enum for input configurations
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///
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/// The valid options are [`Floating`], [`PullDown`] and [`PullUp`].
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/// The valid options are [Floating], [PullDown] and [PullUp].
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pub trait InputConfig: Sealed {
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/// Corresponding [`DynInput`](super::DynInput)
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/// Corresponding [DynInput]
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const DYN: DynInput;
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}
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@ -297,9 +272,9 @@ pub type Reset = InputFloating;
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/// Type-level enum representing pin modes
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///
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/// The valid options are [`Input`], [`Output`] and [`Alternate`].
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/// The valid options are [Input], [Output] and [Alternate].
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pub trait PinMode: Sealed {
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/// Corresponding [`DynPinMode`](super::DynPinMode)
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/// Corresponding [DynPinMode]
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const DYN: DynPinMode;
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}
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@ -319,7 +294,7 @@ impl<C: AlternateConfig> PinMode for Alternate<C> {
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/// Type-level enum for pin IDs
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pub trait PinId: Sealed {
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/// Corresponding [`DynPinId`](super::DynPinId)
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/// Corresponding [DynPinId]
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const DYN: DynPinId;
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}
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@ -344,7 +319,7 @@ macro_rules! pin_id {
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// Pin
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//==================================================================================================
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/// A type-level GPIO pin, parameterized by [`PinId`] and [`PinMode`] types
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/// A type-level GPIO pin, parameterized by [PinId] and [PinMode] types
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pub struct Pin<I: PinId, M: PinMode> {
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pub(in crate::gpio) regs: Registers<I>,
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@ -352,12 +327,12 @@ pub struct Pin<I: PinId, M: PinMode> {
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}
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impl<I: PinId, M: PinMode> Pin<I, M> {
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/// Create a new [`Pin`]
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/// Create a new [Pin]
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///
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/// # Safety
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///
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/// Each [`Pin`] must be a singleton. For a given [`PinId`], there must be
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/// at most one corresponding [`Pin`] in existence at any given time.
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/// Each [Pin] must be a singleton. For a given [PinId], there must be
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/// at most one corresponding [Pin] in existence at any given time.
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/// Violating this requirement is `unsafe`.
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#[inline]
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pub(crate) unsafe fn new() -> Pin<I, M> {
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@ -1,18 +1,19 @@
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use crate::{pac, PeripheralSelect};
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#[derive(PartialEq, Eq, Debug)]
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pub struct InvalidounterResetVal(pub(crate) ());
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct InvalidCounterResetVal(pub(crate) ());
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/// Enable scrubbing for the ROM
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///
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/// Returns [`UtilityError::InvalidCounterResetVal`] if the scrub rate is 0
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/// Returns [InvalidCounterResetVal] if the scrub rate is 0
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/// (equivalent to disabling) or larger than 24 bits
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pub fn enable_rom_scrubbing(
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syscfg: &mut pac::Sysconfig,
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scrub_rate: u32,
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) -> Result<(), InvalidounterResetVal> {
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) -> Result<(), InvalidCounterResetVal> {
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if scrub_rate == 0 || scrub_rate > u32::pow(2, 24) {
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return Err(InvalidounterResetVal(()));
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return Err(InvalidCounterResetVal(()));
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}
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syscfg.rom_scrub().write(|w| unsafe { w.bits(scrub_rate) });
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Ok(())
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/// Enable scrubbing for the RAM
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///
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/// Returns [`UtilityError::InvalidCounterResetVal`] if the scrub rate is 0
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/// Returns [InvalidCounterResetVal] if the scrub rate is 0
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/// (equivalent to disabling) or larger than 24 bits
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pub fn enable_ram_scrubbing(
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syscfg: &mut pac::Sysconfig,
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scrub_rate: u32,
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) -> Result<(), InvalidounterResetVal> {
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) -> Result<(), InvalidCounterResetVal> {
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if scrub_rate == 0 || scrub_rate > u32::pow(2, 24) {
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return Err(InvalidounterResetVal(()));
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return Err(InvalidCounterResetVal(()));
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}
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syscfg.ram_scrub().write(|w| unsafe { w.bits(scrub_rate) });
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Ok(())
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