dynpin bugfix

2025-02-12 13:41:06 +01:00 · 2025-02-12 13:41:06 +01:00 · f3d840ace7
commit f3d840ace7
parent f781505ec5
1 changed files with 0 additions and 5 deletions
--- a/va108xx-hal/src/gpio/dynpin.rs
+++ b/va108xx-hal/src/gpio/dynpin.rs
@ -346,11 +346,6 @@ impl DynPin {
        self.regs.write_pin_masked(false)
    }

-    #[inline]
-    pub fn edge_has_occurred(&mut self) -> bool {
-        self.regs.edge_has_occurred()
-    }
-
    pub(crate) fn irq_enb(
        &mut self,
        irq_cfg: crate::IrqCfg,