update package
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- Add embassy example - improve timer API - restructure examples
This commit is contained in:
parent
405cc089c3
commit
ff7ac62a8d
@ -5,6 +5,8 @@ members = [
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"va108xx",
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"va108xx-hal",
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"examples/simple",
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"examples/rtic",
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"examples/embassy",
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"board-tests",
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]
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15
README.md
15
README.md
@ -19,9 +19,13 @@ This workspace contains the following released crates:
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It also contains the following helper crates:
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- The `board-tests` contains an application which can be used to test the libraries on the
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board.
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- The `examples` crates contains various example applications for the HAL and the PAC.
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- The [`board-tests`](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/board-tests)
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contains an application which can be used to test the libraries on the board.
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- The [`examples`](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples)
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folder contains various example applications crates using the HAL and the PAC.
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This folder also contains dedicated example applications using the
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[`RTIC`](https://rtic.rs/2/book/en/) and [`embassy`](https://github.com/embassy-rs/embassy)
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native Rust RTOSes.
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## Using the `.cargo/config.toml` file
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@ -94,6 +98,8 @@ example.
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Assuming a working debug connection to your VA108xx board, you can debug using VS Code with
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the [`Cortex-Debug` plugin](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug).
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Please make sure that [`objdump-multiarch` and `nm-multiarch`](https://forums.raspberrypi.com/viewtopic.php?t=333146)
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are installed as well.
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Some sample configuration files for VS code were provided and can be used by running
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`cp -rT vscode .vscode` like specified above. After that, you can use `Run and Debug`
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@ -108,4 +114,5 @@ configuration variables in your `settings.json`:
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- `"cortex-debug.gdbPath.osx"`
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The provided VS Code configurations also provide an integrated RTT logger, which you can access
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via the terminal at `RTT Ch:0 console`.
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via the terminal at `RTT Ch:0 console`. In order for the RTT block address detection to
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work properly, `objdump-multiarch` and `nm-multiarch` need to be installed.
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@ -4,10 +4,9 @@ version = "0.1.0"
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edition = "2021"
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[dependencies]
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cortex-m-rtic = "1"
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panic-halt = "0.2"
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cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
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cortex-m-rt = "0.7"
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panic-halt = "0.2"
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rtt-target = "0.5"
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panic-rtt-target = "0.1.3"
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embedded-hal = "1"
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25
examples/README.md
Normal file
25
examples/README.md
Normal file
@ -0,0 +1,25 @@
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VA108xx Example Applications
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========
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This folder contains various examples
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Consult the main README first for setup of the repository.
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## Simple examples
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```rs
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cargo run --example blinky
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```
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You can have a look at the `simple/examples` folder to see all available simple examples
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## RTIC example
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```rs
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cargo run --bin rtic-example
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```
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## Embassy example
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```rs
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cargo run --bin embassy-example
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```
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40
examples/embassy/Cargo.toml
Normal file
40
examples/embassy/Cargo.toml
Normal file
@ -0,0 +1,40 @@
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[package]
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name = "embassy-example"
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version = "0.1.0"
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edition = "2021"
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[dependencies]
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cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
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cortex-m-rt = "0.7"
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embedded-hal = "1"
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rtt-target = { version = "0.5" }
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panic-rtt-target = { version = "0.1" }
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critical-section = "1"
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portable-atomic = { version = "1", features = ["unsafe-assume-single-core"]}
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embassy-sync = { version = "0.6.0" }
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embassy-time = { version = "0.3.2" }
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embassy-time-driver = { version = "0.1" }
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[dependencies.once_cell]
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version = "1"
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default-features = false
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features = ["critical-section"]
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[dependencies.embassy-executor]
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version = "0.6.0"
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features = [
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"arch-cortex-m",
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"executor-thread",
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"executor-interrupt",
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"integrated-timers",
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]
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[dependencies.va108xx-hal]
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path = "../../va108xx-hal"
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[features]
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default = ["ticks-hz-1_000"]
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ticks-hz-1_000 = ["embassy-time/tick-hz-1_000"]
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ticks-hz-32_768 = ["embassy-time/tick-hz-32_768"]
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4
examples/embassy/src/lib.rs
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4
examples/embassy/src/lib.rs
Normal file
@ -0,0 +1,4 @@
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#![no_std]
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pub mod time_driver;
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pub use time_driver::init;
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43
examples/embassy/src/main.rs
Normal file
43
examples/embassy/src/main.rs
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@ -0,0 +1,43 @@
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#![no_std]
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#![no_main]
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use embassy_executor::Spawner;
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use embassy_time::{Duration, Instant, Ticker};
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use embedded_hal::digital::StatefulOutputPin;
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use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use va108xx_hal::{gpio::PinsA, pac, prelude::*};
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const SYSCLK_FREQ: Hertz = Hertz::from_raw(50_000_000);
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// main is itself an async function.
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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rtt_init_print!();
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rprintln!("-- VA108xx Embassy Demo --");
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let mut dp = pac::Peripherals::take().unwrap();
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// Safety: Only called once here.
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unsafe {
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embassy_example::init(
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&mut dp.sysconfig,
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&dp.irqsel,
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SYSCLK_FREQ,
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dp.tim23,
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dp.tim22,
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)
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};
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let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
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let mut led0 = porta.pa10.into_readable_push_pull_output();
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let mut led1 = porta.pa7.into_readable_push_pull_output();
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let mut led2 = porta.pa6.into_readable_push_pull_output();
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let mut ticker = Ticker::every(Duration::from_secs(1));
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loop {
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ticker.next().await;
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rprintln!("Current time: {}", Instant::now().as_secs());
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led0.toggle().ok();
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led1.toggle().ok();
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led2.toggle().ok();
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}
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}
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334
examples/embassy/src/time_driver.rs
Normal file
334
examples/embassy/src/time_driver.rs
Normal file
@ -0,0 +1,334 @@
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//! This is a sample time driver implementation for the VA108xx family of devices, supporting
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//! one alarm and requiring/reserving 2 TIM peripherals. You could adapt this implementation to
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//! support more alarms.
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//!
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//! This driver implementation reserves interrupts OC31 and OC30 for the timekeeping.
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use core::{cell::Cell, mem, ptr};
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use critical_section::CriticalSection;
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use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
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use embassy_sync::blocking_mutex::Mutex;
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use portable_atomic::{AtomicU32, AtomicU8, Ordering};
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use embassy_time_driver::{time_driver_impl, AlarmHandle, Driver, TICK_HZ};
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use once_cell::sync::OnceCell;
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use va108xx_hal::{
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clock::enable_peripheral_clock,
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enable_interrupt,
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pac::{self, interrupt},
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prelude::*,
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timer::{enable_tim_clk, ValidTim},
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PeripheralSelect,
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};
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pub type TimekeeperClk = pac::Tim23;
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pub type AlarmClk0 = pac::Tim22;
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pub type AlarmClk1 = pac::Tim21;
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pub type AlarmClk2 = pac::Tim20;
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const TIMEKEEPER_IRQ: pac::Interrupt = pac::Interrupt::OC31;
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const ALARM_IRQ: pac::Interrupt = pac::Interrupt::OC30;
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/// Initialization method for embassy
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///
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/// # Safety
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/// This has to be called once at initialization time to initiate the time driver for
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/// embassy.
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pub unsafe fn init(
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syscfg: &mut pac::Sysconfig,
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irqsel: &pac::Irqsel,
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sysclk: impl Into<Hertz>,
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timekeeper: TimekeeperClk,
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alarm_tim: AlarmClk0,
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) {
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//enable_and_init_irq_router(syscfg, irq_router);
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DRIVER.init(syscfg, irqsel, sysclk, timekeeper, alarm_tim)
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}
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time_driver_impl!(
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static DRIVER: TimerDriverEmbassy = TimerDriverEmbassy {
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periods: AtomicU32::new(0),
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alarm_count: AtomicU8::new(0),
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alarms: Mutex::const_new(CriticalSectionRawMutex::new(), [AlarmState::new(); ALARM_COUNT])
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});
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/// Timekeeper interrupt.
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#[interrupt]
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#[allow(non_snake_case)]
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fn OC31() {
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DRIVER.on_interrupt_timekeeping()
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}
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/// Alarm timer interrupt.
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#[interrupt]
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#[allow(non_snake_case)]
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fn OC30() {
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DRIVER.on_interrupt_alarm(0)
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}
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#[inline(always)]
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const fn alarm_tim(idx: usize) -> &'static pac::tim0::RegisterBlock {
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// Safety: This is a static memory-mapped peripheral.
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match idx {
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0 => unsafe { &*AlarmClk0::ptr() },
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1 => unsafe { &*AlarmClk1::ptr() },
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2 => unsafe { &*AlarmClk2::ptr() },
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_ => {
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panic!("invalid alarm timer index")
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}
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}
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}
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#[inline(always)]
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const fn timekeeping_tim() -> &'static pac::tim0::RegisterBlock {
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// Safety: This is a memory-mapped peripheral.
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unsafe { &*TimekeeperClk::ptr() }
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}
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struct AlarmState {
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timestamp: Cell<u64>,
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// This is really a Option<(fn(*mut ()), *mut ())>
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// but fn pointers aren't allowed in const yet
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callback: Cell<*const ()>,
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ctx: Cell<*mut ()>,
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}
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impl AlarmState {
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const fn new() -> Self {
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Self {
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timestamp: Cell::new(u64::MAX),
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callback: Cell::new(ptr::null()),
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ctx: Cell::new(ptr::null_mut()),
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}
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}
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}
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unsafe impl Send for AlarmState {}
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const ALARM_COUNT: usize = 1;
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static SCALE: OnceCell<u64> = OnceCell::new();
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pub struct TimerDriverEmbassy {
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periods: AtomicU32,
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alarm_count: AtomicU8,
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/// Timestamp at which to fire alarm. u64::MAX if no alarm is scheduled.
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alarms: Mutex<CriticalSectionRawMutex, [AlarmState; ALARM_COUNT]>,
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}
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impl TimerDriverEmbassy {
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fn init(
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&self,
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syscfg: &mut pac::Sysconfig,
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irqsel: &pac::Irqsel,
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sysclk: impl Into<Hertz>,
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timekeeper: TimekeeperClk,
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alarm_tim: AlarmClk0,
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) {
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enable_peripheral_clock(syscfg, PeripheralSelect::Irqsel);
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enable_tim_clk(syscfg, TimekeeperClk::TIM_ID);
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let sysclk = sysclk.into();
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// Initiate scale value here. This is required to convert timer ticks back to a timestamp.
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SCALE.set((sysclk.raw() / TICK_HZ as u32) as u64).unwrap();
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timekeeper
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.rst_value()
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.write(|w| unsafe { w.bits(u32::MAX) });
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// Decrementing counter.
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timekeeper
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.cnt_value()
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.write(|w| unsafe { w.bits(u32::MAX) });
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// Switch on. Timekeeping should always be done.
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irqsel
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.tim0(TimekeeperClk::TIM_ID as usize)
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.write(|w| unsafe { w.bits(TIMEKEEPER_IRQ as u32) });
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unsafe {
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enable_interrupt(TIMEKEEPER_IRQ);
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}
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timekeeper.ctrl().modify(|_, w| w.irq_enb().set_bit());
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timekeeper.enable().write(|w| unsafe { w.bits(1) });
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enable_tim_clk(syscfg, AlarmClk0::TIM_ID);
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// Explicitely disable alarm timer until needed.
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alarm_tim.ctrl().modify(|_, w| {
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w.irq_enb().clear_bit();
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w.enable().clear_bit()
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});
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// Enable general interrupts. The IRQ enable of the peripheral remains cleared.
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unsafe {
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enable_interrupt(ALARM_IRQ);
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}
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irqsel
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.tim0(AlarmClk0::TIM_ID as usize)
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.write(|w| unsafe { w.bits(ALARM_IRQ as u32) });
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}
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// Should be called inside the IRQ of the timekeeper timer.
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fn on_interrupt_timekeeping(&self) {
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self.next_period();
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}
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// Should be called inside the IRQ of the alarm timer.
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fn on_interrupt_alarm(&self, idx: usize) {
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critical_section::with(|cs| {
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if self.alarms.borrow(cs)[idx].timestamp.get() <= self.now() {
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self.trigger_alarm(idx, cs)
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}
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})
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}
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fn next_period(&self) {
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let period = self.periods.fetch_add(1, Ordering::AcqRel) + 1;
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let t = (period as u64) << 32;
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critical_section::with(|cs| {
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for i in 0..ALARM_COUNT {
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let alarm = &self.alarms.borrow(cs)[i];
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let at = alarm.timestamp.get();
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let alarm_tim = alarm_tim(0);
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if at < t {
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self.trigger_alarm(i, cs);
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} else {
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let remaining_ticks = (at - t) * *SCALE.get().unwrap();
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if remaining_ticks <= u32::MAX as u64 {
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alarm_tim.enable().write(|w| unsafe { w.bits(0) });
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alarm_tim
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.cnt_value()
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.write(|w| unsafe { w.bits(remaining_ticks as u32) });
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alarm_tim.ctrl().modify(|_, w| w.irq_enb().set_bit());
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alarm_tim.enable().write(|w| unsafe { w.bits(1) })
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}
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}
|
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}
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})
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}
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fn get_alarm<'a>(&'a self, cs: CriticalSection<'a>, alarm: AlarmHandle) -> &'a AlarmState {
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// safety: we're allowed to assume the AlarmState is created by us, and
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// we never create one that's out of bounds.
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unsafe { self.alarms.borrow(cs).get_unchecked(alarm.id() as usize) }
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}
|
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fn trigger_alarm(&self, n: usize, cs: CriticalSection) {
|
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alarm_tim(n).ctrl().modify(|_, w| {
|
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w.irq_enb().clear_bit();
|
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w.enable().clear_bit()
|
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});
|
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|
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let alarm = &self.alarms.borrow(cs)[n];
|
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// Setting the maximum value disables the alarm.
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alarm.timestamp.set(u64::MAX);
|
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|
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// Call after clearing alarm, so the callback can set another alarm.
|
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|
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// safety:
|
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// - we can ignore the possiblity of `f` being unset (null) because of the safety contract of `allocate_alarm`.
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// - other than that we only store valid function pointers into alarm.callback
|
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let f: fn(*mut ()) = unsafe { mem::transmute(alarm.callback.get()) };
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f(alarm.ctx.get());
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}
|
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}
|
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|
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impl Driver for TimerDriverEmbassy {
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fn now(&self) -> u64 {
|
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if SCALE.get().is_none() {
|
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return 0;
|
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}
|
||||
let mut period1: u32;
|
||||
let mut period2: u32;
|
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let mut counter_val: u32;
|
||||
|
||||
loop {
|
||||
// Acquire ensures that we get the latest value of `periods` and
|
||||
// no instructions can be reordered before the load.
|
||||
period1 = self.periods.load(Ordering::Acquire);
|
||||
|
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counter_val = u32::MAX - timekeeping_tim().cnt_value().read().bits();
|
||||
|
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// Double read to protect against race conditions when the counter is overflowing.
|
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period2 = self.periods.load(Ordering::Relaxed);
|
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if period1 == period2 {
|
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let now = (((period1 as u64) << 32) | counter_val as u64) / *SCALE.get().unwrap();
|
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return now;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
unsafe fn allocate_alarm(&self) -> Option<AlarmHandle> {
|
||||
let id = self
|
||||
.alarm_count
|
||||
.fetch_update(Ordering::AcqRel, Ordering::Acquire, |x| {
|
||||
if x < ALARM_COUNT as u8 {
|
||||
Some(x + 1)
|
||||
} else {
|
||||
None
|
||||
}
|
||||
});
|
||||
|
||||
match id {
|
||||
Ok(id) => Some(AlarmHandle::new(id)),
|
||||
Err(_) => None,
|
||||
}
|
||||
}
|
||||
|
||||
fn set_alarm_callback(
|
||||
&self,
|
||||
alarm: embassy_time_driver::AlarmHandle,
|
||||
callback: fn(*mut ()),
|
||||
ctx: *mut (),
|
||||
) {
|
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critical_section::with(|cs| {
|
||||
let alarm = self.get_alarm(cs, alarm);
|
||||
|
||||
alarm.callback.set(callback as *const ());
|
||||
alarm.ctx.set(ctx);
|
||||
})
|
||||
}
|
||||
|
||||
fn set_alarm(&self, alarm: embassy_time_driver::AlarmHandle, timestamp: u64) -> bool {
|
||||
if SCALE.get().is_none() {
|
||||
return false;
|
||||
}
|
||||
critical_section::with(|cs| {
|
||||
let n = alarm.id();
|
||||
let alarm_tim = alarm_tim(n.into());
|
||||
alarm_tim.ctrl().modify(|_, w| {
|
||||
w.irq_enb().clear_bit();
|
||||
w.enable().clear_bit()
|
||||
});
|
||||
|
||||
let alarm = self.get_alarm(cs, alarm);
|
||||
alarm.timestamp.set(timestamp);
|
||||
|
||||
let t = self.now();
|
||||
if timestamp <= t {
|
||||
alarm.timestamp.set(u64::MAX);
|
||||
return false;
|
||||
}
|
||||
|
||||
// If it hasn't triggered yet, setup the relevant reset value, regardless of whether
|
||||
// the interrupts are enabled or not. When they are enabled at a later point, the
|
||||
// right value is already set.
|
||||
|
||||
// If the timestamp is in the next few ticks, add a bit of buffer to be sure the alarm
|
||||
// is not missed.
|
||||
//
|
||||
// This means that an alarm can be delayed for up to 2 ticks (from t+1 to t+3), but this is allowed
|
||||
// by the Alarm trait contract. What's not allowed is triggering alarms *before* their scheduled time,
|
||||
// and we don't do that here.
|
||||
let safe_timestamp = timestamp.max(t + 3);
|
||||
let timer_ticks = (safe_timestamp - t) * *SCALE.get().unwrap();
|
||||
alarm_tim.rst_value().write(|w| unsafe { w.bits(u32::MAX) });
|
||||
if timer_ticks <= u32::MAX as u64 {
|
||||
alarm_tim
|
||||
.cnt_value()
|
||||
.write(|w| unsafe { w.bits(timer_ticks as u32) });
|
||||
alarm_tim.ctrl().modify(|_, w| w.irq_enb().set_bit());
|
||||
alarm_tim.enable().write(|w| unsafe { w.bits(1) });
|
||||
}
|
||||
// If it's too far in the future, don't enable timer yet.
|
||||
// It will be enabled later by `next_period`.
|
||||
|
||||
true
|
||||
})
|
||||
}
|
||||
}
|
30
examples/rtic/Cargo.toml
Normal file
30
examples/rtic/Cargo.toml
Normal file
@ -0,0 +1,30 @@
|
||||
[package]
|
||||
name = "rtic-example"
|
||||
version = "0.1.0"
|
||||
edition = "2021"
|
||||
|
||||
[dependencies]
|
||||
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
|
||||
cortex-m-rt = "0.7"
|
||||
embedded-hal = "1"
|
||||
embedded-io = "0.6"
|
||||
rtt-target = { version = "0.5" }
|
||||
# Even though we do not use this directly, we need to activate this feature explicitely
|
||||
# so that RTIC compiles because thumv6 does not have CAS operations natively.
|
||||
portable-atomic = { version = "1", features = ["unsafe-assume-single-core"]}
|
||||
panic-rtt-target = { version = "0.1" }
|
||||
|
||||
[dependencies.va108xx-hal]
|
||||
path = "../../va108xx-hal"
|
||||
|
||||
[dependencies.rtic]
|
||||
version = "2"
|
||||
features = ["thumbv6-backend"]
|
||||
|
||||
[dependencies.rtic-monotonics]
|
||||
version = "2"
|
||||
features = ["cortex-m-systick"]
|
||||
|
||||
[dependencies.rtic-sync]
|
||||
version = "1.3"
|
||||
features = ["defmt-03"]
|
@ -14,14 +14,13 @@
|
||||
mod app {
|
||||
use embedded_io::Write;
|
||||
use panic_rtt_target as _;
|
||||
use rtic_monotonics::systick::Systick;
|
||||
use rtic_example::SYSCLK_FREQ;
|
||||
use rtic_sync::make_channel;
|
||||
use rtt_target::{rprintln, rtt_init_print};
|
||||
use va108xx_hal::{
|
||||
gpio::PinsB,
|
||||
pac,
|
||||
prelude::*,
|
||||
time::Hertz,
|
||||
uart::{self, IrqCfg, IrqResult, UartWithIrqBase},
|
||||
};
|
||||
|
||||
@ -44,19 +43,14 @@ mod app {
|
||||
pub timeout: bool,
|
||||
}
|
||||
|
||||
rtic_monotonics::systick_monotonic!(Mono, 1_000);
|
||||
|
||||
#[init]
|
||||
fn init(cx: init::Context) -> (Shared, Local) {
|
||||
rtt_init_print!();
|
||||
//set_print_channel(channels.up.0);
|
||||
rprintln!("-- VA108xx UART IRQ example application--");
|
||||
|
||||
// Initialize the systick interrupt & obtain the token to prove that we did
|
||||
let systick_mono_token = rtic_monotonics::create_systick_token!();
|
||||
Systick::start(
|
||||
cx.core.SYST,
|
||||
Hertz::from(50.MHz()).raw(),
|
||||
systick_mono_token,
|
||||
);
|
||||
Mono::start(cx.core.SYST, SYSCLK_FREQ.raw());
|
||||
|
||||
let mut dp = cx.device;
|
||||
let gpiob = PinsB::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.portb);
|
||||
@ -74,7 +68,6 @@ mod app {
|
||||
|
||||
let (rx_info_tx, rx_info_rx) = make_channel!(RxInfo, 3);
|
||||
let rx_buf: [u8; 64] = [0; 64];
|
||||
//reply_handler::spawn().expect("spawning reply handler failed");
|
||||
(
|
||||
Shared { irq_uart, rx_buf },
|
||||
Local {
|
||||
@ -112,8 +105,8 @@ mod app {
|
||||
.expect("Read operation init failed");
|
||||
|
||||
let mut end_idx = 0;
|
||||
for idx in 0..rx_buf.len() {
|
||||
if (rx_buf[idx] as char) == '\n' {
|
||||
for (idx, val) in rx_buf.iter().enumerate() {
|
||||
if (*val as char) == '\n' {
|
||||
end_idx = idx;
|
||||
break;
|
||||
}
|
4
examples/rtic/src/lib.rs
Normal file
4
examples/rtic/src/lib.rs
Normal file
@ -0,0 +1,4 @@
|
||||
#![no_std]
|
||||
use va108xx_hal::time::Hertz;
|
||||
|
||||
pub const SYSCLK_FREQ: Hertz = Hertz::from_raw(50_000_000);
|
71
examples/rtic/src/main.rs
Normal file
71
examples/rtic/src/main.rs
Normal file
@ -0,0 +1,71 @@
|
||||
//! RTIC minimal blinky
|
||||
#![no_main]
|
||||
#![no_std]
|
||||
|
||||
#[rtic::app(device = pac, dispatchers = [OC31, OC30, OC29])]
|
||||
mod app {
|
||||
use cortex_m::asm;
|
||||
use embedded_hal::digital::StatefulOutputPin;
|
||||
use panic_rtt_target as _;
|
||||
use rtic_example::SYSCLK_FREQ;
|
||||
use rtic_monotonics::systick::prelude::*;
|
||||
use rtic_monotonics::Monotonic;
|
||||
use rtt_target::{rprintln, rtt_init_print};
|
||||
use va108xx_hal::{
|
||||
gpio::{OutputReadablePushPull, Pin, PinsA, PA10, PA6, PA7},
|
||||
pac,
|
||||
};
|
||||
|
||||
#[local]
|
||||
struct Local {
|
||||
led0: Pin<PA10, OutputReadablePushPull>,
|
||||
led1: Pin<PA7, OutputReadablePushPull>,
|
||||
led2: Pin<PA6, OutputReadablePushPull>,
|
||||
}
|
||||
|
||||
#[shared]
|
||||
struct Shared {}
|
||||
|
||||
rtic_monotonics::systick_monotonic!(Mono, 1_000);
|
||||
|
||||
#[init]
|
||||
fn init(mut cx: init::Context) -> (Shared, Local) {
|
||||
rtt_init_print!();
|
||||
rprintln!("-- Vorago VA108xx RTIC template --");
|
||||
|
||||
Mono::start(cx.core.SYST, SYSCLK_FREQ.raw());
|
||||
|
||||
let porta = PinsA::new(
|
||||
&mut cx.device.sysconfig,
|
||||
Some(cx.device.ioconfig),
|
||||
cx.device.porta,
|
||||
);
|
||||
let led0 = porta.pa10.into_readable_push_pull_output();
|
||||
let led1 = porta.pa7.into_readable_push_pull_output();
|
||||
let led2 = porta.pa6.into_readable_push_pull_output();
|
||||
blinky::spawn().ok();
|
||||
(Shared {}, Local { led0, led1, led2 })
|
||||
}
|
||||
|
||||
// `shared` cannot be accessed from this context
|
||||
#[idle]
|
||||
fn idle(_cx: idle::Context) -> ! {
|
||||
loop {
|
||||
asm::nop();
|
||||
}
|
||||
}
|
||||
|
||||
#[task(
|
||||
priority = 3,
|
||||
local=[led0, led1, led2],
|
||||
)]
|
||||
async fn blinky(cx: blinky::Context) {
|
||||
loop {
|
||||
rprintln!("toggling LEDs");
|
||||
cx.local.led0.toggle().ok();
|
||||
cx.local.led1.toggle().ok();
|
||||
cx.local.led2.toggle().ok();
|
||||
Mono::delay(1000.millis()).await;
|
||||
}
|
||||
}
|
||||
}
|
@ -4,30 +4,17 @@ version = "0.1.0"
|
||||
edition = "2021"
|
||||
|
||||
[dependencies]
|
||||
panic-halt = "0.2"
|
||||
cortex-m = {version = "0.7", features = ["critical-section-single-core"]}
|
||||
panic-rtt-target = "0.1"
|
||||
cortex-m-rt = "0.7"
|
||||
panic-halt = "0.2"
|
||||
panic-rtt-target = "0.1"
|
||||
critical-section = "1"
|
||||
rtt-target = "0.5"
|
||||
rtic-sync = { version = "1.3", features = ["defmt-03"] }
|
||||
embedded-hal = "1"
|
||||
embedded-hal-nb = "1"
|
||||
embedded-io = "0.6"
|
||||
cortex-m-semihosting = "0.5.0"
|
||||
# I'd really like to use those, but it is tricky without probe-rs..
|
||||
# defmt = "0.3"
|
||||
# defmt-brtt = { version = "0.1", default-features = false, features = ["rtt"] }
|
||||
# panic-probe = { version = "0.3", features = ["print-defmt"] }
|
||||
|
||||
[dependencies.rtic]
|
||||
version = "2"
|
||||
features = ["thumbv6-backend"]
|
||||
|
||||
[dependencies.rtic-monotonics]
|
||||
version = "1"
|
||||
features = ["cortex-m-systick"]
|
||||
|
||||
[dependencies.va108xx-hal]
|
||||
version = "0.7"
|
||||
path = "../../va108xx-hal"
|
||||
features = ["rt", "defmt"]
|
||||
|
@ -48,7 +48,7 @@ fn main() -> ! {
|
||||
let mut cascade_target_1 =
|
||||
CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim4).auto_deactivate(true);
|
||||
cascade_target_1
|
||||
.cascade_0_source(CascadeSource::TimBase, Some(3))
|
||||
.cascade_0_source(CascadeSource::Tim(3))
|
||||
.expect("Configuring cascade source for TIM4 failed");
|
||||
let mut csd_cfg = CascadeCtrl {
|
||||
enb_start_src_csd0: true,
|
||||
@ -75,7 +75,7 @@ fn main() -> ! {
|
||||
CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim5).auto_deactivate(true);
|
||||
// Set TIM4 as cascade source
|
||||
cascade_target_2
|
||||
.cascade_1_source(CascadeSource::TimBase, Some(4))
|
||||
.cascade_1_source(CascadeSource::Tim(4))
|
||||
.expect("Configuring cascade source for TIM5 failed");
|
||||
|
||||
csd_cfg = CascadeCtrl::default();
|
||||
|
@ -3,8 +3,8 @@
|
||||
#![no_std]
|
||||
|
||||
use core::cell::Cell;
|
||||
use cortex_m::interrupt::Mutex;
|
||||
use cortex_m_rt::entry;
|
||||
use critical_section::Mutex;
|
||||
use panic_rtt_target as _;
|
||||
use rtt_target::{rprintln, rtt_init_print};
|
||||
use va108xx_hal::{
|
||||
@ -83,11 +83,12 @@ fn main() -> ! {
|
||||
}
|
||||
}
|
||||
loop {
|
||||
let current_ms = cortex_m::interrupt::free(|cs| MS_COUNTER.borrow(cs).get());
|
||||
let current_ms = critical_section::with(|cs| MS_COUNTER.borrow(cs).get());
|
||||
if current_ms - last_ms >= 1000 {
|
||||
last_ms = current_ms;
|
||||
// To prevent drift.
|
||||
last_ms += 1000;
|
||||
rprintln!("MS counter: {}", current_ms);
|
||||
let second = cortex_m::interrupt::free(|cs| SEC_COUNTER.borrow(cs).get());
|
||||
let second = critical_section::with(|cs| SEC_COUNTER.borrow(cs).get());
|
||||
rprintln!("Second counter: {}", second);
|
||||
}
|
||||
cortex_m::asm::delay(10000);
|
||||
@ -110,7 +111,7 @@ fn OC0() {
|
||||
#[interrupt]
|
||||
#[allow(non_snake_case)]
|
||||
fn OC1() {
|
||||
cortex_m::interrupt::free(|cs| {
|
||||
critical_section::with(|cs| {
|
||||
let mut sec = SEC_COUNTER.borrow(cs).get();
|
||||
sec += 1;
|
||||
SEC_COUNTER.borrow(cs).set(sec);
|
||||
|
@ -6,6 +6,11 @@ All notable changes to this project will be documented in this file.
|
||||
The format is based on [Keep a Changelog](http://keepachangelog.com/)
|
||||
and this project adheres to [Semantic Versioning](http://semver.org/).
|
||||
|
||||
## [unreleased]
|
||||
|
||||
- Improves `CascardSource` handling and general API when chosing cascade sources.
|
||||
- Replaced `utility::unmask_irq` by `enable_interrupt` and `disable_interrupt` API.
|
||||
|
||||
## [v0.7.0] 2024-07-04
|
||||
|
||||
- Replace `uarta` and `uartb` `Uart` constructors by `new` constructor
|
||||
|
@ -19,7 +19,7 @@ embedded-hal-nb = "1"
|
||||
embedded-io = "0.6"
|
||||
fugit = "0.3"
|
||||
typenum = "1"
|
||||
defmt = { version = "0.3", optional = true }
|
||||
critical-section = "1"
|
||||
delegate = "0.12"
|
||||
|
||||
[dependencies.va108xx]
|
||||
@ -38,9 +38,14 @@ default-features = false
|
||||
version = "1.14"
|
||||
default-features = false
|
||||
|
||||
[dependencies.defmt]
|
||||
version = "0.3"
|
||||
optional = true
|
||||
|
||||
[features]
|
||||
default = ["rt"]
|
||||
rt = ["va108xx/rt"]
|
||||
defmt = ["dep:defmt", "fugit/defmt"]
|
||||
|
||||
[package.metadata.docs.rs]
|
||||
all-features = true
|
||||
|
@ -15,7 +15,6 @@ pub mod time;
|
||||
pub mod timer;
|
||||
pub mod typelevel;
|
||||
pub mod uart;
|
||||
pub mod utility;
|
||||
|
||||
#[derive(Debug, Eq, Copy, Clone, PartialEq)]
|
||||
pub enum FunSel {
|
||||
@ -98,3 +97,21 @@ pub fn port_mux(
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// Enable a specific interrupt using the NVIC peripheral.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// This function is `unsafe` because it can break mask-based critical sections.
|
||||
#[inline]
|
||||
pub unsafe fn enable_interrupt(irq: pac::Interrupt) {
|
||||
unsafe {
|
||||
cortex_m::peripheral::NVIC::unmask(irq);
|
||||
}
|
||||
}
|
||||
|
||||
/// Disable a specific interrupt using the NVIC peripheral.
|
||||
#[inline]
|
||||
pub fn disable_interrupt(irq: pac::Interrupt) {
|
||||
cortex_m::peripheral::NVIC::mask(irq);
|
||||
}
|
||||
|
@ -7,6 +7,7 @@
|
||||
pub use crate::IrqCfg;
|
||||
use crate::{
|
||||
clock::{enable_peripheral_clock, PeripheralClocks},
|
||||
enable_interrupt,
|
||||
gpio::{
|
||||
AltFunc1, AltFunc2, AltFunc3, DynPinId, Pin, PinId, PA0, PA1, PA10, PA11, PA12, PA13, PA14,
|
||||
PA15, PA2, PA24, PA25, PA26, PA27, PA28, PA29, PA3, PA30, PA31, PA4, PA5, PA6, PA7, PA8,
|
||||
@ -17,10 +18,9 @@ use crate::{
|
||||
time::Hertz,
|
||||
timer,
|
||||
typelevel::Sealed,
|
||||
utility::unmask_irq,
|
||||
};
|
||||
use core::cell::Cell;
|
||||
use cortex_m::interrupt::Mutex;
|
||||
use critical_section::Mutex;
|
||||
use fugit::RateExtU32;
|
||||
|
||||
const IRQ_DST_NONE: u32 = 0xffffffff;
|
||||
@ -72,25 +72,46 @@ pub enum CascadeSel {
|
||||
Csd2 = 2,
|
||||
}
|
||||
|
||||
#[derive(Debug, PartialEq, Eq)]
|
||||
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||
pub struct InvalidCascadeSourceId;
|
||||
|
||||
/// The numbers are the base numbers for bundles like PORTA, PORTB or TIM
|
||||
#[derive(Debug, PartialEq, Eq)]
|
||||
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||
#[repr(u8)]
|
||||
pub enum CascadeSource {
|
||||
PortABase = 0,
|
||||
PortBBase = 32,
|
||||
TimBase = 64,
|
||||
PortA(u8),
|
||||
PortB(u8),
|
||||
Tim(u8),
|
||||
RamSbe = 96,
|
||||
RamMbe = 97,
|
||||
RomSbe = 98,
|
||||
RomMbe = 99,
|
||||
Txev = 100,
|
||||
ClockDividerBase = 120,
|
||||
ClockDivider(u8),
|
||||
}
|
||||
|
||||
#[derive(Debug, PartialEq, Eq)]
|
||||
pub enum TimerErrors {
|
||||
Canceled,
|
||||
/// Invalid input for Cascade source
|
||||
InvalidCsdSourceInput,
|
||||
impl CascadeSource {
|
||||
fn id(&self) -> Result<u8, InvalidCascadeSourceId> {
|
||||
let port_check = |base: u8, id: u8, len: u8| {
|
||||
if id > len - 1 {
|
||||
return Err(InvalidCascadeSourceId);
|
||||
}
|
||||
Ok(base + id)
|
||||
};
|
||||
match self {
|
||||
CascadeSource::PortA(id) => port_check(0, *id, 32),
|
||||
CascadeSource::PortB(id) => port_check(32, *id, 32),
|
||||
CascadeSource::Tim(id) => port_check(64, *id, 24),
|
||||
CascadeSource::RamSbe => Ok(96),
|
||||
CascadeSource::RamMbe => Ok(97),
|
||||
CascadeSource::RomSbe => Ok(98),
|
||||
CascadeSource::RomMbe => Ok(99),
|
||||
CascadeSource::Txev => Ok(100),
|
||||
CascadeSource::ClockDivider(id) => port_check(120, *id, 8),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//==================================================================================================
|
||||
@ -360,89 +381,26 @@ pub struct CountDownTimer<TIM: ValidTim> {
|
||||
listening: bool,
|
||||
}
|
||||
|
||||
fn enable_tim_clk(syscfg: &mut pac::Sysconfig, idx: u8) {
|
||||
#[inline(always)]
|
||||
pub fn enable_tim_clk(syscfg: &mut pac::Sysconfig, idx: u8) {
|
||||
syscfg
|
||||
.tim_clk_enable()
|
||||
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << idx)) });
|
||||
}
|
||||
|
||||
#[inline(always)]
|
||||
pub fn disable_tim_clk(syscfg: &mut pac::Sysconfig, idx: u8) {
|
||||
syscfg
|
||||
.tim_clk_enable()
|
||||
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << idx)) });
|
||||
}
|
||||
|
||||
unsafe impl<TIM: ValidTim> TimRegInterface for CountDownTimer<TIM> {
|
||||
fn tim_id(&self) -> u8 {
|
||||
TIM::TIM_ID
|
||||
}
|
||||
}
|
||||
|
||||
macro_rules! csd_sel {
|
||||
($func_name:ident, $csd_reg:ident) => {
|
||||
/// Configure the Cascade sources
|
||||
pub fn $func_name(
|
||||
&mut self,
|
||||
src: CascadeSource,
|
||||
id: Option<u8>,
|
||||
) -> Result<(), TimerErrors> {
|
||||
let mut id_num = 0;
|
||||
if let CascadeSource::PortABase
|
||||
| CascadeSource::PortBBase
|
||||
| CascadeSource::ClockDividerBase
|
||||
| CascadeSource::TimBase = src
|
||||
{
|
||||
if id.is_none() {
|
||||
return Err(TimerErrors::InvalidCsdSourceInput);
|
||||
}
|
||||
}
|
||||
if id.is_some() {
|
||||
id_num = id.unwrap();
|
||||
}
|
||||
match src {
|
||||
CascadeSource::PortABase => {
|
||||
if id_num > 55 {
|
||||
return Err(TimerErrors::InvalidCsdSourceInput);
|
||||
}
|
||||
self.tim.reg().$csd_reg().write(|w| unsafe {
|
||||
w.cassel().bits(CascadeSource::PortABase as u8 + id_num)
|
||||
});
|
||||
Ok(())
|
||||
}
|
||||
CascadeSource::PortBBase => {
|
||||
if id_num > 23 {
|
||||
return Err(TimerErrors::InvalidCsdSourceInput);
|
||||
}
|
||||
self.tim.reg().$csd_reg().write(|w| unsafe {
|
||||
w.cassel().bits(CascadeSource::PortBBase as u8 + id_num)
|
||||
});
|
||||
Ok(())
|
||||
}
|
||||
CascadeSource::TimBase => {
|
||||
if id_num > 23 {
|
||||
return Err(TimerErrors::InvalidCsdSourceInput);
|
||||
}
|
||||
self.tim.reg().$csd_reg().write(|w| unsafe {
|
||||
w.cassel().bits(CascadeSource::TimBase as u8 + id_num)
|
||||
});
|
||||
Ok(())
|
||||
}
|
||||
CascadeSource::ClockDividerBase => {
|
||||
if id_num > 7 {
|
||||
return Err(TimerErrors::InvalidCsdSourceInput);
|
||||
}
|
||||
self.tim.reg().cascade0().write(|w| unsafe {
|
||||
w.cassel()
|
||||
.bits(CascadeSource::ClockDividerBase as u8 + id_num)
|
||||
});
|
||||
Ok(())
|
||||
}
|
||||
_ => {
|
||||
self.tim
|
||||
.reg()
|
||||
.$csd_reg()
|
||||
.write(|w| unsafe { w.cassel().bits(src as u8) });
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
impl<TIM: ValidTim> CountDownTimer<TIM> {
|
||||
/// Configures a TIM peripheral as a periodic count down timer
|
||||
pub fn new(syscfg: &mut pac::Sysconfig, sys_clk: impl Into<Hertz>, tim: TIM) -> Self {
|
||||
@ -554,18 +512,18 @@ impl<TIM: ValidTim> CountDownTimer<TIM> {
|
||||
|
||||
#[inline(always)]
|
||||
pub fn enable(&mut self) {
|
||||
self.tim.reg().ctrl().modify(|_, w| w.enable().set_bit());
|
||||
if let Some(irq_cfg) = self.irq_cfg {
|
||||
self.enable_interrupt();
|
||||
if irq_cfg.enable {
|
||||
unmask_irq(irq_cfg.irq);
|
||||
unsafe { enable_interrupt(irq_cfg.irq) };
|
||||
}
|
||||
}
|
||||
self.tim.reg().enable().write(|w| unsafe { w.bits(1) });
|
||||
}
|
||||
|
||||
#[inline(always)]
|
||||
pub fn disable(&mut self) {
|
||||
self.tim.reg().ctrl().modify(|_, w| w.enable().clear_bit());
|
||||
self.tim.reg().enable().write(|w| unsafe { w.bits(0) });
|
||||
}
|
||||
|
||||
/// Disable the counter, setting both enable and active bit to 0
|
||||
@ -619,9 +577,32 @@ impl<TIM: ValidTim> CountDownTimer<TIM> {
|
||||
});
|
||||
}
|
||||
|
||||
csd_sel!(cascade_0_source, cascade0);
|
||||
csd_sel!(cascade_1_source, cascade1);
|
||||
csd_sel!(cascade_2_source, cascade2);
|
||||
pub fn cascade_0_source(&mut self, src: CascadeSource) -> Result<(), InvalidCascadeSourceId> {
|
||||
let id = src.id()?;
|
||||
self.tim
|
||||
.reg()
|
||||
.cascade0()
|
||||
.write(|w| unsafe { w.cassel().bits(id) });
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub fn cascade_1_source(&mut self, src: CascadeSource) -> Result<(), InvalidCascadeSourceId> {
|
||||
let id = src.id()?;
|
||||
self.tim
|
||||
.reg()
|
||||
.cascade1()
|
||||
.write(|w| unsafe { w.cassel().bits(id) });
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub fn cascade_2_source(&mut self, src: CascadeSource) -> Result<(), InvalidCascadeSourceId> {
|
||||
let id = src.id()?;
|
||||
self.tim
|
||||
.reg()
|
||||
.cascade2()
|
||||
.write(|w| unsafe { w.cassel().bits(id) });
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub fn curr_freq(&self) -> Hertz {
|
||||
self.curr_freq
|
||||
@ -656,12 +637,13 @@ impl<TIM: ValidTim> CountDownTimer<TIM> {
|
||||
}
|
||||
}
|
||||
|
||||
pub fn cancel(&mut self) -> Result<(), TimerErrors> {
|
||||
/// Returns [false] if the timer was not active, and true otherwise.
|
||||
pub fn cancel(&mut self) -> bool {
|
||||
if !self.tim.reg().ctrl().read().enable().bit_is_set() {
|
||||
return Err(TimerErrors::Canceled);
|
||||
return false;
|
||||
}
|
||||
self.tim.reg().ctrl().write(|w| w.enable().clear_bit());
|
||||
Ok(())
|
||||
true
|
||||
}
|
||||
}
|
||||
|
||||
@ -747,7 +729,7 @@ pub fn set_up_ms_delay_provider<TIM: ValidTim>(
|
||||
/// This function can be called in a specified interrupt handler to increment
|
||||
/// the MS counter
|
||||
pub fn default_ms_irq_handler() {
|
||||
cortex_m::interrupt::free(|cs| {
|
||||
critical_section::with(|cs| {
|
||||
let mut ms = MS_COUNTER.borrow(cs).get();
|
||||
ms += 1;
|
||||
MS_COUNTER.borrow(cs).set(ms);
|
||||
@ -756,7 +738,7 @@ pub fn default_ms_irq_handler() {
|
||||
|
||||
/// Get the current MS tick count
|
||||
pub fn get_ms_ticks() -> u32 {
|
||||
cortex_m::interrupt::free(|cs| MS_COUNTER.borrow(cs).get())
|
||||
critical_section::with(|cs| MS_COUNTER.borrow(cs).get())
|
||||
}
|
||||
|
||||
//==================================================================================================
|
||||
|
@ -3,7 +3,7 @@
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples/simple/examples/uart.rs)
|
||||
//! - [UART with IRQ and RTIC](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples/simple/examples/uart-irq-rtic.rs)
|
||||
//! - [UART with IRQ and RTIC](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples/rtic/bin/uart-rtic.rs)
|
||||
use core::{marker::PhantomData, ops::Deref};
|
||||
use embedded_hal_nb::serial::Read;
|
||||
use fugit::RateExtU32;
|
||||
@ -11,13 +11,13 @@ use fugit::RateExtU32;
|
||||
pub use crate::IrqCfg;
|
||||
use crate::{
|
||||
clock::{enable_peripheral_clock, PeripheralClocks},
|
||||
enable_interrupt,
|
||||
gpio::pin::{
|
||||
AltFunc1, AltFunc2, AltFunc3, Pin, PA16, PA17, PA18, PA19, PA2, PA26, PA27, PA3, PA30,
|
||||
PA31, PA8, PA9, PB18, PB19, PB20, PB21, PB22, PB23, PB6, PB7, PB8, PB9,
|
||||
},
|
||||
pac::{self, uarta as uart_base},
|
||||
time::Hertz,
|
||||
utility::unmask_irq,
|
||||
PeripheralSelect,
|
||||
};
|
||||
|
||||
@ -638,7 +638,7 @@ impl Instance for pac::Uartb {
|
||||
const PERIPH_SEL: PeripheralSelect = PeripheralSelect::Uart1;
|
||||
}
|
||||
|
||||
impl<UART: Instance> UartWithIrqBase<UART> {
|
||||
impl<Uart: Instance> UartWithIrqBase<Uart> {
|
||||
fn init(self, sys_cfg: Option<&mut pac::Sysconfig>, irq_sel: Option<&mut pac::Irqsel>) -> Self {
|
||||
if let Some(sys_cfg) = sys_cfg {
|
||||
enable_peripheral_clock(sys_cfg, PeripheralClocks::Irqsel)
|
||||
@ -646,7 +646,7 @@ impl<UART: Instance> UartWithIrqBase<UART> {
|
||||
if let Some(irq_sel) = irq_sel {
|
||||
if self.irq_info.irq_cfg.route {
|
||||
irq_sel
|
||||
.uart0(UART::IDX as usize)
|
||||
.uart0(Uart::IDX as usize)
|
||||
.write(|w| unsafe { w.bits(self.irq_info.irq_cfg.irq as u32) });
|
||||
}
|
||||
}
|
||||
@ -676,7 +676,9 @@ impl<UART: Instance> UartWithIrqBase<UART> {
|
||||
self.uart.enable_tx();
|
||||
self.enable_rx_irq_sources(enb_timeout_irq);
|
||||
if self.irq_info.irq_cfg.enable {
|
||||
unmask_irq(self.irq_info.irq_cfg.irq);
|
||||
unsafe {
|
||||
enable_interrupt(self.irq_info.irq_cfg.irq);
|
||||
}
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
@ -839,7 +841,7 @@ impl<UART: Instance> UartWithIrqBase<UART> {
|
||||
self.irq_info.rx_len = 0;
|
||||
}
|
||||
|
||||
pub fn release(self) -> UART {
|
||||
pub fn release(self) -> Uart {
|
||||
self.uart.release()
|
||||
}
|
||||
}
|
||||
|
@ -1,16 +0,0 @@
|
||||
//! # API for utility functions like the Error Detection and Correction (EDAC) block
|
||||
//!
|
||||
//! Some more information about the recommended scrub rates can be found on the
|
||||
//! [Vorago White Paper website](https://www.voragotech.com/resources) in the
|
||||
//! application note AN1212
|
||||
use crate::pac;
|
||||
|
||||
/// Unmask and enable an IRQ with the given interrupt number
|
||||
///
|
||||
/// ## Safety
|
||||
///
|
||||
/// The unmask function can break mask-based critical sections
|
||||
#[inline]
|
||||
pub(crate) fn unmask_irq(irq: pac::Interrupt) {
|
||||
unsafe { cortex_m::peripheral::NVIC::unmask(irq) };
|
||||
}
|
@ -20,7 +20,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -44,7 +44,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -68,7 +68,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -92,7 +92,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -116,7 +116,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -129,7 +129,7 @@
|
||||
{
|
||||
"type": "cortex-debug",
|
||||
"request": "launch",
|
||||
"name": "Debug UART",
|
||||
"name": "UART Example",
|
||||
"servertype": "jlink",
|
||||
"cwd": "${workspaceRoot}",
|
||||
"device": "Cortex-M0",
|
||||
@ -140,7 +140,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -164,7 +164,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -188,7 +188,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -212,7 +212,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -236,7 +236,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -284,7 +284,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -321,7 +321,7 @@
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
@ -340,12 +340,60 @@
|
||||
"device": "Cortex-M0",
|
||||
"svdFile": "./va108xx/svd/va108xx.svd.patched",
|
||||
"preLaunchTask": "rust: cargo build uart irq",
|
||||
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/examples/uart-irq-rtic",
|
||||
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/uart-rtic",
|
||||
"interface": "jtag",
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "0x10000000",
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
"timestamp": true,
|
||||
"type": "console"
|
||||
}
|
||||
]
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "cortex-debug",
|
||||
"request": "launch",
|
||||
"name": "RTIC Example",
|
||||
"servertype": "jlink",
|
||||
"cwd": "${workspaceRoot}",
|
||||
"device": "Cortex-M0",
|
||||
"svdFile": "./va108xx/svd/va108xx.svd.patched",
|
||||
"preLaunchTask": "rtic-example",
|
||||
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/rtic-example",
|
||||
"interface": "jtag",
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
"timestamp": true,
|
||||
"type": "console"
|
||||
}
|
||||
]
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "cortex-debug",
|
||||
"request": "launch",
|
||||
"name": "Embassy Example",
|
||||
"servertype": "jlink",
|
||||
"cwd": "${workspaceRoot}",
|
||||
"device": "Cortex-M0",
|
||||
"svdFile": "./va108xx/svd/va108xx.svd.patched",
|
||||
"preLaunchTask": "embassy-example",
|
||||
"executable": "${workspaceFolder}/target/thumbv6m-none-eabi/debug/embassy-example",
|
||||
"interface": "jtag",
|
||||
"runToEntryPoint": "main",
|
||||
"rttConfig": {
|
||||
"enabled": true,
|
||||
"address": "auto",
|
||||
"decoders": [
|
||||
{
|
||||
"port": 0,
|
||||
|
@ -67,8 +67,6 @@
|
||||
"command": "~/.cargo/bin/cargo", // note: full path to the cargo
|
||||
"args": [
|
||||
"build",
|
||||
"-p",
|
||||
"va108xx-hal",
|
||||
"--example",
|
||||
"uart",
|
||||
],
|
||||
@ -129,10 +127,8 @@
|
||||
"command": "~/.cargo/bin/cargo", // note: full path to the cargo
|
||||
"args": [
|
||||
"build",
|
||||
"--example",
|
||||
"uart-irq-rtic",
|
||||
"--features",
|
||||
"rt"
|
||||
"--bin",
|
||||
"uart-rtic",
|
||||
],
|
||||
"group": {
|
||||
"kind": "build",
|
||||
@ -248,5 +244,25 @@
|
||||
"isDefault": true
|
||||
}
|
||||
},
|
||||
{
|
||||
"label": "rtic-example",
|
||||
"type": "shell",
|
||||
"command": "~/.cargo/bin/cargo", // note: full path to the cargo
|
||||
"args": [
|
||||
"build",
|
||||
"--bin",
|
||||
"rtic-example",
|
||||
],
|
||||
},
|
||||
{
|
||||
"label": "embassy-example",
|
||||
"type": "shell",
|
||||
"command": "~/.cargo/bin/cargo", // note: full path to the cargo
|
||||
"args": [
|
||||
"build",
|
||||
"--bin",
|
||||
"embassy-example",
|
||||
],
|
||||
},
|
||||
]
|
||||
}
|
Loading…
Reference in New Issue
Block a user