7 Commits

Author SHA1 Message Date
41a59eabeb Merge pull request 'updated flashloader test applications' (#74) from update-flashloader-testapps into main
Reviewed-on: #74
2025-05-12 14:49:49 +02:00
0774ea85e3 Merge branch 'main' into update-flashloader-testapps 2025-05-12 14:49:45 +02:00
4114878e98 updated flashloader test applications 2025-05-12 14:44:45 +02:00
3d240d5481 README tweak 2025-04-24 22:46:32 +02:00
6583064454 small note on shared periph crate 2025-04-24 22:45:15 +02:00
f2e39993ed Merge pull request 'Rework of library structure' (#73) from rework-typestate-introduce-shared-peripherals into main
Reviewed-on: #73
2025-04-24 22:41:13 +02:00
58934e293f Rework library structure
Changed:

- Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs)
  which is mostly re-exported in this crate.
- All HAL API constructors now have a more consistent argument order: PAC structures and resource
  management structures first, then clock configuration, then any other configuration.
- Overhaul and simplification of several HAL APIs. The system configuration and IRQ router
  peripheral instance generally does not need to be passed to HAL API anymore.
- All HAL drivers are now type erased. The constructors will still expect and consume the PAC
  singleton component for resource management purposes, but are not cached anymore.
- Refactoring of GPIO library to be more inline with embassy GPIO API.

Added:

- I2C clock timeout feature support.
2025-04-24 22:33:46 +02:00
16 changed files with 40 additions and 63 deletions

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@ -34,6 +34,9 @@ It also contains the following helper crates:
[`RTIC`](https://rtic.rs/2/book/en/) and [`embassy`](https://github.com/embassy-rs/embassy)
native Rust RTOSes.
The majority of the HAL implementation and the Embassy-rs support are contained in the external
[`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) crate.
## Using the `.cargo/config.toml` file
Use the following command to have a starting `config.toml` file

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@ -35,6 +35,7 @@ enum TestCase {
Pulse,
// Tie PA0, PA1 and PA3 to an oscilloscope
DelayGpio,
// PA0 can be checked with an oscillsope to verify timing correctness.
DelayMs,
}
@ -121,8 +122,6 @@ fn main() -> ! {
assert_eq!(mmio_porta.read_perid(), 0x004007e1);
}
TestCase::Pulse => {
// TODO: Fix
/*
let mut output_pulsed = Output::new(pinsa.pa0, PinState::Low);
output_pulsed.configure_pulse_mode(true, PinState::Low);
defmt::info!("Pulsing high 10 times..");
@ -132,21 +131,18 @@ fn main() -> ! {
cortex_m::asm::delay(25_000_000);
}
output_pulsed.configure_pulse_mode(true, PinState::High);
rprintln!("Pulsing low 10 times..");
defmt::info!("Pulsing low 10 times..");
for _ in 0..10 {
output_pulsed.set_low();
cortex_m::asm::delay(25_000_000);
}
*/
}
TestCase::DelayGpio => {
// TODO: Fix
/*
let mut out_0 = pinsa.pa0.into_readable_push_pull_output();
let mut out_0 = Output::new(pinsa.pa0, PinState::Low);
out_0.configure_delay(true, false);
let mut out_1 = pinsa.pa1.into_readable_push_pull_output();
let mut out_1 = Output::new(pinsa.pa1, PinState::Low);
out_1.configure_delay(false, true);
let mut out_2 = pinsa.pa3.into_readable_push_pull_output();
let mut out_2 = Output::new(pinsa.pa3, PinState::Low);
out_2.configure_delay(true, true);
for _ in 0..20 {
out_0.toggle();
@ -154,7 +150,6 @@ fn main() -> ! {
out_2.toggle();
cortex_m::asm::delay(25_000_000);
}
*/
}
TestCase::DelayMs => {
let mut delay_timer = CountdownTimer::new(dp.tim1, 50.MHz());
@ -167,17 +162,16 @@ fn main() -> ! {
}
let ahb_freq: Hertz = 50.MHz();
let mut syst_delay = cortex_m::delay::Delay::new(cp.SYST, ahb_freq.raw());
// Test usecond delay using both TIM peripheral and SYST. Use the release image if you
// want to verify the timings!
loop {
pa0.toggle();
delay_timer.delay_us(50);
pa0.toggle();
delay_timer.delay_us(50);
// Release image should be used to verify timings for pin PA0
for _ in 0..5 {
pa0.toggle();
syst_delay.delay_us(50);
pa0.toggle();
syst_delay.delay_us(50);
pa0.toggle();
delay_timer.delay_us(50);
pa0.toggle();
delay_timer.delay_us(50);
}
}
}

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@ -12,8 +12,8 @@ The bootloader uses the following memory map:
| 0x0 | Bootloader start | code up to 0x2FFE bytes |
| 0x2FFE | Bootloader CRC | half-word |
| 0x3000 | App image A start | code up to 0xE7F4 (~59K) bytes |
| 0x117F8 | App image A CRC check length | word |
| 0x117FC | App image A CRC check value | word |
| 0x117F4 | App image A CRC check length | word |
| 0x117F8 | App image A CRC check value | word |
| 0x117FC | App image B start | code up to 0xE7F4 (~59K) bytes |
| 0x1FFF0 | App image B CRC check length | word |
| 0x1FFF4 | App image B CRC check value | word |

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@ -30,7 +30,7 @@ embassy-executor = { version = "0.7", features = [
]}
va108xx-hal = { version = "0.11", path = "../../va108xx-hal", features = ["defmt"] }
va108xx-embassy = { version = "0.2" }
va108xx-embassy = { version = "0.2", path = "../../va108xx-embassy" }
[features]
default = ["ticks-hz-1_000", "va108xx-embassy/irq-oc30-oc31"]

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@ -59,16 +59,10 @@ static CHANNEL_PB22_TO_PB23: Channel<ThreadModeRawMutex, GpioCmd, 3> = Channel::
async fn main(spawner: Spawner) {
defmt::println!("-- VA108xx Async GPIO Demo --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
// Safety: Only called once here.
va108xx_embassy::init(
&mut dp.sysconfig,
&dp.irqsel,
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
);
va108xx_embassy::init(dp.tim23, dp.tim22, SYSCLK_FREQ);
let porta = PinsA::new(dp.porta);
let portb = PinsB::new(dp.portb);

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@ -52,16 +52,10 @@ static CONSUMER_UART_B: Mutex<RefCell<Option<Consumer<u8, 256>>>> = Mutex::new(R
async fn main(spawner: Spawner) {
defmt::println!("-- VA108xx Async UART RX Demo --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
// Safety: Only called once here.
va108xx_embassy::init(
&mut dp.sysconfig,
&dp.irqsel,
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
);
va108xx_embassy::init(dp.tim23, dp.tim22, SYSCLK_FREQ);
let porta = PinsA::new(dp.porta);
let mut led0 = Output::new(porta.pa10, PinState::Low);

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@ -39,16 +39,10 @@ const STR_LIST: &[&str] = &[
async fn main(_spawner: Spawner) {
defmt::println!("-- VA108xx Async UART TX Demo --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
// Safety: Only called once here.
va108xx_embassy::init(
&mut dp.sysconfig,
&dp.irqsel,
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
);
va108xx_embassy::init(dp.tim23, dp.tim22, SYSCLK_FREQ);
let porta = PinsA::new(dp.porta);

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@ -26,23 +26,21 @@ const SYSCLK_FREQ: Hertz = Hertz::from_raw(50_000_000);
async fn main(_spawner: Spawner) {
defmt::println!("-- VA108xx Embassy Demo --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
// Safety: Only called once here.
cfg_if::cfg_if! {
if #[cfg(not(feature = "custom-irqs"))] {
va108xx_embassy::init(
&mut dp.sysconfig,
&dp.irqsel,
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
SYSCLK_FREQ,
);
} else {
va108xx_embassy::init_with_custom_irqs(
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
SYSCLK_FREQ,
pac::Interrupt::OC23,
pac::Interrupt::OC24,
);

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@ -10,7 +10,7 @@ cortex-m-rt = "0.7"
panic-rtt-target = { version = "0.1.3" }
rtt-target = { version = "0.5" }
embedded-hal = "1"
va108xx-hal = { version = "0.10.0" }
va108xx-hal = { version = "0.11" }
[profile.dev]
codegen-units = 1

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@ -3,7 +3,7 @@
#![no_std]
use cortex_m_rt::entry;
use embedded_hal::{delay::DelayNs, digital::StatefulOutputPin};
use embedded_hal::delay::DelayNs;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use va108xx_hal::{gpio::PinsA, pac, prelude::*, timer::CountdownTimer};
@ -15,11 +15,11 @@ fn main() -> ! {
let mut dp = pac::Peripherals::take().unwrap();
let mut timer = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim0);
let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
let porta = PinsA::new(&mut dp.sysconfig, dp.porta);
let mut led1 = porta.pa10.into_readable_push_pull_output();
loop {
led1.toggle().ok();
led1.toggle();
timer.delay_ms(500);
}
}

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@ -10,7 +10,7 @@ cortex-m-rt = "0.7"
panic-rtt-target = { version = "0.1.3" }
rtt-target = { version = "0.5" }
embedded-hal = "1"
va108xx-hal = { version = "0.10.0" }
va108xx-hal = { version = "0.11" }
[profile.dev]
codegen-units = 1

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@ -3,7 +3,7 @@
#![no_std]
use cortex_m_rt::entry;
use embedded_hal::{delay::DelayNs, digital::StatefulOutputPin};
use embedded_hal::delay::DelayNs;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use va108xx_hal::{gpio::PinsA, pac, prelude::*, timer::CountdownTimer};
@ -15,11 +15,11 @@ fn main() -> ! {
let mut dp = pac::Peripherals::take().unwrap();
let mut timer = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim0);
let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
let porta = PinsA::new(&mut dp.sysconfig, dp.porta);
let mut led2 = porta.pa7.into_readable_push_pull_output();
loop {
led2.toggle().ok();
led2.toggle();
timer.delay_ms(1000);
}
}

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@ -11,7 +11,7 @@ keywords = ["no-std", "hal", "cortex-m", "vorago", "va108xx"]
categories = ["aerospace", "embedded", "no-std", "hardware-support"]
[dependencies]
vorago-shared-periphs = { path = "../../vorago-shared-periphs", features = ["vor1x"] }
vorago-shared-periphs = { git = "https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs.git", features = ["vor1x"] }
va108xx-hal = { path = "../va108xx-hal" }
[features]

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@ -88,9 +88,9 @@ embassy_time_driver_irqs!(timekeeper_irq = OC29, alarm_irq = OC28);
/// default case.
#[cfg(feature = "irqs-in-lib")]
pub fn init<TimekeeperTim: TimMarker, AlarmTim: TimMarker>(
sysclk: Hertz,
timekeeper_tim: TimekeeperTim,
alarm_tim: AlarmTim,
sysclk: Hertz,
) {
time_driver().__init(sysclk, timekeeper_tim, alarm_tim, TIMEKEEPER_IRQ, ALARM_IRQ)
}
@ -99,9 +99,9 @@ pub fn init<TimekeeperTim: TimMarker, AlarmTim: TimMarker>(
///
/// Requires an explicit [pac::Interrupt] argument for the timekeeper and alarm IRQs.
pub fn init_with_custom_irqs<TimekeeperTim: TimMarker, AlarmTim: TimMarker>(
sysclk: Hertz,
timekeeper_tim: TimekeeperTim,
alarm_tim: AlarmTim,
sysclk: Hertz,
timekeeper_irq: pac::Interrupt,
alarm_irq: pac::Interrupt,
) {

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@ -12,7 +12,7 @@ categories = ["aerospace", "embedded", "no-std", "hardware-support"]
[dependencies]
cortex-m = { version = "0.7", features = ["critical-section-single-core"]}
vorago-shared-periphs = { path = "../../vorago-shared-periphs", features = ["vor1x"] }
vorago-shared-periphs = { git = "https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs.git", features = ["vor1x"] }
fugit = "0.3"
thiserror = { version = "2", default-features = false }
va108xx = { version = "0.5", default-features = false, features = ["critical-section", "defmt"] }

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@ -1,8 +1,8 @@
//! API for the SPI peripheral.
//!
//! The main abstraction provided by this module is the [Spi] an structure.
//! It provides the [embedded_hal::spi] traits, but also offer a low level interface
//! via the [SpiLowLevel] trait.
//! It provides the [SpiBus trait](https://docs.rs/embedded-hal/latest/embedded_hal/spi/trait.SpiBus.html),
//! but also offer a low level interface via the [SpiLowLevel] trait.
//!
//! ## Examples
//!