11 Commits

Author SHA1 Message Date
7b144b9022 Merge pull request 'patch release va108xx' (#76) from prep-va108xx-release into main
Reviewed-on: #76
2025-07-22 12:09:12 +02:00
Robin Mueller
a248947441 patch release va108xx 2025-07-22 12:08:37 +02:00
6017a52d2c Merge pull request 'update dependencies' (#75) from update-dependencies into main
Reviewed-on: #75
2025-07-22 12:05:37 +02:00
Robin Mueller
ec80f55b78 update dependencies 2025-07-22 11:23:15 +02:00
41a59eabeb Merge pull request 'updated flashloader test applications' (#74) from update-flashloader-testapps into main
Reviewed-on: #74
2025-05-12 14:49:49 +02:00
0774ea85e3 Merge branch 'main' into update-flashloader-testapps 2025-05-12 14:49:45 +02:00
4114878e98 updated flashloader test applications 2025-05-12 14:44:45 +02:00
3d240d5481 README tweak 2025-04-24 22:46:32 +02:00
6583064454 small note on shared periph crate 2025-04-24 22:45:15 +02:00
f2e39993ed Merge pull request 'Rework of library structure' (#73) from rework-typestate-introduce-shared-peripherals into main
Reviewed-on: #73
2025-04-24 22:41:13 +02:00
58934e293f Rework library structure
Changed:

- Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs)
  which is mostly re-exported in this crate.
- All HAL API constructors now have a more consistent argument order: PAC structures and resource
  management structures first, then clock configuration, then any other configuration.
- Overhaul and simplification of several HAL APIs. The system configuration and IRQ router
  peripheral instance generally does not need to be passed to HAL API anymore.
- All HAL drivers are now type erased. The constructors will still expect and consume the PAC
  singleton component for resource management purposes, but are not cached anymore.
- Refactoring of GPIO library to be more inline with embassy GPIO API.

Added:

- I2C clock timeout feature support.
2025-04-24 22:33:46 +02:00
24 changed files with 126 additions and 171 deletions

View File

@@ -34,6 +34,9 @@ It also contains the following helper crates:
[`RTIC`](https://rtic.rs/2/book/en/) and [`embassy`](https://github.com/embassy-rs/embassy)
native Rust RTOSes.
The majority of the HAL implementation and the Embassy-rs support are contained in the external
[`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) crate.
## Using the `.cargo/config.toml` file
Use the following command to have a starting `config.toml` file

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@@ -4,16 +4,15 @@ version = "0.1.0"
edition = "2021"
[dependencies]
cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
cortex-m-rt = "0.7"
panic-halt = "1"
rtt-target = "0.6"
panic-rtt-target = "0.2"
defmt = "1"
defmt-rtt = "1"
panic-probe = { version = "1", features = ["print-defmt"] }
embedded-hal = "1"
embedded-hal-nb = "1"
embedded-io = "0.6"
[dependencies.va108xx-hal]
version = "0.11"
features = ["rt"]
path = "../va108xx-hal"

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@@ -7,18 +7,21 @@
use cortex_m_rt::entry;
use embedded_hal::delay::DelayNs;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
// Logging provider
use defmt_rtt as _;
// Panic provider
use panic_probe as _;
use va108xx_hal::{
gpio::{PinState, PinsA, PinsB},
pac::{self, interrupt},
gpio::{regs::Gpio, Input, Output, PinState, Pull},
pac,
pins::{PinsA, PinsB, Port},
prelude::*,
time::Hertz,
timer::{default_ms_irq_handler, set_up_ms_tick, CountdownTimer, InterruptConfig},
timer::CountdownTimer,
};
#[allow(dead_code)]
#[derive(Debug)]
#[derive(Debug, defmt::Format)]
enum TestCase {
// Tie PORTA[0] to PORTA[1] for these tests!
TestBasic,
@@ -32,18 +35,18 @@ enum TestCase {
Pulse,
// Tie PA0, PA1 and PA3 to an oscilloscope
DelayGpio,
// PA0 can be checked with an oscillsope to verify timing correctness.
DelayMs,
}
#[entry]
fn main() -> ! {
rtt_init_print!();
rprintln!("-- VA108xx Test Application --");
let mut dp = pac::Peripherals::take().unwrap();
defmt::println!("-- VA108xx Test Application --");
let dp = pac::Peripherals::take().unwrap();
let cp = cortex_m::Peripherals::take().unwrap();
let pinsa = PinsA::new(&mut dp.sysconfig, dp.porta);
let pinsb = PinsB::new(&mut dp.sysconfig, dp.portb);
let mut led1 = pinsa.pa10.into_readable_push_pull_output();
let pinsa = PinsA::new(dp.porta);
let pinsb = PinsB::new(dp.portb);
let mut led1 = Output::new(pinsa.pa10, PinState::Low);
let test_case = TestCase::DelayMs;
match test_case {
@@ -51,20 +54,20 @@ fn main() -> ! {
| TestCase::TestPulldown
| TestCase::TestPullup
| TestCase::TestMask => {
rprintln!(
defmt::info!(
"Test case {:?}. Make sure to tie PORTA[0] to PORTA[1]",
test_case
);
}
_ => {
rprintln!("Test case {:?}", test_case);
defmt::info!("Test case {:?}", test_case);
}
}
match test_case {
TestCase::TestBasic => {
// Tie PORTA[0] to PORTA[1] for these tests!
let mut out = pinsa.pa0.into_readable_push_pull_output();
let input = pinsa.pa1.into_floating_input();
let mut out = Output::new(pinsa.pa0, PinState::Low);
let input = Input::new_floating(pinsa.pa1);
out.set_high();
assert!(input.is_high());
out.set_low();
@@ -72,73 +75,74 @@ fn main() -> ! {
}
TestCase::TestPullup => {
// Tie PORTA[0] to PORTA[1] for these tests!
let input = pinsa.pa1.into_pull_up_input();
let input = Input::new_with_pull(pinsa.pa1, Pull::Up);
assert!(input.is_high());
let mut out = pinsa.pa0.into_readable_push_pull_output();
let mut out = Output::new(pinsa.pa0, PinState::Low);
out.set_low();
assert!(input.is_low());
out.set_high();
assert!(input.is_high());
out.into_floating_input();
assert!(input.is_high());
}
TestCase::TestPulldown => {
// Tie PORTA[0] to PORTA[1] for these tests!
let input = pinsa.pa1.into_pull_down_input();
let input = Input::new_with_pull(pinsa.pa1, Pull::Down);
assert!(input.is_low());
let mut out = pinsa.pa0.into_push_pull_output();
let mut out = Output::new(pinsa.pa0, PinState::Low);
out.set_low();
assert!(input.is_low());
out.set_high();
assert!(input.is_high());
out.into_floating_input();
assert!(input.is_low());
}
TestCase::TestMask => {
// Tie PORTA[0] to PORTA[1] for these tests!
let mut input = pinsa.pa1.into_pull_down_input();
// Need to test this low-level..
/*
let mut input = Input::new_with_pull(pinsa.pa1, Pull::Down);
input.clear_datamask();
assert!(!input.datamask());
let mut out = pinsa.pa0.into_push_pull_output();
out.clear_datamask();
assert!(input.is_low_masked().is_err());
assert!(out.set_high_masked().is_err());
*/
}
TestCase::PortB => {
// Tie PORTB[22] to PORTB[23] for these tests!
let mut out = pinsb.pb22.into_readable_push_pull_output();
let input = pinsb.pb23.into_floating_input();
let mut out = Output::new(pinsb.pb22, PinState::Low);
let input = Input::new_floating(pinsb.pb23);
out.set_high();
assert!(input.is_high());
out.set_low();
assert!(input.is_low());
}
TestCase::Perid => {
assert_eq!(PinsA::get_perid(), 0x004007e1);
assert_eq!(PinsB::get_perid(), 0x004007e1);
let mmio_porta = Gpio::new_mmio(Port::A);
assert_eq!(mmio_porta.read_perid(), 0x004007e1);
let mmio_porta = Gpio::new_mmio(Port::B);
assert_eq!(mmio_porta.read_perid(), 0x004007e1);
}
TestCase::Pulse => {
let mut output_pulsed = pinsa.pa0.into_push_pull_output();
let mut output_pulsed = Output::new(pinsa.pa0, PinState::Low);
output_pulsed.configure_pulse_mode(true, PinState::Low);
rprintln!("Pulsing high 10 times..");
defmt::info!("Pulsing high 10 times..");
output_pulsed.set_low();
for _ in 0..10 {
output_pulsed.set_high();
cortex_m::asm::delay(25_000_000);
}
output_pulsed.configure_pulse_mode(true, PinState::High);
rprintln!("Pulsing low 10 times..");
defmt::info!("Pulsing low 10 times..");
for _ in 0..10 {
output_pulsed.set_low();
cortex_m::asm::delay(25_000_000);
}
}
TestCase::DelayGpio => {
let mut out_0 = pinsa.pa0.into_readable_push_pull_output();
let mut out_0 = Output::new(pinsa.pa0, PinState::Low);
out_0.configure_delay(true, false);
let mut out_1 = pinsa.pa1.into_readable_push_pull_output();
let mut out_1 = Output::new(pinsa.pa1, PinState::Low);
out_1.configure_delay(false, true);
let mut out_2 = pinsa.pa3.into_readable_push_pull_output();
let mut out_2 = Output::new(pinsa.pa3, PinState::Low);
out_2.configure_delay(true, true);
for _ in 0..20 {
out_0.toggle();
@@ -148,22 +152,8 @@ fn main() -> ! {
}
}
TestCase::DelayMs => {
let mut ms_timer = set_up_ms_tick(
InterruptConfig::new(pac::Interrupt::OC0, true, true),
&mut dp.sysconfig,
Some(&mut dp.irqsel),
50.MHz(),
dp.tim0,
);
for _ in 0..5 {
led1.toggle();
ms_timer.delay_ms(500);
led1.toggle();
ms_timer.delay_ms(500);
}
let mut delay_timer = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
let mut pa0 = pinsa.pa0.into_readable_push_pull_output();
let mut delay_timer = CountdownTimer::new(dp.tim1, 50.MHz());
let mut pa0 = Output::new(pinsa.pa0, PinState::Low);
for _ in 0..5 {
led1.toggle();
delay_timer.delay_ms(500);
@@ -172,30 +162,23 @@ fn main() -> ! {
}
let ahb_freq: Hertz = 50.MHz();
let mut syst_delay = cortex_m::delay::Delay::new(cp.SYST, ahb_freq.raw());
// Test usecond delay using both TIM peripheral and SYST. Use the release image if you
// want to verify the timings!
loop {
pa0.toggle();
delay_timer.delay_us(50);
pa0.toggle();
delay_timer.delay_us(50);
// Release image should be used to verify timings for pin PA0
for _ in 0..5 {
pa0.toggle();
syst_delay.delay_us(50);
pa0.toggle();
syst_delay.delay_us(50);
pa0.toggle();
delay_timer.delay_us(50);
pa0.toggle();
delay_timer.delay_us(50);
}
}
}
rprintln!("Test success");
defmt::info!("Test success");
loop {
led1.toggle();
cortex_m::asm::delay(25_000_000);
}
}
#[interrupt]
#[allow(non_snake_case)]
fn OC0() {
default_ms_irq_handler()
}

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@@ -7,7 +7,7 @@ edition = "2021"
cortex-m = "0.7"
cortex-m-rt = "0.7"
embedded-hal = "1"
defmt-rtt = "0.4"
defmt-rtt = "1"
defmt = "1"
panic-probe = { version = "1", features = ["defmt"] }
crc = "3"

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@@ -12,8 +12,8 @@ The bootloader uses the following memory map:
| 0x0 | Bootloader start | code up to 0x2FFE bytes |
| 0x2FFE | Bootloader CRC | half-word |
| 0x3000 | App image A start | code up to 0xE7F4 (~59K) bytes |
| 0x117F8 | App image A CRC check length | word |
| 0x117FC | App image A CRC check value | word |
| 0x117F4 | App image A CRC check length | word |
| 0x117F8 | App image A CRC check value | word |
| 0x117FC | App image B start | code up to 0xE7F4 (~59K) bytes |
| 0x1FFF0 | App image B CRC check length | word |
| 0x1FFF4 | App image B CRC check value | word |

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@@ -5,9 +5,7 @@ edition = "2021"
[dependencies]
cfg-if = "1"
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
cortex-m-rt = "0.7"
embedded-hal = "1"
embedded-hal-async = "1"
embedded-io = "0.6"
embedded-io-async = "0.6"
@@ -15,13 +13,12 @@ heapless = "0.8"
static_cell = "2"
defmt = "1"
defmt-rtt = "0.4"
panic-probe = { version = "0.3", features = ["print-defmt"] }
defmt-rtt = "1"
panic-probe = { version = "1", features = ["print-defmt"] }
critical-section = "1"
portable-atomic = { version = "1", features = ["unsafe-assume-single-core"]}
embassy-sync = "0.6"
embassy-sync = "0.7"
embassy-time = "0.4"
embassy-executor = { version = "0.7", features = [
"arch-cortex-m",
@@ -30,10 +27,13 @@ embassy-executor = { version = "0.7", features = [
]}
va108xx-hal = { version = "0.11", path = "../../va108xx-hal", features = ["defmt"] }
va108xx-embassy = { version = "0.2" }
va108xx-embassy = { version = "0.2", path = "../../va108xx-embassy" }
[features]
default = ["ticks-hz-1_000", "va108xx-embassy/irq-oc30-oc31"]
custom-irqs = []
ticks-hz-1_000 = ["embassy-time/tick-hz-1_000"]
ticks-hz-32_768 = ["embassy-time/tick-hz-32_768"]
[package.metadata.cargo-machete]
ignored = ["cortex-m-rt"]

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@@ -59,16 +59,10 @@ static CHANNEL_PB22_TO_PB23: Channel<ThreadModeRawMutex, GpioCmd, 3> = Channel::
async fn main(spawner: Spawner) {
defmt::println!("-- VA108xx Async GPIO Demo --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
// Safety: Only called once here.
va108xx_embassy::init(
&mut dp.sysconfig,
&dp.irqsel,
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
);
va108xx_embassy::init(dp.tim23, dp.tim22, SYSCLK_FREQ);
let porta = PinsA::new(dp.porta);
let portb = PinsB::new(dp.portb);

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@@ -52,16 +52,10 @@ static CONSUMER_UART_B: Mutex<RefCell<Option<Consumer<u8, 256>>>> = Mutex::new(R
async fn main(spawner: Spawner) {
defmt::println!("-- VA108xx Async UART RX Demo --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
// Safety: Only called once here.
va108xx_embassy::init(
&mut dp.sysconfig,
&dp.irqsel,
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
);
va108xx_embassy::init(dp.tim23, dp.tim22, SYSCLK_FREQ);
let porta = PinsA::new(dp.porta);
let mut led0 = Output::new(porta.pa10, PinState::Low);

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@@ -39,16 +39,10 @@ const STR_LIST: &[&str] = &[
async fn main(_spawner: Spawner) {
defmt::println!("-- VA108xx Async UART TX Demo --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
// Safety: Only called once here.
va108xx_embassy::init(
&mut dp.sysconfig,
&dp.irqsel,
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
);
va108xx_embassy::init(dp.tim23, dp.tim22, SYSCLK_FREQ);
let porta = PinsA::new(dp.porta);

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@@ -26,23 +26,21 @@ const SYSCLK_FREQ: Hertz = Hertz::from_raw(50_000_000);
async fn main(_spawner: Spawner) {
defmt::println!("-- VA108xx Embassy Demo --");
let mut dp = pac::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
// Safety: Only called once here.
cfg_if::cfg_if! {
if #[cfg(not(feature = "custom-irqs"))] {
va108xx_embassy::init(
&mut dp.sysconfig,
&dp.irqsel,
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
SYSCLK_FREQ,
);
} else {
va108xx_embassy::init_with_custom_irqs(
SYSCLK_FREQ,
dp.tim23,
dp.tim22,
SYSCLK_FREQ,
pac::Interrupt::OC23,
pac::Interrupt::OC24,
);

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@@ -5,22 +5,12 @@ edition = "2021"
[dependencies]
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
cortex-m-rt = "0.7"
embedded-hal = "1"
embedded-io = "0.6"
defmt-rtt = "0.4"
defmt-rtt = "1"
defmt = "1"
panic-probe = { version = "1", features = ["defmt"] }
# Even though we do not use this directly, we need to activate this feature explicitely
# so that RTIC compiles because thumv6 does not have CAS operations natively.
portable-atomic = { version = "1", features = ["unsafe-assume-single-core"]}
rtic = { version = "2", features = ["thumbv6-backend"] }
rtic-monotonics = { version = "2", features = ["cortex-m-systick"] }
rtic-sync = { version = "1.3", features = ["defmt-03"] }
once_cell = {version = "1", default-features = false, features = ["critical-section"]}
ringbuf = { version = "0.4.7", default-features = false, features = ["portable-atomic"] }
va108xx-hal = { version = "0.11", path = "../../va108xx-hal" }

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@@ -7,21 +7,15 @@ edition = "2021"
cortex-m = {version = "0.7", features = ["critical-section-single-core"]}
cortex-m-rt = "0.7"
panic-halt = "1"
critical-section = "1"
defmt-rtt = "0.4"
defmt-rtt = "1"
defmt = "1"
panic-probe = { version = "1", features = ["defmt"] }
embedded-hal = "1"
embedded-hal-nb = "1"
embedded-io = "0.6"
cortex-m-semihosting = "0.5.0"
portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }
[dependencies.va108xx-hal]
version = "0.11"
path = "../../va108xx-hal"
features = ["defmt"]
[dependencies.vorago-reb1]
path = "../../vorago-reb1"
version = "0.8"

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@@ -4,28 +4,23 @@ version = "0.1.0"
edition = "2021"
[dependencies]
cortex-m = "0.7"
cortex-m = { version = "0.7", features = ["critical-section-single-core"]}
cortex-m-rt = "0.7"
embedded-hal = "1"
embedded-hal-nb = "1"
embedded-io = "0.6"
defmt = "1"
defmt-rtt = { version = "0.4" }
panic-probe = { version = "0.3", features = ["print-defmt"] }
defmt-rtt = { version = "1" }
panic-probe = { version = "1", features = ["print-defmt"] }
num_enum = { version = "0.7", default-features = false }
crc = "3"
cobs = { version = "0.3", default-features = false }
satrs = { version = "0.2", default-features = false }
cobs = { version = "0.4", default-features = false }
satrs = { version = "0.3.0-alpha.1", default-features = false }
ringbuf = { version = "0.4.7", default-features = false, features = ["portable-atomic"] }
once_cell = { version = "1", default-features = false, features = ["critical-section"] }
spacepackets = { version = "0.11", default-features = false, features = ["defmt"] }
spacepackets = { version = "0.15", default-features = false, features = ["defmt"] }
# Even though we do not use this directly, we need to activate this feature explicitely
# so that RTIC compiles because thumv6 does not have CAS operations natively.
portable-atomic = {version = "1", features = ["unsafe-assume-single-core"]}
rtic = { version = "2", features = ["thumbv6-backend"] }
rtic-monotonics = { version = "2", features = ["cortex-m-systick"] }
rtic-sync = {version = "1", features = ["defmt-03"]}
[dependencies.va108xx-hal]
version = "0.11"
@@ -34,3 +29,6 @@ features = ["defmt"]
[dependencies.vorago-reb1]
version = "0.8"
[package.metadata.cargo-machete]
ignored = ["portable-atomic", "cortex-m-rt"]

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@@ -9,9 +9,8 @@ edition = "2021"
cortex-m-rt = "0.7"
panic-rtt-target = { version = "0.1.3" }
rtt-target = { version = "0.5" }
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
embedded-hal = "1"
va108xx-hal = { version = "0.10.0" }
va108xx-hal = { version = "0.11" }
[profile.dev]
codegen-units = 1

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@@ -3,7 +3,7 @@
#![no_std]
use cortex_m_rt::entry;
use embedded_hal::{delay::DelayNs, digital::StatefulOutputPin};
use embedded_hal::delay::DelayNs;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use va108xx_hal::{gpio::PinsA, pac, prelude::*, timer::CountdownTimer};
@@ -15,11 +15,11 @@ fn main() -> ! {
let mut dp = pac::Peripherals::take().unwrap();
let mut timer = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim0);
let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
let porta = PinsA::new(&mut dp.sysconfig, dp.porta);
let mut led1 = porta.pa10.into_readable_push_pull_output();
loop {
led1.toggle().ok();
led1.toggle();
timer.delay_ms(500);
}
}

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@@ -9,9 +9,8 @@ edition = "2021"
cortex-m-rt = "0.7"
panic-rtt-target = { version = "0.1.3" }
rtt-target = { version = "0.5" }
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
embedded-hal = "1"
va108xx-hal = { version = "0.10.0" }
va108xx-hal = { version = "0.11" }
[profile.dev]
codegen-units = 1

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@@ -3,7 +3,7 @@
#![no_std]
use cortex_m_rt::entry;
use embedded_hal::{delay::DelayNs, digital::StatefulOutputPin};
use embedded_hal::delay::DelayNs;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use va108xx_hal::{gpio::PinsA, pac, prelude::*, timer::CountdownTimer};
@@ -15,11 +15,11 @@ fn main() -> ! {
let mut dp = pac::Peripherals::take().unwrap();
let mut timer = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim0);
let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
let porta = PinsA::new(&mut dp.sysconfig, dp.porta);
let mut led2 = porta.pa7.into_readable_push_pull_output();
loop {
led2.toggle().ok();
led2.toggle();
timer.delay_ms(1000);
}
}

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@@ -270,7 +270,7 @@ mod app {
defmt::warn!("PUS TC error: {}", pus_tc.unwrap_err());
return;
}
let (pus_tc, _) = pus_tc.unwrap();
let pus_tc = pus_tc.unwrap();
let mut write_and_send = |tm: &PusTmCreator| {
let written_size = tm.write_to_bytes(cx.local.verif_buf).unwrap();
cx.shared.tm_rb.lock(|prod| {
@@ -278,18 +278,18 @@ mod app {
prod.buf.push_slice(&cx.local.verif_buf[0..written_size]);
});
};
let token = cx.local.verif_reporter.add_tc(&pus_tc);
let (tm, accepted_token) = cx
let request_id = VerificationReportCreator::read_request_id_from_tc(&pus_tc);
let tm = cx
.local
.verif_reporter
.acceptance_success(cx.local.src_data_buf, token, 0, 0, &[])
.acceptance_success(cx.local.src_data_buf, &request_id, 0, 0, &[])
.expect("acceptance success failed");
write_and_send(&tm);
let (tm, started_token) = cx
let tm = cx
.local
.verif_reporter
.start_success(cx.local.src_data_buf, accepted_token, 0, 0, &[])
.start_success(cx.local.src_data_buf, &request_id, 0, 0, &[])
.expect("acceptance success failed");
write_and_send(&tm);
@@ -308,7 +308,7 @@ mod app {
let tm = cx
.local
.verif_reporter
.completion_success(cx.local.src_data_buf, started_token, 0, 0, &[])
.completion_success(cx.local.src_data_buf, &request_id, 0, 0, &[])
.expect("completion success failed");
write_and_send(&tm);
};
@@ -339,7 +339,7 @@ mod app {
let tm = cx
.local
.verif_reporter
.completion_success(cx.local.src_data_buf, started_token, 0, 0, &[])
.completion_success(cx.local.src_data_buf, &request_id, 0, 0, &[])
.expect("completion success failed");
write_and_send(&tm);
}
@@ -349,7 +349,7 @@ mod app {
let tm = cx
.local
.verif_reporter
.completion_success(cx.local.src_data_buf, started_token, 0, 0, &[])
.completion_success(cx.local.src_data_buf, &request_id, 0, 0, &[])
.expect("completion success failed");
write_and_send(&tm);
} else if pus_tc.service() == PusServiceId::MemoryManagement as u8 {
@@ -358,7 +358,7 @@ mod app {
.verif_reporter
.step_success(
cx.local.src_data_buf,
&started_token,
&request_id,
0,
0,
&[],
@@ -408,7 +408,7 @@ mod app {
.verif_reporter
.completion_failure(
cx.local.src_data_buf,
started_token,
&request_id,
0,
0,
FailParams::new(&[], &EcssEnumU8::new(0), &[]),
@@ -417,7 +417,7 @@ mod app {
} else {
cx.local
.verif_reporter
.completion_success(cx.local.src_data_buf, started_token, 0, 0, &[])
.completion_success(cx.local.src_data_buf, &request_id, 0, 0, &[])
.expect("completion success failed")
};
write_and_send(&tm);

View File

@@ -11,7 +11,7 @@ keywords = ["no-std", "hal", "cortex-m", "vorago", "va108xx"]
categories = ["aerospace", "embedded", "no-std", "hardware-support"]
[dependencies]
vorago-shared-periphs = { path = "../../vorago-shared-periphs", features = ["vor1x"] }
vorago-shared-periphs = { git = "https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs.git", features = ["vor1x"] }
va108xx-hal = { path = "../va108xx-hal" }
[features]

View File

@@ -88,9 +88,9 @@ embassy_time_driver_irqs!(timekeeper_irq = OC29, alarm_irq = OC28);
/// default case.
#[cfg(feature = "irqs-in-lib")]
pub fn init<TimekeeperTim: TimMarker, AlarmTim: TimMarker>(
sysclk: Hertz,
timekeeper_tim: TimekeeperTim,
alarm_tim: AlarmTim,
sysclk: Hertz,
) {
time_driver().__init(sysclk, timekeeper_tim, alarm_tim, TIMEKEEPER_IRQ, ALARM_IRQ)
}
@@ -99,9 +99,9 @@ pub fn init<TimekeeperTim: TimMarker, AlarmTim: TimMarker>(
///
/// Requires an explicit [pac::Interrupt] argument for the timekeeper and alarm IRQs.
pub fn init_with_custom_irqs<TimekeeperTim: TimMarker, AlarmTim: TimMarker>(
sysclk: Hertz,
timekeeper_tim: TimekeeperTim,
alarm_tim: AlarmTim,
sysclk: Hertz,
timekeeper_irq: pac::Interrupt,
alarm_irq: pac::Interrupt,
) {

View File

@@ -12,12 +12,11 @@ categories = ["aerospace", "embedded", "no-std", "hardware-support"]
[dependencies]
cortex-m = { version = "0.7", features = ["critical-section-single-core"]}
cortex-m-rt = "0.7"
vorago-shared-periphs = { path = "../../vorago-shared-periphs", features = ["vor1x"] }
vorago-shared-periphs = { git = "https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs.git", features = ["vor1x"] }
fugit = "0.3"
thiserror = { version = "2", default-features = false }
va108xx = { version = "0.5", default-features = false, features = ["critical-section", "defmt"] }
defmt = { version = "0.3", optional = true }
defmt = { version = "1", optional = true }
[target.'cfg(all(target_arch = "arm", target_os = "none"))'.dependencies]
portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }
@@ -32,3 +31,6 @@ defmt = ["dep:defmt", "vorago-shared-periphs/defmt"]
[package.metadata.docs.rs]
all-features = true
rustdoc-args = ["--generate-link-to-definition"]
[package.metadata.cargo-machete]
ignored = ["cortex-m"]

View File

@@ -1,8 +1,8 @@
//! API for the SPI peripheral.
//!
//! The main abstraction provided by this module is the [Spi] an structure.
//! It provides the [embedded_hal::spi] traits, but also offer a low level interface
//! via the [SpiLowLevel] trait.
//! It provides the [SpiBus trait](https://docs.rs/embedded-hal/latest/embedded_hal/spi/trait.SpiBus.html),
//! but also offer a low level interface via the [SpiLowLevel] trait.
//!
//! ## Examples
//!

View File

@@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
## [unreleased]
## [v0.5.1] 2025-07-22
defmt version v1
## [v0.5.0] 2025-02-17
- Re-generated PAC with `svd2rust` v0.35.0 and added optional `defmt` and `Debug` implementations
@@ -55,7 +59,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
### Fixed
- Generated with patched version of `svd2rust`: See
- Generated with patched version of `svd2rust`: See
https://github.com/rust-embedded/svd2rust/pull/549 for more details.
Some bitmasks were missing from register reader definitions.
@@ -79,3 +83,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- First version of the PAC which builds. Uses a patched version
of `svd2rust`: https://github.com/rust-embedded/svd2rust
[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-v0.5.1...HEAD
[v0.5.1]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-v0.5.0...va108xx-v0.5.1
[v0.5.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-v0.4.0...va108xx-v0.5.0

View File

@@ -1,6 +1,6 @@
[package]
name = "va108xx"
version = "0.5.0"
version = "0.5.1"
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
edition = "2021"
description = "PAC for the Vorago VA108xx family of microcontrollers"