Compare commits
11 Commits
ecf2203796
...
va108xx-em
Author | SHA1 | Date | |
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606d6a43b4
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a83d9cca16
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9eeaae76f7
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39aaea086a | |||
a6ef0954cb | |||
102d11114a
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8cdee8b733
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d419325312 | |||
561a8419c5
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9bd8efcada | |||
b401085f32 |
@ -27,8 +27,8 @@ embassy-executor = { version = "0.7", features = [
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"executor-interrupt"
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"executor-interrupt"
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]}
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]}
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va108xx-hal = { version = "0.10" }
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va108xx-hal = { version = "0.11", path = "../../va108xx-hal" }
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va108xx-embassy = { version = "0.2" }
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va108xx-embassy = { version = "0.2", path = "../../va108xx-embassy" }
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[features]
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[features]
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default = ["ticks-hz-1_000", "va108xx-embassy/irq-oc30-oc31"]
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default = ["ticks-hz-1_000", "va108xx-embassy/irq-oc30-oc31"]
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@ -22,5 +22,5 @@ rtic-sync = { version = "1.3", features = ["defmt-03"] }
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once_cell = {version = "1", default-features = false, features = ["critical-section"]}
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once_cell = {version = "1", default-features = false, features = ["critical-section"]}
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ringbuf = { version = "0.4.7", default-features = false, features = ["portable-atomic"] }
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ringbuf = { version = "0.4.7", default-features = false, features = ["portable-atomic"] }
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va108xx-hal = { version = "0.10" }
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va108xx-hal = { version = "0.11", path = "../../va108xx-hal" }
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vorago-reb1 = { version = "0.8" }
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vorago-reb1 = { version = "0.8", path = "../../vorago-reb1" }
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@ -16,8 +16,10 @@ embedded-io = "0.6"
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cortex-m-semihosting = "0.5.0"
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cortex-m-semihosting = "0.5.0"
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[dependencies.va108xx-hal]
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[dependencies.va108xx-hal]
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version = "0.10"
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version = "0.11"
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path = "../../va108xx-hal"
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features = ["rt", "defmt"]
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features = ["rt", "defmt"]
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[dependencies.vorago-reb1]
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[dependencies.vorago-reb1]
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version = "0.8"
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version = "0.8"
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path = "../../vorago-reb1"
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@ -45,9 +45,6 @@ fn main() -> ! {
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.expect("TX send error");
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.expect("TX send error");
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}
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}
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Err(nb::Error::WouldBlock) => (),
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Err(nb::Error::WouldBlock) => (),
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Err(nb::Error::Other(uart_error)) => {
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rprintln!("UART receive error {:?}", uart_error);
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}
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}
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}
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}
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}
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}
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}
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@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [unreleased]
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## [unreleased]
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## [v0.2.1] 2025-03-07
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- Bumped allowed va108xx-hal to v0.11
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## [v0.2.0] 2025-02-17
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## [v0.2.0] 2025-02-17
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- Bumped va108xx-hal to v0.10.0
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- Bumped va108xx-hal to v0.10.0
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@ -21,3 +25,7 @@ Docs patch
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## [v0.1.0] 2025-02-13
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## [v0.1.0] 2025-02-13
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Initial release
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Initial release
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[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.2.1...HEAD
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[v0.2.1]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.2.0...va10xx-embassy-v0.2.1
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[v0.2.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.1.2...va10xx-embassy-v0.2.0
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@ -1,6 +1,6 @@
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[package]
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[package]
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name = "va108xx-embassy"
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name = "va108xx-embassy"
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version = "0.2.0"
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version = "0.2.1"
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edition = "2021"
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edition = "2021"
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authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
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authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
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description = "Embassy-rs support for the Vorago VA108xx family of microcontrollers"
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description = "Embassy-rs support for the Vorago VA108xx family of microcontrollers"
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@ -20,7 +20,7 @@ embassy-time-queue-utils = "0.1"
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once_cell = { version = "1", default-features = false, features = ["critical-section"] }
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once_cell = { version = "1", default-features = false, features = ["critical-section"] }
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va108xx-hal = { version = "0.10" }
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va108xx-hal = { version = ">=0.10, <=0.11" }
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[target.'cfg(all(target_arch = "arm", target_os = "none"))'.dependencies]
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[target.'cfg(all(target_arch = "arm", target_os = "none"))'.dependencies]
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portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }
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portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }
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@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## Changed
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## Changed
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- Bugfix for I2C `TimingCfg::reg`
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- Simplified UART error handling. All APIs are now infallible because writing to a FIFO or
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- Simplified UART error handling. All APIs are now infallible because writing to a FIFO or
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reading from a FIFO never fails. Users can either poll errors using `Rx::poll_errors` or
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reading from a FIFO never fails. Users can either poll errors using `Rx::poll_errors` or
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`Uart::poll_rx_errors` / `UartBase::poll_rx_errors`, or detect errors using the provided
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`Uart::poll_rx_errors` / `UartBase::poll_rx_errors`, or detect errors using the provided
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@ -113,14 +114,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Updated `embedded-hal` to v1
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- Updated `embedded-hal` to v1
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- Added optional `defmt` v0.3 feature and support.
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- Added optional `defmt` v0.3 feature and support.
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## [v0.5.2] 2024-06-16
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## v0.5.2 2024-06-16
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## Fixed
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## Fixed
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|
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- Replaced usage to `ptr::write_volatile` in UART module which is denied on more recent Rust
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- Replaced usage to `ptr::write_volatile` in UART module which is denied on more recent Rust
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compilers.
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compilers.
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## [v0.5.1]
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## v0.5.1
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### Changes
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### Changes
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@ -129,7 +130,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- `once_cell` to 1.12.0
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- `once_cell` to 1.12.0
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- Other dependencies: Only revision has changed
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- Other dependencies: Only revision has changed
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|
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## [v0.5.0]
|
## v0.5.0
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||||||
|
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||||||
### Added
|
### Added
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||||||
|
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||||||
@ -142,14 +143,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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|||||||
|
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- Bugfix in UART code where RX and TX could not be enabled or disabled independently
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- Bugfix in UART code where RX and TX could not be enabled or disabled independently
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## [v0.4.3]
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## v0.4.3
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- Various smaller fixes for READMEs, update of links in documentation
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- Various smaller fixes for READMEs, update of links in documentation
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- Simplified CI for github, do not use `cross`
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- Simplified CI for github, do not use `cross`
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- New `blinky-pac` example
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- New `blinky-pac` example
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- Use HAL delay in `blinky` example
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- Use HAL delay in `blinky` example
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## [v0.4.2]
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## v0.4.2
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||||||
|
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### Added
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### Added
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||||||
|
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@ -159,24 +160,24 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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|
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- Clear TX and RX FIFO in SPI transfer function
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- Clear TX and RX FIFO in SPI transfer function
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## [v0.4.1]
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## v0.4.1
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|
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### Fixed
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### Fixed
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|
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- Initial blockmode setting was not set in SPI constructor
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- Initial blockmode setting was not set in SPI constructor
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|
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## [v0.4.0]
|
## v0.4.0
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||||||
|
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||||||
### Changed
|
### Changed
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||||||
|
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||||||
- Replaced `Hertz` by `impl Into<Hertz>` completely and removed
|
- Replaced `Hertz` by `impl Into<Hertz>` completely and removed
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`+ Copy` where not necessary
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`+ Copy` where not necessary
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|
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## [v0.3.1]
|
## v0.3.1
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||||||
|
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- Updated all links to point to new repository
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- Updated all links to point to new repository
|
||||||
|
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## [v0.3.0]
|
## v0.3.0
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||||||
|
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### Added
|
### Added
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||||||
|
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||||||
@ -188,7 +189,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Primary repository now hosted on IRS external git: https://egit.irs.uni-stuttgart.de/rust/va108xx-hal
|
- Primary repository now hosted on IRS external git: https://egit.irs.uni-stuttgart.de/rust/va108xx-hal
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- Relicensed as Apache-2.0
|
- Relicensed as Apache-2.0
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||||||
|
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## [0.2.3]
|
## v0.2.3
|
||||||
|
|
||||||
### Added
|
### Added
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||||||
|
|
||||||
@ -200,7 +201,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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|||||||
|
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- Improved Timer API. It is now possible to simply use `new` on `CountDownTimer`
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- Improved Timer API. It is now possible to simply use `new` on `CountDownTimer`
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|
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## [0.2.2]
|
## v0.2.2
|
||||||
|
|
||||||
### Added
|
### Added
|
||||||
|
|
||||||
@ -212,7 +213,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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|||||||
|
|
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- API which expects values in Hertz now uses `impl Into<Hertz>` as input parameter
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- API which expects values in Hertz now uses `impl Into<Hertz>` as input parameter
|
||||||
|
|
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## [0.2.1]
|
## v0.2.1
|
||||||
|
|
||||||
### Added
|
### Added
|
||||||
|
|
||||||
@ -226,7 +227,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Moved the `FilterClkSel` struct to the `clock` module, re-exporting in `gpio`
|
- Moved the `FilterClkSel` struct to the `clock` module, re-exporting in `gpio`
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- Clearing output state at initialization of Output pins
|
- Clearing output state at initialization of Output pins
|
||||||
|
|
||||||
## [0.2.0]
|
## v0.2.0
|
||||||
|
|
||||||
### Changed
|
### Changed
|
||||||
|
|
||||||
@ -241,7 +242,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
|
|||||||
- Some bugfixes for GPIO implementation
|
- Some bugfixes for GPIO implementation
|
||||||
- Rust edition updated to 2021
|
- Rust edition updated to 2021
|
||||||
|
|
||||||
## [0.1.0]
|
## v0.1.0
|
||||||
|
|
||||||
### Added
|
### Added
|
||||||
|
|
||||||
@ -251,7 +252,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
|
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- Added basic test binary in form of an example
|
- Added basic test binary in form of an example
|
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- README with basic instructions how to set up own binary crate
|
- README with basic instructions how to set up own binary crate
|
||||||
|
|
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[unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.1.0...HEAD
|
[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.11.0...HEAD
|
||||||
[v0.11.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.10.0...va108xx-hal-v0.11.0
|
[v0.11.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.10.0...va108xx-hal-v0.11.0
|
||||||
[v0.10.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.9.0...va108xx-hal-v0.10.0
|
[v0.10.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.9.0...va108xx-hal-v0.10.0
|
||||||
[v0.9.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.8.0...va108xx-hal-v0.9.0
|
[v0.9.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.8.0...va108xx-hal-v0.9.0
|
||||||
|
@ -1,6 +1,6 @@
|
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[package]
|
[package]
|
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name = "va108xx-hal"
|
name = "va108xx-hal"
|
||||||
version = "0.10.0"
|
version = "0.11.0"
|
||||||
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
|
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
|
||||||
edition = "2021"
|
edition = "2021"
|
||||||
description = "HAL for the Vorago VA108xx family of microcontrollers"
|
description = "HAL for the Vorago VA108xx family of microcontrollers"
|
||||||
|
@ -198,13 +198,13 @@ impl TimingCfg {
|
|||||||
}
|
}
|
||||||
|
|
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pub fn reg(&self) -> u32 {
|
pub fn reg(&self) -> u32 {
|
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(self.tbuf as u32) << 28
|
((self.tbuf as u32) << 28)
|
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| (self.thd_sta as u32) << 24
|
| ((self.thd_sta as u32) << 24)
|
||||||
| (self.tsu_sta as u32) << 20
|
| ((self.tsu_sta as u32) << 20)
|
||||||
| (self.tsu_sto as u32) << 16
|
| ((self.tsu_sto as u32) << 16)
|
||||||
| (self.tlow as u32) << 12
|
| ((self.tlow as u32) << 12)
|
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| (self.thigh as u32) << 8
|
| ((self.thigh as u32) << 8)
|
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| (self.tf as u32) << 4
|
| ((self.tf as u32) << 4)
|
||||||
| (self.tr as u32)
|
| (self.tr as u32)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -376,7 +376,7 @@ impl<I2c: Instance> I2cBase<I2c> {
|
|||||||
if let Some(max_words) = max_words {
|
if let Some(max_words) = max_words {
|
||||||
self.i2c
|
self.i2c
|
||||||
.s0_maxwords()
|
.s0_maxwords()
|
||||||
.write(|w| unsafe { w.bits(1 << 31 | max_words as u32) });
|
.write(|w| unsafe { w.bits((1 << 31) | max_words as u32) });
|
||||||
}
|
}
|
||||||
let (addr, addr_mode_mask) = Self::unwrap_addr(sl_cfg.addr);
|
let (addr, addr_mode_mask) = Self::unwrap_addr(sl_cfg.addr);
|
||||||
// The first bit is the read/write value. Normally, both read and write are matched
|
// The first bit is the read/write value. Normally, both read and write are matched
|
||||||
@ -437,7 +437,7 @@ impl<I2c: Instance> I2cBase<I2c> {
|
|||||||
let clk_div = self.calc_clk_div(speed_mode)?;
|
let clk_div = self.calc_clk_div(speed_mode)?;
|
||||||
self.i2c
|
self.i2c
|
||||||
.clkscale()
|
.clkscale()
|
||||||
.write(|w| unsafe { w.bits((speed_mode as u32) << 31 | clk_div as u32) });
|
.write(|w| unsafe { w.bits(((speed_mode as u32) << 31) | clk_div as u32) });
|
||||||
Ok(())
|
Ok(())
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1,5 +1,12 @@
|
|||||||
//! # API for the UART peripheral
|
//! # API for the UART peripheral
|
||||||
//!
|
//!
|
||||||
|
//! The core of this API are the [Uart], [UartBase], [Rx] and [Tx] structures.
|
||||||
|
//! The RX structure also has a dedicated [RxWithInterrupt] variant which allows reading the receiver
|
||||||
|
//! using interrupts.
|
||||||
|
//!
|
||||||
|
//! The [rx_asynch] and [tx_asynch] modules provide an asynchronous non-blocking API for the UART
|
||||||
|
//! peripheral.
|
||||||
|
//!
|
||||||
//! ## Examples
|
//! ## Examples
|
||||||
//!
|
//!
|
||||||
//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples/simple/examples/uart.rs)
|
//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples/simple/examples/uart.rs)
|
||||||
|
@ -8,6 +8,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
|
|||||||
|
|
||||||
## [unreleased]
|
## [unreleased]
|
||||||
|
|
||||||
|
## [v0.8.1] 2025-03-07
|
||||||
|
|
||||||
|
- Bumped allowed `va108xx-hal` dependency to 0.11
|
||||||
|
- Bumped `bitfield` dependency
|
||||||
|
|
||||||
## [v0.8.0] 2025-02-17
|
## [v0.8.0] 2025-02-17
|
||||||
|
|
||||||
- Bumped `va108xx-hal` dependency to 0.10
|
- Bumped `va108xx-hal` dependency to 0.10
|
||||||
@ -56,3 +61,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
|
|||||||
- Added basic accelerometer example. Board in not populated so it is not complete, but
|
- Added basic accelerometer example. Board in not populated so it is not complete, but
|
||||||
it provides a starting point
|
it provides a starting point
|
||||||
- Added ADC base library and example building on the new max116xx-10bit device driver crate
|
- Added ADC base library and example building on the new max116xx-10bit device driver crate
|
||||||
|
|
||||||
|
[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.8.1...HEAD
|
||||||
|
[v0.8.1]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.8.0...vorago-reb1-v0.8.1
|
||||||
|
[v0.8.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.7.0...vorago-reb1-v0.8.0
|
||||||
|
[v0.7.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.6.0...vorago-reb1-v0.7.0
|
||||||
|
[v0.6.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.5.0...vorago-reb1-v0.6.0
|
||||||
|
@ -1,6 +1,6 @@
|
|||||||
[package]
|
[package]
|
||||||
name = "vorago-reb1"
|
name = "vorago-reb1"
|
||||||
version = "0.8.0"
|
version = "0.8.1"
|
||||||
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
|
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
|
||||||
edition = "2021"
|
edition = "2021"
|
||||||
description = "Board Support Crate for the Vorago REB1 development board"
|
description = "Board Support Crate for the Vorago REB1 development board"
|
||||||
@ -15,10 +15,10 @@ cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
|
|||||||
cortex-m-rt = "0.7"
|
cortex-m-rt = "0.7"
|
||||||
embedded-hal = "1"
|
embedded-hal = "1"
|
||||||
nb = "1"
|
nb = "1"
|
||||||
bitfield = ">=0.17, <=0.18"
|
bitfield = ">=0.17, <=0.19"
|
||||||
max116xx-10bit = "0.3"
|
max116xx-10bit = "0.3"
|
||||||
|
|
||||||
va108xx-hal = { version = "0.10", features = ["rt"] }
|
va108xx-hal = { version = ">=0.10, <=0.11", features = ["rt"] }
|
||||||
|
|
||||||
[features]
|
[features]
|
||||||
rt = ["va108xx-hal/rt"]
|
rt = ["va108xx-hal/rt"]
|
||||||
|
Reference in New Issue
Block a user