UART embedded-io fixes

Reviewed-on: #71

board-tests/Cargo.toml

@@ -14,6 +14,6 @@ embedded-hal-nb = "1"
 embedded-io = "0.6"
 
 [dependencies.va108xx-hal]
-version = "0.10.0"
+version = "0.11"
 features = ["rt"]
 

bootloader/Cargo.toml

@@ -15,7 +15,7 @@ num_enum = { version = "0.7", default-features = false }
 static_assertions = "1"
 
 [dependencies.va108xx-hal]
-version = "0.10"
+version = "0.11"
 
 [dependencies.vorago-reb1]
 version = "0.8"

examples/embassy/Cargo.toml

@@ -27,8 +27,8 @@ embassy-executor = { version = "0.7", features = [
   "executor-interrupt"
 ]}
 
-va108xx-hal = { version = "0.11", path = "../../va108xx-hal" }
-va108xx-embassy = { version = "0.2", path = "../../va108xx-embassy" }
+va108xx-hal = { version = "0.11" }
+va108xx-embassy = { version = "0.2" }
 
 [features]
 default = ["ticks-hz-1_000", "va108xx-embassy/irq-oc30-oc31"]

examples/rtic/Cargo.toml

@@ -22,5 +22,5 @@ rtic-sync = { version = "1.3", features = ["defmt-03"] }
 once_cell = {version = "1", default-features = false, features = ["critical-section"]}
 ringbuf = { version = "0.4.7", default-features = false, features = ["portable-atomic"] }
 
-va108xx-hal = { version = "0.11", path = "../../va108xx-hal" }
-vorago-reb1 = { version = "0.8", path = "../../vorago-reb1" }
+va108xx-hal = { version = "0.11" }
+vorago-reb1 = { version = "0.8" }

examples/simple/Cargo.toml

@@ -17,9 +17,7 @@ cortex-m-semihosting = "0.5.0"
 
 [dependencies.va108xx-hal]
 version = "0.11"
-path = "../../va108xx-hal"
 features = ["rt", "defmt"]
 
 [dependencies.vorago-reb1]
 version = "0.8"
-path = "../../vorago-reb1"

examples/simple/examples/uart.rs

@@ -45,9 +45,6 @@ fn main() -> ! {
                     .expect("TX send error");
             }
             Err(nb::Error::WouldBlock) => (),
-            Err(nb::Error::Other(uart_error)) => {
-                rprintln!("UART receive error {:?}", uart_error);
-            }
         }
     }
 }

flashloader/Cargo.toml

@@ -29,7 +29,7 @@ rtic-monotonics = { version = "2", features = ["cortex-m-systick"] }
 rtic-sync = {version = "1", features = ["defmt-03"]}
 
 [dependencies.va108xx-hal]
-version = "0.10"
+version = "0.11"
 
 [dependencies.vorago-reb1]
 version = "0.8"

va108xx-embassy/CHANGELOG.md

@@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
+## [v0.2.1] 2025-03-07
+
+- Bumped allowed va108xx-hal to v0.11
+
 ## [v0.2.0] 2025-02-17
 
 - Bumped va108xx-hal to v0.10.0
@@ -21,3 +25,7 @@ Docs patch
 ## [v0.1.0] 2025-02-13
 
 Initial release
+
+[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.2.1...HEAD
+[v0.2.1]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.2.0...va10xx-embassy-v0.2.1
+[v0.2.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.1.2...va10xx-embassy-v0.2.0

va108xx-embassy/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "va108xx-embassy"
-version = "0.2.0"
+version = "0.2.1"
 edition = "2021"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 description = "Embassy-rs support for the Vorago VA108xx family of microcontrollers"
@@ -20,7 +20,7 @@ embassy-time-queue-utils = "0.1"
 
 once_cell = { version = "1", default-features = false, features = ["critical-section"] }
 
-va108xx-hal = { version = "0.11", path = "../va108xx-hal" }
+va108xx-hal = { version = ">=0.10, <=0.11" }
 
 [target.'cfg(all(target_arch = "arm", target_os = "none"))'.dependencies]
 portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }

va108xx-hal/src/uart/mod.rs

@@ -1,5 +1,12 @@
 //! # API for the UART peripheral
 //!
+//! The core of this API are the [Uart], [UartBase], [Rx] and [Tx] structures.
+//! The RX structure also has a dedicated [RxWithInterrupt] variant which allows reading the receiver
+//! using interrupts.
+//!
+//! The [rx_asynch] and [tx_asynch] modules provide an asynchronous non-blocking API for the UART
+//! peripheral.
+//!
 //! ## Examples
 //!
 //! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples/simple/examples/uart.rs)
@@ -885,7 +892,15 @@ impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
 
 impl<Uart: Instance> embedded_io::Read for Rx<Uart> {
     fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
+        if buf.is_empty() {
+            return Ok(0);
+        }
         let mut read = 0;
+        loop {
+            if self.0.rxstatus().read().rdavl().bit_is_set() {
+                break;
+            }
+        }
         for byte in buf.iter_mut() {
             match <Self as embedded_hal_nb::serial::Read<u8>>::read(self) {
                 Ok(w) => {
@@ -1051,6 +1066,14 @@ impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for Tx<Uart> {
 
 impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
     fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
+        if buf.is_empty() {
+            return Ok(0);
+        }
+        loop {
+            if self.0.txstatus().read().wrrdy().bit_is_set() {
+                break;
+            }
+        }
         let mut written = 0;
         for byte in buf.iter() {
             match <Self as embedded_hal_nb::serial::Write<u8>>::write(self, *byte) {
@@ -1059,7 +1082,7 @@ impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
             }
         }
 
-        Ok(buf.len())
+        Ok(written)
     }
 
     fn flush(&mut self) -> Result<(), Self::Error> {

vorago-reb1/CHANGELOG.md

@@ -8,6 +8,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
+## [v0.8.1] 2025-03-07
+
+- Bumped allowed `va108xx-hal` dependency to 0.11
+- Bumped `bitfield` dependency
+
 ## [v0.8.0] 2025-02-17
 
 - Bumped `va108xx-hal` dependency to 0.10
@@ -56,3 +61,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Added basic accelerometer example. Board in not populated so it is not complete, but
   it provides a starting point
 - Added ADC base library and example building on the new max116xx-10bit device driver crate
+
+[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.8.1...HEAD
+[v0.8.1]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.8.0...vorago-reb1-v0.8.1
+[v0.8.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.7.0...vorago-reb1-v0.8.0
+[v0.7.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.6.0...vorago-reb1-v0.7.0
+[v0.6.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.5.0...vorago-reb1-v0.6.0

vorago-reb1/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "vorago-reb1"
-version = "0.8.0"
+version = "0.8.1"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "Board Support Crate for the Vorago REB1 development board"
@@ -15,10 +15,10 @@ cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
 cortex-m-rt = "0.7"
 embedded-hal = "1"
 nb = "1"
-bitfield = ">=0.17, <=0.18"
+bitfield = ">=0.17, <=0.19"
 max116xx-10bit = "0.3"
 
-va108xx-hal = { version = ">=0.10, <=0.11", path = "../va108xx-hal", features = ["rt"] }
+va108xx-hal = { version = ">=0.10, <=0.11", features = ["rt"] }
 
 [features]
 rt = ["va108xx-hal/rt"]