simplfied UART error handling

README.md

@@ -148,13 +148,3 @@ example.
 The Segger RTT viewer can be used to display log messages received from the target. The base
 address for the RTT block placement is 0x10000000. It is recommended to use a search range of
 0x1000 around that base address when using the RTT viewer.
-
-## Learning (Embedded) Rust
-
-If you are unfamiliar with Rust on Embedded Systems or Rust in general, the following resources
-are recommended:
-
-- [Rust Book](https://doc.rust-lang.org/book/)
-- [Embedded Rust Book](https://docs.rust-embedded.org/book/)
-- [Embedded Rust Discovery](https://docs.rust-embedded.org/discovery/microbit/)
-- [Awesome Embedded Rust](https://github.com/rust-embedded/awesome-embedded-rust)

board-tests/Cargo.toml

@@ -14,6 +14,6 @@ embedded-hal-nb = "1"
 embedded-io = "0.6"
 
 [dependencies.va108xx-hal]
-version = "0.11"
+version = "0.10.0"
 features = ["rt"]
 

bootloader/Cargo.toml

@@ -15,7 +15,7 @@ num_enum = { version = "0.7", default-features = false }
 static_assertions = "1"
 
 [dependencies.va108xx-hal]
-version = "0.11"
+version = "0.10"
 
 [dependencies.vorago-reb1]
 version = "0.8"

examples/embassy/Cargo.toml

@@ -27,7 +27,7 @@ embassy-executor = { version = "0.7", features = [
   "executor-interrupt"
 ]}
 
-va108xx-hal = { version = "0.11" }
+va108xx-hal = { version = "0.10" }
 va108xx-embassy = { version = "0.2" }
 
 [features]

examples/rtic/Cargo.toml

@@ -22,5 +22,5 @@ rtic-sync = { version = "1.3", features = ["defmt-03"] }
 once_cell = {version = "1", default-features = false, features = ["critical-section"]}
 ringbuf = { version = "0.4.7", default-features = false, features = ["portable-atomic"] }
 
-va108xx-hal = { version = "0.11" }
+va108xx-hal = { version = "0.10" }
 vorago-reb1 = { version = "0.8" }

examples/simple/Cargo.toml

@@ -16,7 +16,7 @@ embedded-io = "0.6"
 cortex-m-semihosting = "0.5.0"
 
 [dependencies.va108xx-hal]
-version = "0.11"
+version = "0.10"
 features = ["rt", "defmt"]
 
 [dependencies.vorago-reb1]

examples/simple/examples/uart.rs

@@ -45,6 +45,9 @@ fn main() -> ! {
                     .expect("TX send error");
             }
             Err(nb::Error::WouldBlock) => (),
+            Err(nb::Error::Other(uart_error)) => {
+                rprintln!("UART receive error {:?}", uart_error);
+            }
         }
     }
 }

flashloader/Cargo.toml

@@ -29,7 +29,7 @@ rtic-monotonics = { version = "2", features = ["cortex-m-systick"] }
 rtic-sync = {version = "1", features = ["defmt-03"]}
 
 [dependencies.va108xx-hal]
-version = "0.11"
+version = "0.10"
 
 [dependencies.vorago-reb1]
 version = "0.8"

va108xx-embassy/CHANGELOG.md

@@ -8,10 +8,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
-## [v0.2.1] 2025-03-07
-
-- Bumped allowed va108xx-hal to v0.11
-
 ## [v0.2.0] 2025-02-17
 
 - Bumped va108xx-hal to v0.10.0
@@ -25,7 +21,3 @@ Docs patch
 ## [v0.1.0] 2025-02-13
 
 Initial release
-
-[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.2.1...HEAD
-[v0.2.1]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.2.0...va10xx-embassy-v0.2.1
-[v0.2.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-embassy-v0.1.2...va10xx-embassy-v0.2.0

va108xx-embassy/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "va108xx-embassy"
-version = "0.2.1"
+version = "0.2.0"
 edition = "2021"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 description = "Embassy-rs support for the Vorago VA108xx family of microcontrollers"
@@ -20,7 +20,7 @@ embassy-time-queue-utils = "0.1"
 
 once_cell = { version = "1", default-features = false, features = ["critical-section"] }
 
-va108xx-hal = { version = ">=0.10, <=0.11" }
+va108xx-hal = { version = "0.10" }
 
 [target.'cfg(all(target_arch = "arm", target_os = "none"))'.dependencies]
 portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }

va108xx-hal/CHANGELOG.md

@@ -8,14 +8,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
-## [v0.11.1] 2025-03-10
-
-## Fixed
-
-- Fix `embedded_io` UART implementation to implement the documented contract properly.
-  The implementation will now block until at least one byte is available or can be written, unless
-  the send or receive buffer is empty.
-
 ## [v0.11.0] 2025-03-07
 
 ## Changed
@@ -122,14 +114,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Updated `embedded-hal` to v1
 - Added optional `defmt` v0.3 feature and support.
 
-## v0.5.2 2024-06-16
+## [v0.5.2] 2024-06-16
 
 ## Fixed
 
 - Replaced usage to `ptr::write_volatile` in UART module which is denied on more recent Rust
   compilers.
 
-## v0.5.1
+## [v0.5.1]
 
 ### Changes
 
@@ -138,7 +130,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
   - `once_cell` to 1.12.0
   - Other dependencies: Only revision has changed
 
-## v0.5.0
+## [v0.5.0]
 
 ### Added
 
@@ -151,14 +143,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 - Bugfix in UART code where RX and TX could not be enabled or disabled independently
 
-## v0.4.3
+## [v0.4.3]
 
 - Various smaller fixes for READMEs, update of links in documentation
 - Simplified CI for github, do not use `cross`
 - New `blinky-pac` example
 - Use HAL delay in `blinky` example
 
-## v0.4.2
+## [v0.4.2]
 
 ### Added
 
@@ -168,24 +160,24 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 - Clear TX and RX FIFO in SPI transfer function
 
-## v0.4.1
+## [v0.4.1]
 
 ### Fixed
 
 - Initial blockmode setting was not set in SPI constructor
 
-## v0.4.0
+## [v0.4.0]
 
 ### Changed
 
 - Replaced `Hertz` by `impl Into<Hertz>` completely and removed
   `+ Copy` where not necessary
 
-## v0.3.1
+## [v0.3.1]
 
 - Updated all links to point to new repository
 
-## v0.3.0
+## [v0.3.0]
 
 ### Added
 
@@ -197,7 +189,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Primary repository now hosted on IRS external git: https://egit.irs.uni-stuttgart.de/rust/va108xx-hal
 - Relicensed as Apache-2.0
 
-## v0.2.3
+## [0.2.3]
 
 ### Added
 
@@ -209,7 +201,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 - Improved Timer API. It is now possible to simply use `new` on `CountDownTimer`
 
-## v0.2.2
+## [0.2.2]
 
 ### Added
 
@@ -221,7 +213,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 - API which expects values in Hertz now uses `impl Into<Hertz>` as input parameter
 
-## v0.2.1
+## [0.2.1]
 
 ### Added
 
@@ -235,7 +227,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Moved the `FilterClkSel` struct to the `clock` module, re-exporting in `gpio`
 - Clearing output state at initialization of Output pins
 
-## v0.2.0
+## [0.2.0]
 
 ### Changed
 
@@ -250,7 +242,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Some bugfixes for GPIO implementation
 - Rust edition updated to 2021
 
-## v0.1.0
+## [0.1.0]
 
 ### Added
 
@@ -261,7 +253,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - README with basic instructions how to set up own binary crate
 
 [unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.11.0...HEAD
-[v0.11.1]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.11.0...va108xx-hal-v0.11.1
 [v0.11.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.10.0...va108xx-hal-v0.11.0
 [v0.10.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.9.0...va108xx-hal-v0.10.0
 [v0.9.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/va108xx-hal-v0.8.0...va108xx-hal-v0.9.0

va108xx-hal/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "va108xx-hal"
-version = "0.11.1"
+version = "0.10.0"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "HAL for the Vorago VA108xx family of microcontrollers"

va108xx-hal/src/uart/mod.rs

@@ -1,12 +1,5 @@
 //! # API for the UART peripheral
 //!
-//! The core of this API are the [Uart], [UartBase], [Rx] and [Tx] structures.
-//! The RX structure also has a dedicated [RxWithInterrupt] variant which allows reading the receiver
-//! using interrupts.
-//!
-//! The [rx_asynch] and [tx_asynch] modules provide an asynchronous non-blocking API for the UART
-//! peripheral.
-//!
 //! ## Examples
 //!
 //! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples/simple/examples/uart.rs)
@@ -892,15 +885,7 @@ impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
 
 impl<Uart: Instance> embedded_io::Read for Rx<Uart> {
     fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
-        if buf.is_empty() {
-            return Ok(0);
-        }
         let mut read = 0;
-        loop {
-            if self.0.rxstatus().read().rdavl().bit_is_set() {
-                break;
-            }
-        }
         for byte in buf.iter_mut() {
             match <Self as embedded_hal_nb::serial::Read<u8>>::read(self) {
                 Ok(w) => {
@@ -1066,14 +1051,6 @@ impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for Tx<Uart> {
 
 impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
     fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
-        if buf.is_empty() {
-            return Ok(0);
-        }
-        loop {
-            if self.0.txstatus().read().wrrdy().bit_is_set() {
-                break;
-            }
-        }
         let mut written = 0;
         for byte in buf.iter() {
             match <Self as embedded_hal_nb::serial::Write<u8>>::write(self, *byte) {
@@ -1082,7 +1059,7 @@ impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
             }
         }
 
-        Ok(written)
+        Ok(buf.len())
     }
 
     fn flush(&mut self) -> Result<(), Self::Error> {

vorago-reb1/CHANGELOG.md

@@ -8,11 +8,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
-## [v0.8.1] 2025-03-07
-
-- Bumped allowed `va108xx-hal` dependency to 0.11
-- Bumped `bitfield` dependency
-
 ## [v0.8.0] 2025-02-17
 
 - Bumped `va108xx-hal` dependency to 0.10
@@ -61,9 +56,3 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Added basic accelerometer example. Board in not populated so it is not complete, but
   it provides a starting point
 - Added ADC base library and example building on the new max116xx-10bit device driver crate
-
-[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.8.1...HEAD
-[v0.8.1]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.8.0...vorago-reb1-v0.8.1
-[v0.8.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.7.0...vorago-reb1-v0.8.0
-[v0.7.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.6.0...vorago-reb1-v0.7.0
-[v0.6.0]: https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/compare/vorago-reb1-v0.5.0...vorago-reb1-v0.6.0

vorago-reb1/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "vorago-reb1"
-version = "0.8.1"
+version = "0.8.0"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "Board Support Crate for the Vorago REB1 development board"
@@ -15,10 +15,10 @@ cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
 cortex-m-rt = "0.7"
 embedded-hal = "1"
 nb = "1"
-bitfield = ">=0.17, <=0.19"
+bitfield = ">=0.17, <=0.18"
 max116xx-10bit = "0.3"
 
-va108xx-hal = { version = ">=0.10, <=0.11", features = ["rt"] }
+va108xx-hal = { version = "0.10", features = ["rt"] }
 
 [features]
 rt = ["va108xx-hal/rt"]