Updated SVD file handling and README

SVD base file is now created using the svdtools package and a YAML file.
Update README with usage information as well.

This PR also adds new fields for the peripheral clock enable register
in the SVD file

CHANGELOG.md

@@ -12,6 +12,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 - Relicensed under dual Apache-2.0 / MIT license
 
+### Changed
+
+- SVD file handling improved and new fields added for the peripheral
+  clock enable register
+
 ### Added
 
 - Helper script to automate all steps for PAC generation

README.md

@@ -8,3 +8,31 @@ This repository contains the Peripheral Access Crate (PAC) for
 Voragos VA108xx series of Cortex-M0 based microcontrollers.
 
 The crate was generated using [`svd2rust`](https://github.com/rust-embedded/svd2rust).
+
+## Usage
+
+To use this crate, add this to your `Cargo.toml`
+
+```toml
+[dependencies.va108xx]
+version = "0.1.0"
+features = ["rt"]
+```
+
+The `rt` feature is optional and recommended. It brings in support for `cortex-m-rt`.
+
+For full details on the autgenerated API, please see the
+[svd2rust documentation](https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api).
+
+## Regenerating the PAC
+
+The base file used by `svd2rust` is generated using the `svdtools` package and a
+YAML patch file. You can create the patched file by running this command after installing
+the Python [`svdtools` package](https://github.com/stm32-rs/svdtools):
+
+```sh
+cd svd
+svd patch va108xx-patch.yml
+```
+
+After that, you can regenerate the PAC by running the `gen-helper.sh` helper script.

gen-helper.sh

@@ -15,7 +15,7 @@ if [ -x "$(${svd2rust_bin} --version)" ]; then
 		"Install it with cargo install svd2rust"
 	exit
 fi
-${svd2rust_bin} -i va108xx.svd
+${svd2rust_bin} -i svd/va108xx-base.svd.patched
 rm -rf src
 form -i lib.rs -o src/ && rm lib.rs
 cargo fmt

svd/va108xx-patch.yml

@@ -0,0 +1,59 @@
+_svd: va108xx-base.svd
+
+SYSCONFIG:
+  PERIPHERAL_CLK_ENABLE:
+    _add:
+        PORTA:
+          description: Enable PORTA clock
+          bitOffset: 0
+          bitWidth: 1
+        PORTB:
+          description: Enable PORTB clock
+          bitOffset: 1
+          bitWidth: 1
+        SPI_0:
+          description: Enable SPI[0] clock
+          bitOffset: 4
+          bitWidth: 1
+        SPI_1:
+          description: Enable SPI[1] clock
+          bitOffset: 5
+          bitWidth: 1
+        SPI_2:
+          description: Enable SPI[2] clock
+          bitOffset: 6
+          bitWidth: 1
+        UART_0:
+          description: Enable UART[0] clock
+          bitOffset: 8
+          bitWidth: 1
+        UART_1:
+          description: Enable UART[1] clock
+          bitOffset: 9
+          bitWidth: 1
+        I2C_0:
+          description: Enable I2C[0] clock
+          bitOffset: 16
+          bitWidth: 1
+        I2C_1:
+          description: Enable I2C[1] clock
+          bitOffset: 17
+          bitWidth: 1
+        IRQSEL:
+          description: Enable IRQ selector clock
+          bitOffset: 21
+          bitWidth: 1
+        IOCONFIG:
+          description: Enable IO Configuration block clock
+          bitOffset: 22
+          bitWidth: 1
+        UTILITY:
+          description: Enable utility clock
+          bitOffset: 23
+          bitWidth: 1
+        GPIO:
+          description: Enable GPIO clock
+          bitOffset: 24
+          bitWidth: 1
+
+