I2C update
- Added two missing bit fields for I2CA STATUS register: I2CIDLE and IDLE - Made STATUS register read-only
This commit is contained in:
parent
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10
CHANGELOG.md
10
CHANGELOG.md
@ -8,7 +8,15 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [unreleased]
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## [v0.2.0]
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## [v0.1.3]
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### Added
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- Added two missing bit fields for I2CA STATUS register: I2CIDLE and IDLE
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### Fixed
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- Made I2CA STATUS register read-only
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## [v0.1.2]
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@ -1,6 +1,6 @@
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[package]
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name = "va108xx"
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version = "0.1.2"
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version = "0.1.3"
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authors = ["Robin Mueller <robin.mueller.m@gmail.com>"]
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edition = "2021"
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description = "PAC for the Vorago VA108xx family of microcontrollers"
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@ -13,27 +13,6 @@ impl From<crate::R<STATUS_SPEC>> for R {
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R(reader)
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}
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}
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#[doc = "Register `STATUS` writer"]
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pub struct W(crate::W<STATUS_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<STATUS_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<STATUS_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<STATUS_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `WAITING` reader - Controller is Waiting"]
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pub struct WAITING_R(crate::FieldReader<bool, bool>);
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impl WAITING_R {
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@ -49,28 +28,6 @@ impl core::ops::Deref for WAITING_R {
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&self.0
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}
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}
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#[doc = "Field `WAITING` writer - Controller is Waiting"]
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pub struct WAITING_W<'a> {
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w: &'a mut W,
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}
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impl<'a> WAITING_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
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self.w
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}
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}
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#[doc = "Field `STALLED` reader - Controller is Stalled"]
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pub struct STALLED_R(crate::FieldReader<bool, bool>);
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impl STALLED_R {
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@ -86,28 +43,6 @@ impl core::ops::Deref for STALLED_R {
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&self.0
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}
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}
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#[doc = "Field `STALLED` writer - Controller is Stalled"]
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pub struct STALLED_W<'a> {
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w: &'a mut W,
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}
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impl<'a> STALLED_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
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self.w
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}
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}
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#[doc = "Field `ARBLOST` reader - I2C Arbitration was lost"]
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pub struct ARBLOST_R(crate::FieldReader<bool, bool>);
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impl ARBLOST_R {
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@ -123,28 +58,6 @@ impl core::ops::Deref for ARBLOST_R {
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&self.0
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}
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}
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#[doc = "Field `ARBLOST` writer - I2C Arbitration was lost"]
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pub struct ARBLOST_W<'a> {
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w: &'a mut W,
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}
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impl<'a> ARBLOST_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
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self.w
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}
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}
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#[doc = "Field `NACKADDR` reader - I2C Address was not Acknowledged"]
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pub struct NACKADDR_R(crate::FieldReader<bool, bool>);
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impl NACKADDR_R {
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@ -160,28 +73,6 @@ impl core::ops::Deref for NACKADDR_R {
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&self.0
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}
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}
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#[doc = "Field `NACKADDR` writer - I2C Address was not Acknowledged"]
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pub struct NACKADDR_W<'a> {
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w: &'a mut W,
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}
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impl<'a> NACKADDR_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
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self.w
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}
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}
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#[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"]
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pub struct NACKDATA_R(crate::FieldReader<bool, bool>);
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impl NACKDATA_R {
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@ -197,28 +88,6 @@ impl core::ops::Deref for NACKDATA_R {
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&self.0
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}
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}
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#[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"]
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pub struct NACKDATA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> NACKDATA_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
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self.w
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}
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}
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#[doc = "Field `RXNEMPTY` reader - RX FIFO is Not Empty"]
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pub struct RXNEMPTY_R(crate::FieldReader<bool, bool>);
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impl RXNEMPTY_R {
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@ -234,28 +103,6 @@ impl core::ops::Deref for RXNEMPTY_R {
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&self.0
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}
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}
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#[doc = "Field `RXNEMPTY` writer - RX FIFO is Not Empty"]
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pub struct RXNEMPTY_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RXNEMPTY_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
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self.w
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}
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}
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#[doc = "Field `RXFULL` reader - RX FIFO is Full"]
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pub struct RXFULL_R(crate::FieldReader<bool, bool>);
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impl RXFULL_R {
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@ -271,28 +118,6 @@ impl core::ops::Deref for RXFULL_R {
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&self.0
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}
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}
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#[doc = "Field `RXFULL` writer - RX FIFO is Full"]
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pub struct RXFULL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RXFULL_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
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self.w
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}
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}
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#[doc = "Field `RXTRIGGER` reader - RX FIFO Above Trigger Level"]
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pub struct RXTRIGGER_R(crate::FieldReader<bool, bool>);
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impl RXTRIGGER_R {
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@ -308,28 +133,6 @@ impl core::ops::Deref for RXTRIGGER_R {
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&self.0
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}
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}
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#[doc = "Field `RXTRIGGER` writer - RX FIFO Above Trigger Level"]
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pub struct RXTRIGGER_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RXTRIGGER_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
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self.w
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}
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}
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#[doc = "Field `TXEMPTY` reader - TX FIFO is Empty"]
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pub struct TXEMPTY_R(crate::FieldReader<bool, bool>);
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impl TXEMPTY_R {
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@ -345,28 +148,6 @@ impl core::ops::Deref for TXEMPTY_R {
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&self.0
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}
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}
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#[doc = "Field `TXEMPTY` writer - TX FIFO is Empty"]
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pub struct TXEMPTY_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TXEMPTY_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
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self.w
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}
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}
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#[doc = "Field `TXNFULL` reader - TX FIFO is Full"]
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pub struct TXNFULL_R(crate::FieldReader<bool, bool>);
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impl TXNFULL_R {
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@ -382,28 +163,6 @@ impl core::ops::Deref for TXNFULL_R {
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&self.0
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}
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}
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#[doc = "Field `TXNFULL` writer - TX FIFO is Full"]
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pub struct TXNFULL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TXNFULL_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
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self.w
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}
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}
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#[doc = "Field `TXTRIGGER` reader - TX FIFO Below Trigger Level"]
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pub struct TXTRIGGER_R(crate::FieldReader<bool, bool>);
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impl TXTRIGGER_R {
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@ -419,28 +178,6 @@ impl core::ops::Deref for TXTRIGGER_R {
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&self.0
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}
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}
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#[doc = "Field `TXTRIGGER` writer - TX FIFO Below Trigger Level"]
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pub struct TXTRIGGER_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TXTRIGGER_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
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self.w
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}
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}
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#[doc = "Field `RAW_SDA` reader - I2C Raw SDA value"]
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pub struct RAW_SDA_R(crate::FieldReader<bool, bool>);
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impl RAW_SDA_R {
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@ -456,28 +193,6 @@ impl core::ops::Deref for RAW_SDA_R {
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&self.0
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}
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}
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#[doc = "Field `RAW_SDA` writer - I2C Raw SDA value"]
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pub struct RAW_SDA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RAW_SDA_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
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self.w
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}
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}
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#[doc = "Field `RAW_SCL` reader - I2C Raw SCL value"]
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pub struct RAW_SCL_R(crate::FieldReader<bool, bool>);
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impl RAW_SCL_R {
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@ -493,26 +208,34 @@ impl core::ops::Deref for RAW_SCL_R {
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&self.0
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}
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}
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#[doc = "Field `RAW_SCL` writer - I2C Raw SCL value"]
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pub struct RAW_SCL_W<'a> {
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w: &'a mut W,
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#[doc = "Field `I2C_IDLE` reader - I2C bus is Idle"]
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pub struct I2C_IDLE_R(crate::FieldReader<bool, bool>);
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impl I2C_IDLE_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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I2C_IDLE_R(crate::FieldReader::new(bits))
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}
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}
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impl<'a> RAW_SCL_W<'a> {
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#[doc = r"Sets the field bit"]
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impl core::ops::Deref for I2C_IDLE_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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#[doc = r"Clears the field bit"]
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}
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#[doc = "Field `IDLE` reader - Controller is Idle"]
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pub struct IDLE_R(crate::FieldReader<bool, bool>);
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impl IDLE_R {
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
pub(crate) fn new(bits: bool) -> Self {
|
||||
IDLE_R(crate::FieldReader::new(bits))
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
}
|
||||
impl core::ops::Deref for IDLE_R {
|
||||
type Target = crate::FieldReader<bool, bool>;
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
|
||||
self.w
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
@ -581,81 +304,18 @@ impl R {
|
||||
pub fn raw_scl(&self) -> RAW_SCL_R {
|
||||
RAW_SCL_R::new(((self.bits >> 31) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 2 - Controller is Waiting"]
|
||||
#[doc = "Bit 0 - I2C bus is Idle"]
|
||||
#[inline(always)]
|
||||
pub fn waiting(&mut self) -> WAITING_W {
|
||||
WAITING_W { w: self }
|
||||
pub fn i2c_idle(&self) -> I2C_IDLE_R {
|
||||
I2C_IDLE_R::new((self.bits & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Controller is Stalled"]
|
||||
#[doc = "Bit 1 - Controller is Idle"]
|
||||
#[inline(always)]
|
||||
pub fn stalled(&mut self) -> STALLED_W {
|
||||
STALLED_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 4 - I2C Arbitration was lost"]
|
||||
#[inline(always)]
|
||||
pub fn arblost(&mut self) -> ARBLOST_W {
|
||||
ARBLOST_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 5 - I2C Address was not Acknowledged"]
|
||||
#[inline(always)]
|
||||
pub fn nackaddr(&mut self) -> NACKADDR_W {
|
||||
NACKADDR_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 6 - I2C Data was not Acknowledged"]
|
||||
#[inline(always)]
|
||||
pub fn nackdata(&mut self) -> NACKDATA_W {
|
||||
NACKDATA_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 8 - RX FIFO is Not Empty"]
|
||||
#[inline(always)]
|
||||
pub fn rxnempty(&mut self) -> RXNEMPTY_W {
|
||||
RXNEMPTY_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 9 - RX FIFO is Full"]
|
||||
#[inline(always)]
|
||||
pub fn rxfull(&mut self) -> RXFULL_W {
|
||||
RXFULL_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 11 - RX FIFO Above Trigger Level"]
|
||||
#[inline(always)]
|
||||
pub fn rxtrigger(&mut self) -> RXTRIGGER_W {
|
||||
RXTRIGGER_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 12 - TX FIFO is Empty"]
|
||||
#[inline(always)]
|
||||
pub fn txempty(&mut self) -> TXEMPTY_W {
|
||||
TXEMPTY_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 13 - TX FIFO is Full"]
|
||||
#[inline(always)]
|
||||
pub fn txnfull(&mut self) -> TXNFULL_W {
|
||||
TXNFULL_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 15 - TX FIFO Below Trigger Level"]
|
||||
#[inline(always)]
|
||||
pub fn txtrigger(&mut self) -> TXTRIGGER_W {
|
||||
TXTRIGGER_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - I2C Raw SDA value"]
|
||||
#[inline(always)]
|
||||
pub fn raw_sda(&mut self) -> RAW_SDA_W {
|
||||
RAW_SDA_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 31 - I2C Raw SCL value"]
|
||||
#[inline(always)]
|
||||
pub fn raw_scl(&mut self) -> RAW_SCL_W {
|
||||
RAW_SCL_W { w: self }
|
||||
}
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
pub fn idle(&self) -> IDLE_R {
|
||||
IDLE_R::new(((self.bits >> 1) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
#[doc = "I2C Controller Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
|
||||
#[doc = "I2C Controller Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
|
||||
pub struct STATUS_SPEC;
|
||||
impl crate::RegisterSpec for STATUS_SPEC {
|
||||
type Ux = u32;
|
||||
@ -664,10 +324,6 @@ impl crate::RegisterSpec for STATUS_SPEC {
|
||||
impl crate::Readable for STATUS_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
|
||||
impl crate::Writable for STATUS_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets STATUS to value 0"]
|
||||
impl crate::Resettable for STATUS_SPEC {
|
||||
#[inline(always)]
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
#![doc = "Peripheral access API for VA108XX microcontrollers (generated using svd2rust v0.19.0 (43be074 2021-11-09))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
|
||||
#![doc = "Peripheral access API for VA108XX microcontrollers (generated using svd2rust v0.19.0 (877196f 2021-11-14))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
|
||||
svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
|
||||
#![deny(const_err)]
|
||||
#![deny(dead_code)]
|
||||
|
||||
@ -2157,7 +2157,7 @@
|
||||
<name>STATUS</name>
|
||||
<description>I2C Controller Status Register</description>
|
||||
<addressOffset>0x018</addressOffset>
|
||||
<fields>
|
||||
<access>read-only</access><fields>
|
||||
<field>
|
||||
<name>WAITING</name>
|
||||
<description>Controller is Waiting</description>
|
||||
@ -2223,6 +2223,8 @@
|
||||
<description>I2C Raw SCL value</description>
|
||||
<bitRange>[31:31]</bitRange>
|
||||
</field>
|
||||
<field><name>I2C_IDLE</name><description>I2C bus is Idle</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field>
|
||||
<field><name>IDLE</name><description>Controller is Idle</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field>
|
||||
</fields>
|
||||
</register>
|
||||
<register>
|
||||
|
||||
@ -56,4 +56,18 @@ SYSCONFIG:
|
||||
bitOffset: 24
|
||||
bitWidth: 1
|
||||
|
||||
|
||||
# I2CB is derived from I2CA
|
||||
I2CA:
|
||||
_modify:
|
||||
STATUS:
|
||||
access: read-only
|
||||
STATUS:
|
||||
_add:
|
||||
I2C_IDLE:
|
||||
description: I2C bus is Idle
|
||||
bitOffset: 0
|
||||
bitWidth: 1
|
||||
IDLE:
|
||||
description: Controller is Idle
|
||||
bitOffset: 1
|
||||
bitWidth: 1
|
||||
|
||||
Reference in New Issue
Block a user