Important fix: Use bitmask everywhere now

This PAC was generated using a patched version of svd2rust with
commit hash 43be074d21132c3a76780816010df592a3603874

It includes bugfix https://github.com/rust-embedded/svd2rust/pull/549

src/uarta/clkscale.rs

@@ -57,7 +57,7 @@ impl<'a> FRAC_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u8) -> &'a mut W {
-        self.w.bits = value as u32;
+        self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f);
         self.w
     }
 }
@@ -114,7 +114,7 @@ impl R {
     #[doc = "Bits 0:5 - Fractional Divide (64ths)"]
     #[inline(always)]
     pub fn frac(&self) -> FRAC_R {
-        FRAC_R::new(self.bits as u8)
+        FRAC_R::new((self.bits & 0x3f) as u8)
     }
     #[doc = "Bits 6:23 - Integer Divide"]
     #[inline(always)]

src/uarta/ctrl.rs

@@ -67,7 +67,7 @@ impl<'a> PAREN_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = value as u32;
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
         self.w
     }
 }
@@ -435,7 +435,7 @@ impl R {
     #[doc = "Bit 0 - Parity Enable"]
     #[inline(always)]
     pub fn paren(&self) -> PAREN_R {
-        PAREN_R::new(self.bits != 0)
+        PAREN_R::new((self.bits & 0x01) != 0)
     }
     #[doc = "Bit 1 - Parity Even/Odd(1/0)"]
     #[inline(always)]

src/uarta/enable.rs

@@ -67,7 +67,7 @@ impl<'a> RXENABLE_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = value as u32;
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
         self.w
     }
 }
@@ -112,7 +112,7 @@ impl R {
     #[doc = "Bit 0 - Rx Enable"]
     #[inline(always)]
     pub fn rxenable(&self) -> RXENABLE_R {
-        RXENABLE_R::new(self.bits != 0)
+        RXENABLE_R::new((self.bits & 0x01) != 0)
     }
     #[doc = "Bit 1 - Tx Enable"]
     #[inline(always)]

src/uarta/fifo_clr.rs

@@ -37,7 +37,7 @@ impl<'a> RXSTS_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = value as u32;
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
         self.w
     }
 }

src/uarta/irq_clr.rs

@@ -37,7 +37,7 @@ impl<'a> IRQ_RX_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = value as u32;
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
         self.w
     }
 }

src/uarta/irq_enb.rs

@@ -67,7 +67,7 @@ impl<'a> IRQ_RX_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = value as u32;
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
         self.w
     }
 }
@@ -297,7 +297,7 @@ impl R {
     #[doc = "Bit 0 - RX Interrupt"]
     #[inline(always)]
     pub fn irq_rx(&self) -> IRQ_RX_R {
-        IRQ_RX_R::new(self.bits != 0)
+        IRQ_RX_R::new((self.bits & 0x01) != 0)
     }
     #[doc = "Bit 1 - RX Status Interrupt"]
     #[inline(always)]

src/uarta/irq_end.rs

@@ -122,7 +122,7 @@ impl R {
     #[doc = "Bit 0 - RX Interrupt"]
     #[inline(always)]
     pub fn irq_rx(&self) -> IRQ_RX_R {
-        IRQ_RX_R::new(self.bits != 0)
+        IRQ_RX_R::new((self.bits & 0x01) != 0)
     }
     #[doc = "Bit 1 - RX Status Interrupt"]
     #[inline(always)]

src/uarta/irq_raw.rs

@@ -122,7 +122,7 @@ impl R {
     #[doc = "Bit 0 - RX Interrupt"]
     #[inline(always)]
     pub fn irq_rx(&self) -> IRQ_RX_R {
-        IRQ_RX_R::new(self.bits != 0)
+        IRQ_RX_R::new((self.bits & 0x01) != 0)
     }
     #[doc = "Bit 1 - RX Status Interrupt"]
     #[inline(always)]

src/uarta/rxstatus.rs

@@ -182,7 +182,7 @@ impl R {
     #[doc = "Bit 0 - Read Data Available"]
     #[inline(always)]
     pub fn rdavl(&self) -> RDAVL_R {
-        RDAVL_R::new(self.bits != 0)
+        RDAVL_R::new((self.bits & 0x01) != 0)
     }
     #[doc = "Bit 1 - Read Fifo NOT Full"]
     #[inline(always)]

src/uarta/txstatus.rs

@@ -92,7 +92,7 @@ impl R {
     #[doc = "Bit 0 - Write Fifo NOT Full"]
     #[inline(always)]
     pub fn wrrdy(&self) -> WRRDY_R {
-        WRRDY_R::new(self.bits != 0)
+        WRRDY_R::new((self.bits & 0x01) != 0)
     }
     #[doc = "Bit 1 - Write Fifo Full"]
     #[inline(always)]