simplify CI

Reviewed-on: rust/va108xx-rs#5

.github/workflows/ci.yml

@@ -16,9 +16,7 @@ jobs:
           override: true
       - uses: actions-rs/cargo@v1
         with:
-          use-cross: true
           command: check
-          args: --target thumbv6m-none-eabi
 
   fmt:
     name: Rustfmt
@@ -50,9 +48,8 @@ jobs:
       - run: rustup component add clippy
       - uses: actions-rs/cargo@v1
         with:
-          use-cross: true
           command: clippy
-          args: --target thumbv6m-none-eabi -- -D warnings
+          args: -- -D warnings
 
   ci:
       if: ${{ success() }}

CHANGELOG.md

@@ -8,11 +8,38 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
+## [v0.2.4]
+
+- Added missing bitfield `CSDTRG2` in `CSD_CTRL` register of `TIM0` peripheral
+
+## [v0.2.3]
+
+- Added peripheral reset fields for `PERIPHERAL_RESET` register
+
+## [v0.2.2]
+
+- README tweks
+
+## [v0.2.1]
+
+- Some README and Manifest weaks
+
 ## [v0.2.0]
 
-## [v0.1.1]
+- Authorative repository was transferred to https://egit.irs.uni-stuttgart.de/rust/va108xx-rs but
+  there still will be a GitHub mirror. Project relicensed as Apache-2.0 only
 
-- Relicensed under dual Apache-2.0 / MIT license
+## [v0.1.3]
+
+### Added
+
+- Added two missing bit fields for I2CA STATUS register: I2CIDLE and IDLE
+
+### Fixed
+
+- Made I2CA STATUS register read-only
+
+## [v0.1.2]
 
 ### Fixed
 
@@ -20,6 +47,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
   https://github.com/rust-embedded/svd2rust/pull/549 for more details.
   Some bitmasks were missing from register reader definitions.
 
+## [v0.1.1]
+
+- Relicensed under dual Apache-2.0 / MIT license
+
 ### Changed
 
 - SVD file handling improved and new fields added for the peripheral

Cargo.toml

@@ -1,12 +1,12 @@
 [package]
 name = "va108xx"
-version = "0.1.2"
-authors = ["Robin Mueller <robin.mueller.m@gmail.com>"]
+version = "0.2.4"
+authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "PAC for the Vorago VA108xx family of microcontrollers"
-homepage = "https://github.com/robamu-org/va108xx-rs"
-repository = "https://github.com/robamu-org/va108xx-rs"
-license = "MIT OR Apache-2.0"
+homepage = "https://egit.irs.uni-stuttgart.de/rust/va108xx"
+repository = "https://egit.irs.uni-stuttgart.de/rust/va108xx"
+license = "Apache-2.0"
 keywords = ["no-std", "arm", "cortex-m", "vorago", "va108xx"]
 categories = ["embedded", "no-std", "hardware-support"]
 

LICENSE-MIT

@@ -1,25 +0,0 @@
-Copyright (c) 2021 Robin Mueller
-
-Permission is hereby granted, free of charge, to any
-person obtaining a copy of this software and associated
-documentation files (the "Software"), to deal in the
-Software without restriction, including without
-limitation the rights to use, copy, modify, merge,
-publish, distribute, sublicense, and/or sell copies of
-the Software, and to permit persons to whom the Software
-is furnished to do so, subject to the following
-conditions:
-
-The above copyright notice and this permission notice
-shall be included in all copies or substantial portions
-of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
-ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
-TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
-PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
-SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
-IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-DEALINGS IN THE SOFTWARE.

NOTICE

@@ -0,0 +1,3 @@
+Peripheral access crate for the Vorago VA108xx family microcontrollers
+
+This software contains code developed at the University of Stuttgart.

README.md

@@ -1,5 +1,5 @@
 [![Crates.io](https://img.shields.io/crates/v/va108xx)](https://crates.io/crates/va108xx)
-[![build](https://github.com/robamu-org/va108xx-rs/actions/workflows/ci.yml/badge.svg)](https://github.com/robamu-org/va108xx-rs/actions/workflows/ci.yml)
+[![build](https://github.com/us-irs/va108xx-rs/actions/workflows/ci.yml/badge.svg)](https://github.com/us-irs/va108xx-rs/actions/workflows/ci.yml)
 [![docs.rs](https://img.shields.io/docsrs/va108xx)](https://docs.rs/va108xx)
 
 # PAC for the Vorago VA108xx microcontroller family
@@ -9,13 +9,18 @@ Voragos VA108xx series of Cortex-M0 based microcontrollers.
 
 The crate was generated using [`svd2rust`](https://github.com/rust-embedded/svd2rust).
 
+If you are interested in higher-level abstractions, it is recommended you visit
+the [`va108xx-hal` HAL crate](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal) and
+the [`vorago-reb1` BSP crate](https://github.com/robamu-org/vorago-reb1-rs) which build on top of
+this PAC and provide application examples as well.
+
 ## Usage
 
 To use this crate, add this to your `Cargo.toml`
 
 ```toml
 [dependencies.va108xx]
-version = "0.1"
+version = "<Most Recent Version>"
 features = ["rt"]
 ```
 
@@ -28,7 +33,8 @@ For full details on the autgenerated API, please see the
 
 The base file used by `svd2rust` is generated using the `svdtools` package and a
 YAML patch file. You can create the patched file by running this command after installing
-the Python [`svdtools` package](https://github.com/stm32-rs/svdtools):
+the Python [`svdtools` package](https://github.com/stm32-rs/svdtools) and the `form` tool
+with `cargo install form`:
 
 ```sh
 cd svd

automation/Dockerfile

@@ -0,0 +1,11 @@
+# Run the following commands from root directory to build and run locally
+# docker build -f automation/Dockerfile -t <NAME> .
+# docker run -it <NAME>
+FROM rust:latest
+RUN apt-get update
+RUN apt-get --yes upgrade
+# tzdata is a dependency, won't install otherwise
+ARG DEBIAN_FRONTEND=noninteractive
+
+RUN rustup target add thumbv6m-none-eabi && \
+	rustup component add rustfmt clippy

automation/Jenkinsfile

@@ -0,0 +1,39 @@
+pipeline {
+    agent any
+
+    stages {
+        stage('Clippy') {
+            agent {
+                dockerfile {
+                    dir 'automation'
+                    reuseNode true
+                }
+            }
+            steps {
+                sh 'cargo clippy'
+            }
+        }
+        stage('Rustfmt') {
+            agent {
+                dockerfile {
+                    dir 'automation'
+                    reuseNode true
+                }
+            }
+            steps {
+                sh 'cargo fmt'
+            }
+        }
+        stage('Check') {
+            agent {
+                dockerfile {
+                    dir 'automation'
+                    reuseNode true
+                }
+            }
+            steps {
+                sh 'cargo check --target thumbv6m-none-eabi'
+            }
+        }
+    }
+}

src/i2ca/status.rs

@@ -13,27 +13,6 @@ impl From<crate::R<STATUS_SPEC>> for R {
         R(reader)
     }
 }
-#[doc = "Register `STATUS` writer"]
-pub struct W(crate::W<STATUS_SPEC>);
-impl core::ops::Deref for W {
-    type Target = crate::W<STATUS_SPEC>;
-    #[inline(always)]
-    fn deref(&self) -> &Self::Target {
-        &self.0
-    }
-}
-impl core::ops::DerefMut for W {
-    #[inline(always)]
-    fn deref_mut(&mut self) -> &mut Self::Target {
-        &mut self.0
-    }
-}
-impl From<crate::W<STATUS_SPEC>> for W {
-    #[inline(always)]
-    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
-        W(writer)
-    }
-}
 #[doc = "Field `WAITING` reader - Controller is Waiting"]
 pub struct WAITING_R(crate::FieldReader<bool, bool>);
 impl WAITING_R {
@@ -49,28 +28,6 @@ impl core::ops::Deref for WAITING_R {
         &self.0
     }
 }
-#[doc = "Field `WAITING` writer - Controller is Waiting"]
-pub struct WAITING_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> WAITING_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
-        self.w
-    }
-}
 #[doc = "Field `STALLED` reader - Controller is Stalled"]
 pub struct STALLED_R(crate::FieldReader<bool, bool>);
 impl STALLED_R {
@@ -86,28 +43,6 @@ impl core::ops::Deref for STALLED_R {
         &self.0
     }
 }
-#[doc = "Field `STALLED` writer - Controller is Stalled"]
-pub struct STALLED_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> STALLED_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
-        self.w
-    }
-}
 #[doc = "Field `ARBLOST` reader - I2C Arbitration was lost"]
 pub struct ARBLOST_R(crate::FieldReader<bool, bool>);
 impl ARBLOST_R {
@@ -123,28 +58,6 @@ impl core::ops::Deref for ARBLOST_R {
         &self.0
     }
 }
-#[doc = "Field `ARBLOST` writer - I2C Arbitration was lost"]
-pub struct ARBLOST_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> ARBLOST_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
-        self.w
-    }
-}
 #[doc = "Field `NACKADDR` reader - I2C Address was not Acknowledged"]
 pub struct NACKADDR_R(crate::FieldReader<bool, bool>);
 impl NACKADDR_R {
@@ -160,28 +73,6 @@ impl core::ops::Deref for NACKADDR_R {
         &self.0
     }
 }
-#[doc = "Field `NACKADDR` writer - I2C Address was not Acknowledged"]
-pub struct NACKADDR_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> NACKADDR_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
-        self.w
-    }
-}
 #[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"]
 pub struct NACKDATA_R(crate::FieldReader<bool, bool>);
 impl NACKDATA_R {
@@ -197,28 +88,6 @@ impl core::ops::Deref for NACKDATA_R {
         &self.0
     }
 }
-#[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"]
-pub struct NACKDATA_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> NACKDATA_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
-        self.w
-    }
-}
 #[doc = "Field `RXNEMPTY` reader - RX FIFO is Not Empty"]
 pub struct RXNEMPTY_R(crate::FieldReader<bool, bool>);
 impl RXNEMPTY_R {
@@ -234,28 +103,6 @@ impl core::ops::Deref for RXNEMPTY_R {
         &self.0
     }
 }
-#[doc = "Field `RXNEMPTY` writer - RX FIFO is Not Empty"]
-pub struct RXNEMPTY_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> RXNEMPTY_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
-        self.w
-    }
-}
 #[doc = "Field `RXFULL` reader - RX FIFO is Full"]
 pub struct RXFULL_R(crate::FieldReader<bool, bool>);
 impl RXFULL_R {
@@ -271,28 +118,6 @@ impl core::ops::Deref for RXFULL_R {
         &self.0
     }
 }
-#[doc = "Field `RXFULL` writer - RX FIFO is Full"]
-pub struct RXFULL_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> RXFULL_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
-        self.w
-    }
-}
 #[doc = "Field `RXTRIGGER` reader - RX FIFO Above Trigger Level"]
 pub struct RXTRIGGER_R(crate::FieldReader<bool, bool>);
 impl RXTRIGGER_R {
@@ -308,28 +133,6 @@ impl core::ops::Deref for RXTRIGGER_R {
         &self.0
     }
 }
-#[doc = "Field `RXTRIGGER` writer - RX FIFO Above Trigger Level"]
-pub struct RXTRIGGER_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> RXTRIGGER_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
-        self.w
-    }
-}
 #[doc = "Field `TXEMPTY` reader - TX FIFO is Empty"]
 pub struct TXEMPTY_R(crate::FieldReader<bool, bool>);
 impl TXEMPTY_R {
@@ -345,28 +148,6 @@ impl core::ops::Deref for TXEMPTY_R {
         &self.0
     }
 }
-#[doc = "Field `TXEMPTY` writer - TX FIFO is Empty"]
-pub struct TXEMPTY_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> TXEMPTY_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
-        self.w
-    }
-}
 #[doc = "Field `TXNFULL` reader - TX FIFO is Full"]
 pub struct TXNFULL_R(crate::FieldReader<bool, bool>);
 impl TXNFULL_R {
@@ -382,28 +163,6 @@ impl core::ops::Deref for TXNFULL_R {
         &self.0
     }
 }
-#[doc = "Field `TXNFULL` writer - TX FIFO is Full"]
-pub struct TXNFULL_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> TXNFULL_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
-        self.w
-    }
-}
 #[doc = "Field `TXTRIGGER` reader - TX FIFO Below Trigger Level"]
 pub struct TXTRIGGER_R(crate::FieldReader<bool, bool>);
 impl TXTRIGGER_R {
@@ -419,28 +178,6 @@ impl core::ops::Deref for TXTRIGGER_R {
         &self.0
     }
 }
-#[doc = "Field `TXTRIGGER` writer - TX FIFO Below Trigger Level"]
-pub struct TXTRIGGER_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> TXTRIGGER_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
-        self.w
-    }
-}
 #[doc = "Field `RAW_SDA` reader - I2C Raw SDA value"]
 pub struct RAW_SDA_R(crate::FieldReader<bool, bool>);
 impl RAW_SDA_R {
@@ -456,28 +193,6 @@ impl core::ops::Deref for RAW_SDA_R {
         &self.0
     }
 }
-#[doc = "Field `RAW_SDA` writer - I2C Raw SDA value"]
-pub struct RAW_SDA_W<'a> {
-    w: &'a mut W,
-}
-impl<'a> RAW_SDA_W<'a> {
-    #[doc = r"Sets the field bit"]
-    #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
-    }
-    #[doc = r"Clears the field bit"]
-    #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
-    }
-    #[doc = r"Writes raw bits to the field"]
-    #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
-        self.w
-    }
-}
 #[doc = "Field `RAW_SCL` reader - I2C Raw SCL value"]
 pub struct RAW_SCL_R(crate::FieldReader<bool, bool>);
 impl RAW_SCL_R {
@@ -493,26 +208,34 @@ impl core::ops::Deref for RAW_SCL_R {
         &self.0
     }
 }
-#[doc = "Field `RAW_SCL` writer - I2C Raw SCL value"]
-pub struct RAW_SCL_W<'a> {
-    w: &'a mut W,
+#[doc = "Field `I2C_IDLE` reader - I2C bus is Idle"]
+pub struct I2C_IDLE_R(crate::FieldReader<bool, bool>);
+impl I2C_IDLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        I2C_IDLE_R(crate::FieldReader::new(bits))
+    }
 }
-impl<'a> RAW_SCL_W<'a> {
-    #[doc = r"Sets the field bit"]
+impl core::ops::Deref for I2C_IDLE_R {
+    type Target = crate::FieldReader<bool, bool>;
     #[inline(always)]
-    pub fn set_bit(self) -> &'a mut W {
-        self.bit(true)
+    fn deref(&self) -> &Self::Target {
+        &self.0
     }
-    #[doc = r"Clears the field bit"]
+}
+#[doc = "Field `IDLE` reader - Controller is Idle"]
+pub struct IDLE_R(crate::FieldReader<bool, bool>);
+impl IDLE_R {
     #[inline(always)]
-    pub fn clear_bit(self) -> &'a mut W {
-        self.bit(false)
+    pub(crate) fn new(bits: bool) -> Self {
+        IDLE_R(crate::FieldReader::new(bits))
     }
-    #[doc = r"Writes raw bits to the field"]
+}
+impl core::ops::Deref for IDLE_R {
+    type Target = crate::FieldReader<bool, bool>;
     #[inline(always)]
-    pub fn bit(self, value: bool) -> &'a mut W {
-        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
-        self.w
+    fn deref(&self) -> &Self::Target {
+        &self.0
     }
 }
 impl R {
@@ -581,81 +304,18 @@ impl R {
     pub fn raw_scl(&self) -> RAW_SCL_R {
         RAW_SCL_R::new(((self.bits >> 31) & 0x01) != 0)
     }
-}
-impl W {
-    #[doc = "Bit 2 - Controller is Waiting"]
+    #[doc = "Bit 0 - I2C bus is Idle"]
     #[inline(always)]
-    pub fn waiting(&mut self) -> WAITING_W {
-        WAITING_W { w: self }
+    pub fn i2c_idle(&self) -> I2C_IDLE_R {
+        I2C_IDLE_R::new((self.bits & 0x01) != 0)
     }
-    #[doc = "Bit 3 - Controller is Stalled"]
+    #[doc = "Bit 1 - Controller is Idle"]
     #[inline(always)]
-    pub fn stalled(&mut self) -> STALLED_W {
-        STALLED_W { w: self }
-    }
-    #[doc = "Bit 4 - I2C Arbitration was lost"]
-    #[inline(always)]
-    pub fn arblost(&mut self) -> ARBLOST_W {
-        ARBLOST_W { w: self }
-    }
-    #[doc = "Bit 5 - I2C Address was not Acknowledged"]
-    #[inline(always)]
-    pub fn nackaddr(&mut self) -> NACKADDR_W {
-        NACKADDR_W { w: self }
-    }
-    #[doc = "Bit 6 - I2C Data was not Acknowledged"]
-    #[inline(always)]
-    pub fn nackdata(&mut self) -> NACKDATA_W {
-        NACKDATA_W { w: self }
-    }
-    #[doc = "Bit 8 - RX FIFO is Not Empty"]
-    #[inline(always)]
-    pub fn rxnempty(&mut self) -> RXNEMPTY_W {
-        RXNEMPTY_W { w: self }
-    }
-    #[doc = "Bit 9 - RX FIFO is Full"]
-    #[inline(always)]
-    pub fn rxfull(&mut self) -> RXFULL_W {
-        RXFULL_W { w: self }
-    }
-    #[doc = "Bit 11 - RX FIFO Above Trigger Level"]
-    #[inline(always)]
-    pub fn rxtrigger(&mut self) -> RXTRIGGER_W {
-        RXTRIGGER_W { w: self }
-    }
-    #[doc = "Bit 12 - TX FIFO is Empty"]
-    #[inline(always)]
-    pub fn txempty(&mut self) -> TXEMPTY_W {
-        TXEMPTY_W { w: self }
-    }
-    #[doc = "Bit 13 - TX FIFO is Full"]
-    #[inline(always)]
-    pub fn txnfull(&mut self) -> TXNFULL_W {
-        TXNFULL_W { w: self }
-    }
-    #[doc = "Bit 15 - TX FIFO Below Trigger Level"]
-    #[inline(always)]
-    pub fn txtrigger(&mut self) -> TXTRIGGER_W {
-        TXTRIGGER_W { w: self }
-    }
-    #[doc = "Bit 30 - I2C Raw SDA value"]
-    #[inline(always)]
-    pub fn raw_sda(&mut self) -> RAW_SDA_W {
-        RAW_SDA_W { w: self }
-    }
-    #[doc = "Bit 31 - I2C Raw SCL value"]
-    #[inline(always)]
-    pub fn raw_scl(&mut self) -> RAW_SCL_W {
-        RAW_SCL_W { w: self }
-    }
-    #[doc = "Writes raw bits to the register."]
-    #[inline(always)]
-    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
-        self.0.bits(bits);
-        self
+    pub fn idle(&self) -> IDLE_R {
+        IDLE_R::new(((self.bits >> 1) & 0x01) != 0)
     }
 }
-#[doc = "I2C Controller Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+#[doc = "I2C Controller Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
 pub struct STATUS_SPEC;
 impl crate::RegisterSpec for STATUS_SPEC {
     type Ux = u32;
@@ -664,10 +324,6 @@ impl crate::RegisterSpec for STATUS_SPEC {
 impl crate::Readable for STATUS_SPEC {
     type Reader = R;
 }
-#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
-impl crate::Writable for STATUS_SPEC {
-    type Writer = W;
-}
 #[doc = "`reset()` method sets STATUS to value 0"]
 impl crate::Resettable for STATUS_SPEC {
     #[inline(always)]

src/lib.rs

@@ -1,4 +1,4 @@
-#![doc = "Peripheral access API for VA108XX microcontrollers (generated using svd2rust v0.19.0 (43be074 2021-11-09))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
+#![doc = "Peripheral access API for VA108XX microcontrollers (generated using svd2rust v0.19.0 (b45bdce 2021-12-04))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
 svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
 #![deny(const_err)]
 #![deny(dead_code)]

src/sysconfig/peripheral_reset.rs

@@ -34,7 +34,620 @@ impl From<crate::W<PERIPHERAL_RESET_SPEC>> for W {
         W(writer)
     }
 }
+#[doc = "Field `PORTA` reader - Reset PORTA"]
+pub struct PORTA_R(crate::FieldReader<bool, bool>);
+impl PORTA_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        PORTA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PORTA_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PORTA` writer - Reset PORTA"]
+pub struct PORTA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PORTA_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `PORTB` reader - Reset PORTB"]
+pub struct PORTB_R(crate::FieldReader<bool, bool>);
+impl PORTB_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        PORTB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PORTB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PORTB` writer - Reset PORTB"]
+pub struct PORTB_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PORTB_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `SPI_0` reader - Reset SPI\\[0\\]"]
+pub struct SPI_0_R(crate::FieldReader<bool, bool>);
+impl SPI_0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        SPI_0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SPI_0_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SPI_0` writer - Reset SPI\\[0\\]"]
+pub struct SPI_0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SPI_0_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `SPI_1` reader - Reset SPI\\[1\\]"]
+pub struct SPI_1_R(crate::FieldReader<bool, bool>);
+impl SPI_1_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        SPI_1_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SPI_1_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SPI_1` writer - Reset SPI\\[1\\]"]
+pub struct SPI_1_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SPI_1_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `SPI_2` reader - Reset SPI\\[2\\]"]
+pub struct SPI_2_R(crate::FieldReader<bool, bool>);
+impl SPI_2_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        SPI_2_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SPI_2_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SPI_2` writer - Reset SPI\\[2\\]"]
+pub struct SPI_2_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SPI_2_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `UART_0` reader - Reset UART\\[0\\]"]
+pub struct UART_0_R(crate::FieldReader<bool, bool>);
+impl UART_0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        UART_0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for UART_0_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `UART_0` writer - Reset UART\\[0\\]"]
+pub struct UART_0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> UART_0_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Field `UART_1` reader - Reset UART\\[1\\]"]
+pub struct UART_1_R(crate::FieldReader<bool, bool>);
+impl UART_1_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        UART_1_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for UART_1_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `UART_1` writer - Reset UART\\[1\\]"]
+pub struct UART_1_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> UART_1_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `I2C_0` reader - Reset I2C\\[0\\]"]
+pub struct I2C_0_R(crate::FieldReader<bool, bool>);
+impl I2C_0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        I2C_0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for I2C_0_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `I2C_0` writer - Reset I2C\\[0\\]"]
+pub struct I2C_0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> I2C_0_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
+        self.w
+    }
+}
+#[doc = "Field `I2C_1` reader - Reset I2C\\[1\\]"]
+pub struct I2C_1_R(crate::FieldReader<bool, bool>);
+impl I2C_1_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        I2C_1_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for I2C_1_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `I2C_1` writer - Reset I2C\\[1\\]"]
+pub struct I2C_1_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> I2C_1_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
+        self.w
+    }
+}
+#[doc = "Field `IRQSEL` reader - Reset IRQ selector"]
+pub struct IRQSEL_R(crate::FieldReader<bool, bool>);
+impl IRQSEL_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        IRQSEL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for IRQSEL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `IRQSEL` writer - Reset IRQ selector"]
+pub struct IRQSEL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> IRQSEL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
+        self.w
+    }
+}
+#[doc = "Field `IOCONFIG` reader - Reset IO Configuration block"]
+pub struct IOCONFIG_R(crate::FieldReader<bool, bool>);
+impl IOCONFIG_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        IOCONFIG_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for IOCONFIG_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `IOCONFIG` writer - Reset IO Configuration block"]
+pub struct IOCONFIG_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> IOCONFIG_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
+        self.w
+    }
+}
+#[doc = "Field `UTILITY` reader - Reset Utility Block"]
+pub struct UTILITY_R(crate::FieldReader<bool, bool>);
+impl UTILITY_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        UTILITY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for UTILITY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `UTILITY` writer - Reset Utility Block"]
+pub struct UTILITY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> UTILITY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
+        self.w
+    }
+}
+#[doc = "Field `GPIO` reader - Reset GPIO"]
+pub struct GPIO_R(crate::FieldReader<bool, bool>);
+impl GPIO_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        GPIO_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for GPIO_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `GPIO` writer - Reset GPIO"]
+pub struct GPIO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> GPIO_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Reset PORTA"]
+    #[inline(always)]
+    pub fn porta(&self) -> PORTA_R {
+        PORTA_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Reset PORTB"]
+    #[inline(always)]
+    pub fn portb(&self) -> PORTB_R {
+        PORTB_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Reset SPI\\[0\\]"]
+    #[inline(always)]
+    pub fn spi_0(&self) -> SPI_0_R {
+        SPI_0_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Reset SPI\\[1\\]"]
+    #[inline(always)]
+    pub fn spi_1(&self) -> SPI_1_R {
+        SPI_1_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 6 - Reset SPI\\[2\\]"]
+    #[inline(always)]
+    pub fn spi_2(&self) -> SPI_2_R {
+        SPI_2_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Reset UART\\[0\\]"]
+    #[inline(always)]
+    pub fn uart_0(&self) -> UART_0_R {
+        UART_0_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Reset UART\\[1\\]"]
+    #[inline(always)]
+    pub fn uart_1(&self) -> UART_1_R {
+        UART_1_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 16 - Reset I2C\\[0\\]"]
+    #[inline(always)]
+    pub fn i2c_0(&self) -> I2C_0_R {
+        I2C_0_R::new(((self.bits >> 16) & 0x01) != 0)
+    }
+    #[doc = "Bit 17 - Reset I2C\\[1\\]"]
+    #[inline(always)]
+    pub fn i2c_1(&self) -> I2C_1_R {
+        I2C_1_R::new(((self.bits >> 17) & 0x01) != 0)
+    }
+    #[doc = "Bit 21 - Reset IRQ selector"]
+    #[inline(always)]
+    pub fn irqsel(&self) -> IRQSEL_R {
+        IRQSEL_R::new(((self.bits >> 21) & 0x01) != 0)
+    }
+    #[doc = "Bit 22 - Reset IO Configuration block"]
+    #[inline(always)]
+    pub fn ioconfig(&self) -> IOCONFIG_R {
+        IOCONFIG_R::new(((self.bits >> 22) & 0x01) != 0)
+    }
+    #[doc = "Bit 23 - Reset Utility Block"]
+    #[inline(always)]
+    pub fn utility(&self) -> UTILITY_R {
+        UTILITY_R::new(((self.bits >> 23) & 0x01) != 0)
+    }
+    #[doc = "Bit 24 - Reset GPIO"]
+    #[inline(always)]
+    pub fn gpio(&self) -> GPIO_R {
+        GPIO_R::new(((self.bits >> 24) & 0x01) != 0)
+    }
+}
 impl W {
+    #[doc = "Bit 0 - Reset PORTA"]
+    #[inline(always)]
+    pub fn porta(&mut self) -> PORTA_W {
+        PORTA_W { w: self }
+    }
+    #[doc = "Bit 1 - Reset PORTB"]
+    #[inline(always)]
+    pub fn portb(&mut self) -> PORTB_W {
+        PORTB_W { w: self }
+    }
+    #[doc = "Bit 4 - Reset SPI\\[0\\]"]
+    #[inline(always)]
+    pub fn spi_0(&mut self) -> SPI_0_W {
+        SPI_0_W { w: self }
+    }
+    #[doc = "Bit 5 - Reset SPI\\[1\\]"]
+    #[inline(always)]
+    pub fn spi_1(&mut self) -> SPI_1_W {
+        SPI_1_W { w: self }
+    }
+    #[doc = "Bit 6 - Reset SPI\\[2\\]"]
+    #[inline(always)]
+    pub fn spi_2(&mut self) -> SPI_2_W {
+        SPI_2_W { w: self }
+    }
+    #[doc = "Bit 8 - Reset UART\\[0\\]"]
+    #[inline(always)]
+    pub fn uart_0(&mut self) -> UART_0_W {
+        UART_0_W { w: self }
+    }
+    #[doc = "Bit 9 - Reset UART\\[1\\]"]
+    #[inline(always)]
+    pub fn uart_1(&mut self) -> UART_1_W {
+        UART_1_W { w: self }
+    }
+    #[doc = "Bit 16 - Reset I2C\\[0\\]"]
+    #[inline(always)]
+    pub fn i2c_0(&mut self) -> I2C_0_W {
+        I2C_0_W { w: self }
+    }
+    #[doc = "Bit 17 - Reset I2C\\[1\\]"]
+    #[inline(always)]
+    pub fn i2c_1(&mut self) -> I2C_1_W {
+        I2C_1_W { w: self }
+    }
+    #[doc = "Bit 21 - Reset IRQ selector"]
+    #[inline(always)]
+    pub fn irqsel(&mut self) -> IRQSEL_W {
+        IRQSEL_W { w: self }
+    }
+    #[doc = "Bit 22 - Reset IO Configuration block"]
+    #[inline(always)]
+    pub fn ioconfig(&mut self) -> IOCONFIG_W {
+        IOCONFIG_W { w: self }
+    }
+    #[doc = "Bit 23 - Reset Utility Block"]
+    #[inline(always)]
+    pub fn utility(&mut self) -> UTILITY_W {
+        UTILITY_W { w: self }
+    }
+    #[doc = "Bit 24 - Reset GPIO"]
+    #[inline(always)]
+    pub fn gpio(&mut self) -> GPIO_W {
+        GPIO_W { w: self }
+    }
     #[doc = "Writes raw bits to the register."]
     #[inline(always)]
     pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {

src/tim0/csd_ctrl.rs

@@ -404,6 +404,43 @@ impl<'a> CSDXXX2_W<'a> {
         self.w
     }
 }
+#[doc = "Field `CSDTRG2` reader - Cascade 2 Enabled as Trigger"]
+pub struct CSDTRG2_R(crate::FieldReader<bool, bool>);
+impl CSDTRG2_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDTRG2_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDTRG2_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDTRG2` writer - Cascade 2 Enabled as Trigger"]
+pub struct CSDTRG2_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDTRG2_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
+        self.w
+    }
+}
 impl R {
     #[doc = "Bit 0 - Cascade 0 Enable"]
     #[inline(always)]
@@ -455,6 +492,11 @@ impl R {
     pub fn csdxxx2(&self) -> CSDXXX2_R {
         CSDXXX2_R::new(((self.bits >> 11) & 0x01) != 0)
     }
+    #[doc = "Bit 10 - Cascade 2 Enabled as Trigger"]
+    #[inline(always)]
+    pub fn csdtrg2(&self) -> CSDTRG2_R {
+        CSDTRG2_R::new(((self.bits >> 10) & 0x01) != 0)
+    }
 }
 impl W {
     #[doc = "Bit 0 - Cascade 0 Enable"]
@@ -507,6 +549,11 @@ impl W {
     pub fn csdxxx2(&mut self) -> CSDXXX2_W {
         CSDXXX2_W { w: self }
     }
+    #[doc = "Bit 10 - Cascade 2 Enabled as Trigger"]
+    #[inline(always)]
+    pub fn csdtrg2(&mut self) -> CSDTRG2_W {
+        CSDTRG2_W { w: self }
+    }
     #[doc = "Writes raw bits to the register."]
     #[inline(always)]
     pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {

svd/va108xx-base.svd.patched

@@ -293,7 +293,20 @@
           <description>Peripheral Reset Control</description>
           <addressOffset>0x078</addressOffset>
           <resetValue>0xFFFFFFFF</resetValue>
-        </register>
+        <fields><field><name>PORTA</name><description>Reset PORTA</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>PORTB</name><description>Reset PORTB</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>SPI_0</name><description>Reset SPI[0]</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>SPI_1</name><description>Reset SPI[1]</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>SPI_2</name><description>Reset SPI[2]</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>UART_0</name><description>Reset UART[0]</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>UART_1</name><description>Reset UART[1]</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>I2C_0</name><description>Reset I2C[0]</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>I2C_1</name><description>Reset I2C[1]</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>IRQSEL</name><description>Reset IRQ selector</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>IOCONFIG</name><description>Reset IO Configuration block</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>UTILITY</name><description>Reset Utility Block</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>GPIO</name><description>Reset GPIO</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field>
+            </fields></register>
         <register>
           <name>PERIPHERAL_CLK_ENABLE</name>
           <description>Peripheral Enable Control</description>
@@ -1283,7 +1296,8 @@
               <description>Cascade 2 test  mode</description>
               <bitRange>[11:11]</bitRange>
             </field>
-          </fields>
+          <field><name>CSDTRG2</name><description>Cascade 2 Enabled as Trigger</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field>
+            </fields>
         </register>
         <register>
           <name>CASCADE0</name>
@@ -2157,7 +2171,7 @@
           <name>STATUS</name>
           <description>I2C Controller Status Register</description>
           <addressOffset>0x018</addressOffset>
-          <fields>
+          <access>read-only</access><fields>
             <field>
               <name>WAITING</name>
               <description>Controller is Waiting</description>
@@ -2223,7 +2237,9 @@
               <description>I2C Raw SCL value</description>
               <bitRange>[31:31]</bitRange>
             </field>
-          </fields>
+          <field><name>I2C_IDLE</name><description>I2C bus is Idle</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field>
+            <field><name>IDLE</name><description>Controller is Idle</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field>
+            </fields>
         </register>
         <register>
           <name>STATE</name>

svd/va108xx-patch.yml

@@ -56,4 +56,82 @@ SYSCONFIG:
           bitOffset: 24
           bitWidth: 1
 
+  PERIPHERAL_RESET:
+    _add:
+      PORTA:
+        description: Reset PORTA
+        bitOffset: 0
+        bitWidth: 1
+      PORTB:
+        description: Reset PORTB
+        bitOffset: 1
+        bitWidth: 1
+      SPI_0:
+        description: Reset SPI[0]
+        bitOffset: 4
+        bitWidth: 1
+      SPI_1:
+        description: Reset SPI[1]
+        bitOffset: 5
+        bitWidth: 1
+      SPI_2:
+        description: Reset SPI[2]
+        bitOffset: 6
+        bitWidth: 1
+      UART_0:
+        description: Reset UART[0]
+        bitOffset: 8
+        bitWidth: 1
+      UART_1:
+        description: Reset UART[1]
+        bitOffset: 9
+        bitWidth: 1
+      I2C_0:
+        description: Reset I2C[0]
+        bitOffset: 16
+        bitWidth: 1
+      I2C_1:
+        description: Reset I2C[1]
+        bitOffset: 17
+        bitWidth: 1
+      IRQSEL:
+        description: Reset IRQ selector
+        bitOffset: 21
+        bitWidth: 1
+      IOCONFIG:
+        description: Reset IO Configuration block
+        bitOffset: 22
+        bitWidth: 1
+      UTILITY:
+        description: Reset Utility Block
+        bitOffset: 23
+        bitWidth: 1
+      GPIO:
+        description: Reset GPIO
+        bitOffset: 24
+        bitWidth: 1
 
+# I2CB is derived from I2CA
+I2CA:
+  _modify:
+    STATUS:
+      access: read-only
+  STATUS:
+    _add:
+      I2C_IDLE:
+        description: I2C bus is Idle
+        bitOffset: 0
+        bitWidth: 1
+      IDLE:
+        description: Controller is Idle
+        bitOffset: 1
+        bitWidth: 1
+
+# All TIMs are derived from TIM0
+TIM0:
+  CSD_CTRL:
+    _add:
+      CSDTRG2:
+        description: Cascade 2 Enabled as Trigger
+        bitOffset: 10
+        bitWidth: 1