114 lines
3.2 KiB
Rust
114 lines
3.2 KiB
Rust
#[doc = "Register `IRQ_END` reader"]
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pub struct R(crate::R<IRQ_END_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<IRQ_END_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<IRQ_END_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<IRQ_END_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Field `RORIM` reader - RX Overrun"]
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pub struct RORIM_R(crate::FieldReader<bool, bool>);
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impl RORIM_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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RORIM_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for RORIM_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `RTIM` reader - RX Timeout"]
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pub struct RTIM_R(crate::FieldReader<bool, bool>);
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impl RTIM_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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RTIM_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for RTIM_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `RXIM` reader - RX Fifo is at least half full"]
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pub struct RXIM_R(crate::FieldReader<bool, bool>);
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impl RXIM_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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RXIM_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for RXIM_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `TXIM` reader - TX Fifo is at least half empty"]
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pub struct TXIM_R(crate::FieldReader<bool, bool>);
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impl TXIM_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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TXIM_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for TXIM_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl R {
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#[doc = "Bit 0 - RX Overrun"]
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#[inline(always)]
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pub fn rorim(&self) -> RORIM_R {
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RORIM_R::new((self.bits & 0x01) != 0)
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}
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#[doc = "Bit 1 - RX Timeout"]
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#[inline(always)]
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pub fn rtim(&self) -> RTIM_R {
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RTIM_R::new(((self.bits >> 1) & 0x01) != 0)
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}
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#[doc = "Bit 2 - RX Fifo is at least half full"]
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#[inline(always)]
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pub fn rxim(&self) -> RXIM_R {
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RXIM_R::new(((self.bits >> 2) & 0x01) != 0)
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}
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#[doc = "Bit 3 - TX Fifo is at least half empty"]
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#[inline(always)]
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pub fn txim(&self) -> TXIM_R {
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TXIM_R::new(((self.bits >> 3) & 0x01) != 0)
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}
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}
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#[doc = "Enabled Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"]
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pub struct IRQ_END_SPEC;
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impl crate::RegisterSpec for IRQ_END_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [irq_end::R](R) reader structure"]
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impl crate::Readable for IRQ_END_SPEC {
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type Reader = R;
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}
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#[doc = "`reset()` method sets IRQ_END to value 0"]
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impl crate::Resettable for IRQ_END_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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