235 lines
6.6 KiB
Rust
235 lines
6.6 KiB
Rust
#[doc = "Register `IRQ_CLR` writer"]
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pub struct W(crate::W<IRQ_CLR_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<IRQ_CLR_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<IRQ_CLR_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<IRQ_CLR_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `IRQ_RX` writer - RX Interrupt"]
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pub struct IRQ_RX_W<'a> {
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w: &'a mut W,
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}
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impl<'a> IRQ_RX_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
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self.w
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}
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}
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#[doc = "Field `IRQ_RX_STATUS` writer - RX Status Interrupt"]
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pub struct IRQ_RX_STATUS_W<'a> {
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w: &'a mut W,
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}
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impl<'a> IRQ_RX_STATUS_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Field `IRQ_RX_TO` writer - RX Timeout Interrupt"]
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pub struct IRQ_RX_TO_W<'a> {
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w: &'a mut W,
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}
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impl<'a> IRQ_RX_TO_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
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self.w
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}
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}
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#[doc = "Field `IRQ_TX` writer - TX Interrupt"]
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pub struct IRQ_TX_W<'a> {
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w: &'a mut W,
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}
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impl<'a> IRQ_TX_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
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self.w
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}
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}
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#[doc = "Field `IRQ_TX_STATUS` writer - TX Status Interrupt"]
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pub struct IRQ_TX_STATUS_W<'a> {
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w: &'a mut W,
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}
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impl<'a> IRQ_TX_STATUS_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
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self.w
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}
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}
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#[doc = "Field `IRQ_TX_EMPTY` writer - TX Empty Interrupt"]
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pub struct IRQ_TX_EMPTY_W<'a> {
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w: &'a mut W,
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}
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impl<'a> IRQ_TX_EMPTY_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
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self.w
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}
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}
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#[doc = "Field `IRQ_TX_CTS` writer - TX CTS Change Interrupt"]
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pub struct IRQ_TX_CTS_W<'a> {
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w: &'a mut W,
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}
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impl<'a> IRQ_TX_CTS_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
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self.w
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}
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}
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impl W {
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#[doc = "Bit 0 - RX Interrupt"]
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#[inline(always)]
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pub fn irq_rx(&mut self) -> IRQ_RX_W {
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IRQ_RX_W { w: self }
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}
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#[doc = "Bit 1 - RX Status Interrupt"]
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#[inline(always)]
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pub fn irq_rx_status(&mut self) -> IRQ_RX_STATUS_W {
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IRQ_RX_STATUS_W { w: self }
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}
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#[doc = "Bit 2 - RX Timeout Interrupt"]
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#[inline(always)]
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pub fn irq_rx_to(&mut self) -> IRQ_RX_TO_W {
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IRQ_RX_TO_W { w: self }
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}
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#[doc = "Bit 4 - TX Interrupt"]
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#[inline(always)]
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pub fn irq_tx(&mut self) -> IRQ_TX_W {
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IRQ_TX_W { w: self }
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}
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#[doc = "Bit 5 - TX Status Interrupt"]
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#[inline(always)]
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pub fn irq_tx_status(&mut self) -> IRQ_TX_STATUS_W {
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IRQ_TX_STATUS_W { w: self }
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}
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#[doc = "Bit 6 - TX Empty Interrupt"]
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#[inline(always)]
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pub fn irq_tx_empty(&mut self) -> IRQ_TX_EMPTY_W {
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IRQ_TX_EMPTY_W { w: self }
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}
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#[doc = "Bit 7 - TX CTS Change Interrupt"]
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#[inline(always)]
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pub fn irq_tx_cts(&mut self) -> IRQ_TX_CTS_W {
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IRQ_TX_CTS_W { w: self }
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "IRQ Clear Status Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"]
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pub struct IRQ_CLR_SPEC;
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impl crate::RegisterSpec for IRQ_CLR_SPEC {
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type Ux = u32;
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}
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#[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"]
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impl crate::Writable for IRQ_CLR_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets IRQ_CLR to value 0"]
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impl crate::Resettable for IRQ_CLR_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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