584 lines
16 KiB
Rust
584 lines
16 KiB
Rust
#[doc = "Register `CSD_CTRL` reader"]
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pub struct R(crate::R<CSD_CTRL_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<CSD_CTRL_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<CSD_CTRL_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<CSD_CTRL_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `CSD_CTRL` writer"]
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pub struct W(crate::W<CSD_CTRL_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<CSD_CTRL_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<CSD_CTRL_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<CSD_CTRL_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `CSDEN0` reader - Cascade 0 Enable"]
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pub struct CSDEN0_R(crate::FieldReader<bool, bool>);
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impl CSDEN0_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDEN0_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDEN0_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDEN0` writer - Cascade 0 Enable"]
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pub struct CSDEN0_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDEN0_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
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self.w
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}
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}
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#[doc = "Field `CSDINV0` reader - Cascade 0 Invert"]
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pub struct CSDINV0_R(crate::FieldReader<bool, bool>);
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impl CSDINV0_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDINV0_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDINV0_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDINV0` writer - Cascade 0 Invert"]
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pub struct CSDINV0_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDINV0_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Field `CSDEN1` reader - Cascade 1 Enable"]
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pub struct CSDEN1_R(crate::FieldReader<bool, bool>);
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impl CSDEN1_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDEN1_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDEN1_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDEN1` writer - Cascade 1 Enable"]
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pub struct CSDEN1_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDEN1_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
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self.w
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}
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}
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#[doc = "Field `CSDINV1` reader - Cascade 1 Invert"]
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pub struct CSDINV1_R(crate::FieldReader<bool, bool>);
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impl CSDINV1_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDINV1_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDINV1_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDINV1` writer - Cascade 1 Invert"]
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pub struct CSDINV1_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDINV1_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
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self.w
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}
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}
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#[doc = "Field `DCASOP` reader - Dual Cascade Operation (0:AND, 1:OR)"]
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pub struct DCASOP_R(crate::FieldReader<bool, bool>);
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impl DCASOP_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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DCASOP_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for DCASOP_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `DCASOP` writer - Dual Cascade Operation (0:AND, 1:OR)"]
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pub struct DCASOP_W<'a> {
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w: &'a mut W,
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}
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impl<'a> DCASOP_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
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self.w
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}
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}
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#[doc = "Field `CSDTRG0` reader - Cascade 0 Enabled as Trigger"]
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pub struct CSDTRG0_R(crate::FieldReader<bool, bool>);
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impl CSDTRG0_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDTRG0_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDTRG0_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDTRG0` writer - Cascade 0 Enabled as Trigger"]
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pub struct CSDTRG0_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDTRG0_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
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self.w
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}
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}
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#[doc = "Field `CSDTRG1` reader - Cascade 1 Enabled as Trigger"]
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pub struct CSDTRG1_R(crate::FieldReader<bool, bool>);
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impl CSDTRG1_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDTRG1_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDTRG1_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDTRG1` writer - Cascade 1 Enabled as Trigger"]
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pub struct CSDTRG1_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDTRG1_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
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self.w
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}
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}
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#[doc = "Field `CSDEN2` reader - Cascade 2 Enable"]
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pub struct CSDEN2_R(crate::FieldReader<bool, bool>);
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impl CSDEN2_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDEN2_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDEN2_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDEN2` writer - Cascade 2 Enable"]
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pub struct CSDEN2_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDEN2_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
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self.w
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}
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}
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#[doc = "Field `CSDINV2` reader - Cascade 2 Invert"]
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pub struct CSDINV2_R(crate::FieldReader<bool, bool>);
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impl CSDINV2_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDINV2_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDINV2_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDINV2` writer - Cascade 2 Invert"]
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pub struct CSDINV2_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDINV2_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
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self.w
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}
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}
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#[doc = "Field `CSDXXX2` reader - Cascade 2 test mode"]
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pub struct CSDXXX2_R(crate::FieldReader<bool, bool>);
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impl CSDXXX2_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDXXX2_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDXXX2_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDXXX2` writer - Cascade 2 test mode"]
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pub struct CSDXXX2_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDXXX2_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
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self.w
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}
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}
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#[doc = "Field `CSDTRG2` reader - Cascade 2 Enabled as Trigger"]
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pub struct CSDTRG2_R(crate::FieldReader<bool, bool>);
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impl CSDTRG2_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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CSDTRG2_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for CSDTRG2_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `CSDTRG2` writer - Cascade 2 Enabled as Trigger"]
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pub struct CSDTRG2_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CSDTRG2_W<'a> {
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#[doc = r"Sets the field bit"]
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|
#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
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self.w
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}
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}
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impl R {
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#[doc = "Bit 0 - Cascade 0 Enable"]
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#[inline(always)]
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pub fn csden0(&self) -> CSDEN0_R {
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CSDEN0_R::new((self.bits & 0x01) != 0)
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}
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#[doc = "Bit 1 - Cascade 0 Invert"]
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#[inline(always)]
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pub fn csdinv0(&self) -> CSDINV0_R {
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CSDINV0_R::new(((self.bits >> 1) & 0x01) != 0)
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}
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#[doc = "Bit 2 - Cascade 1 Enable"]
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#[inline(always)]
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pub fn csden1(&self) -> CSDEN1_R {
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CSDEN1_R::new(((self.bits >> 2) & 0x01) != 0)
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}
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#[doc = "Bit 3 - Cascade 1 Invert"]
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#[inline(always)]
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pub fn csdinv1(&self) -> CSDINV1_R {
|
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CSDINV1_R::new(((self.bits >> 3) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 4 - Dual Cascade Operation (0:AND, 1:OR)"]
|
|
#[inline(always)]
|
|
pub fn dcasop(&self) -> DCASOP_R {
|
|
DCASOP_R::new(((self.bits >> 4) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 6 - Cascade 0 Enabled as Trigger"]
|
|
#[inline(always)]
|
|
pub fn csdtrg0(&self) -> CSDTRG0_R {
|
|
CSDTRG0_R::new(((self.bits >> 6) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 7 - Cascade 1 Enabled as Trigger"]
|
|
#[inline(always)]
|
|
pub fn csdtrg1(&self) -> CSDTRG1_R {
|
|
CSDTRG1_R::new(((self.bits >> 7) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 8 - Cascade 2 Enable"]
|
|
#[inline(always)]
|
|
pub fn csden2(&self) -> CSDEN2_R {
|
|
CSDEN2_R::new(((self.bits >> 8) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 9 - Cascade 2 Invert"]
|
|
#[inline(always)]
|
|
pub fn csdinv2(&self) -> CSDINV2_R {
|
|
CSDINV2_R::new(((self.bits >> 9) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 11 - Cascade 2 test mode"]
|
|
#[inline(always)]
|
|
pub fn csdxxx2(&self) -> CSDXXX2_R {
|
|
CSDXXX2_R::new(((self.bits >> 11) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 10 - Cascade 2 Enabled as Trigger"]
|
|
#[inline(always)]
|
|
pub fn csdtrg2(&self) -> CSDTRG2_R {
|
|
CSDTRG2_R::new(((self.bits >> 10) & 0x01) != 0)
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = "Bit 0 - Cascade 0 Enable"]
|
|
#[inline(always)]
|
|
pub fn csden0(&mut self) -> CSDEN0_W {
|
|
CSDEN0_W { w: self }
|
|
}
|
|
#[doc = "Bit 1 - Cascade 0 Invert"]
|
|
#[inline(always)]
|
|
pub fn csdinv0(&mut self) -> CSDINV0_W {
|
|
CSDINV0_W { w: self }
|
|
}
|
|
#[doc = "Bit 2 - Cascade 1 Enable"]
|
|
#[inline(always)]
|
|
pub fn csden1(&mut self) -> CSDEN1_W {
|
|
CSDEN1_W { w: self }
|
|
}
|
|
#[doc = "Bit 3 - Cascade 1 Invert"]
|
|
#[inline(always)]
|
|
pub fn csdinv1(&mut self) -> CSDINV1_W {
|
|
CSDINV1_W { w: self }
|
|
}
|
|
#[doc = "Bit 4 - Dual Cascade Operation (0:AND, 1:OR)"]
|
|
#[inline(always)]
|
|
pub fn dcasop(&mut self) -> DCASOP_W {
|
|
DCASOP_W { w: self }
|
|
}
|
|
#[doc = "Bit 6 - Cascade 0 Enabled as Trigger"]
|
|
#[inline(always)]
|
|
pub fn csdtrg0(&mut self) -> CSDTRG0_W {
|
|
CSDTRG0_W { w: self }
|
|
}
|
|
#[doc = "Bit 7 - Cascade 1 Enabled as Trigger"]
|
|
#[inline(always)]
|
|
pub fn csdtrg1(&mut self) -> CSDTRG1_W {
|
|
CSDTRG1_W { w: self }
|
|
}
|
|
#[doc = "Bit 8 - Cascade 2 Enable"]
|
|
#[inline(always)]
|
|
pub fn csden2(&mut self) -> CSDEN2_W {
|
|
CSDEN2_W { w: self }
|
|
}
|
|
#[doc = "Bit 9 - Cascade 2 Invert"]
|
|
#[inline(always)]
|
|
pub fn csdinv2(&mut self) -> CSDINV2_W {
|
|
CSDINV2_W { w: self }
|
|
}
|
|
#[doc = "Bit 11 - Cascade 2 test mode"]
|
|
#[inline(always)]
|
|
pub fn csdxxx2(&mut self) -> CSDXXX2_W {
|
|
CSDXXX2_W { w: self }
|
|
}
|
|
#[doc = "Bit 10 - Cascade 2 Enabled as Trigger"]
|
|
#[inline(always)]
|
|
pub fn csdtrg2(&mut self) -> CSDTRG2_W {
|
|
CSDTRG2_W { w: self }
|
|
}
|
|
#[doc = "Writes raw bits to the register."]
|
|
#[inline(always)]
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
|
self.0.bits(bits);
|
|
self
|
|
}
|
|
}
|
|
#[doc = "The Cascade Control Register. Controls the counter external enable signals\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csd_ctrl](index.html) module"]
|
|
pub struct CSD_CTRL_SPEC;
|
|
impl crate::RegisterSpec for CSD_CTRL_SPEC {
|
|
type Ux = u32;
|
|
}
|
|
#[doc = "`read()` method returns [csd_ctrl::R](R) reader structure"]
|
|
impl crate::Readable for CSD_CTRL_SPEC {
|
|
type Reader = R;
|
|
}
|
|
#[doc = "`write(|w| ..)` method takes [csd_ctrl::W](W) writer structure"]
|
|
impl crate::Writable for CSD_CTRL_SPEC {
|
|
type Writer = W;
|
|
}
|
|
#[doc = "`reset()` method sets CSD_CTRL to value 0"]
|
|
impl crate::Resettable for CSD_CTRL_SPEC {
|
|
#[inline(always)]
|
|
fn reset_value() -> Self::Ux {
|
|
0
|
|
}
|
|
}
|