478 lines
13 KiB
Rust
478 lines
13 KiB
Rust
#[doc = "Register `S0_IRQ_CLR` writer"]
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pub struct W(crate::W<S0_IRQ_CLR_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<S0_IRQ_CLR_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<S0_IRQ_CLR_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<S0_IRQ_CLR_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `COMPLETED` writer - Controller Complted a Transaction"]
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pub struct COMPLETED_W<'a> {
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w: &'a mut W,
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}
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impl<'a> COMPLETED_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = value as u32;
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self.w
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}
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}
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#[doc = "Field `IDLE` writer - Controller is Idle"]
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pub struct IDLE_W<'a> {
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w: &'a mut W,
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}
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impl<'a> IDLE_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Field `WAITING` writer - Controller is Waiting"]
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pub struct WAITING_W<'a> {
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w: &'a mut W,
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}
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impl<'a> WAITING_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
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self.w
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}
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}
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#[doc = "Field `TXSTALLED` writer - Controller is Tx Stalled"]
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pub struct TXSTALLED_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TXSTALLED_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
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self.w
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}
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}
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#[doc = "Field `RXSTALLED` writer - Controller is Rx Stalled"]
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pub struct RXSTALLED_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RXSTALLED_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
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self.w
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}
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}
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#[doc = "Field `ADDRESSMATCH` writer - I2C Address Match"]
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pub struct ADDRESSMATCH_W<'a> {
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w: &'a mut W,
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}
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impl<'a> ADDRESSMATCH_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
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self.w
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}
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}
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#[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"]
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pub struct NACKDATA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> NACKDATA_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
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self.w
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}
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}
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#[doc = "Field `RXDATAFIRST` writer - Pending Data is first Byte following Address"]
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pub struct RXDATAFIRST_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RXDATAFIRST_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
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self.w
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}
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}
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#[doc = "Field `I2C_START` writer - I2C Start Condition"]
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pub struct I2C_START_W<'a> {
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w: &'a mut W,
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}
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impl<'a> I2C_START_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
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self.w
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}
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}
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#[doc = "Field `I2C_STOP` writer - I2C Stop Condition"]
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pub struct I2C_STOP_W<'a> {
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w: &'a mut W,
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}
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impl<'a> I2C_STOP_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
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self.w
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}
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}
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#[doc = "Field `TXUNDERFLOW` writer - TX FIFO Underflowed"]
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pub struct TXUNDERFLOW_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TXUNDERFLOW_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
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self.w
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}
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}
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#[doc = "Field `RXOVERFLOW` writer - TX FIFO Overflowed"]
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pub struct RXOVERFLOW_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RXOVERFLOW_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
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self.w
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}
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}
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#[doc = "Field `TXREADY` writer - TX FIFO Ready"]
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pub struct TXREADY_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TXREADY_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
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self.w
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}
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}
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#[doc = "Field `RXREADY` writer - RX FIFO Ready"]
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pub struct RXREADY_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RXREADY_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
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self.w
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}
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}
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#[doc = "Field `TXEMPTY` writer - TX FIFO Empty"]
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pub struct TXEMPTY_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TXEMPTY_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
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self.w
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}
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}
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#[doc = "Field `RXFULL` writer - RX FIFO Full"]
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pub struct RXFULL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RXFULL_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
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self.w
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}
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}
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impl W {
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#[doc = "Bit 0 - Controller Complted a Transaction"]
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#[inline(always)]
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pub fn completed(&mut self) -> COMPLETED_W {
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COMPLETED_W { w: self }
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}
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#[doc = "Bit 1 - Controller is Idle"]
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#[inline(always)]
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pub fn idle(&mut self) -> IDLE_W {
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IDLE_W { w: self }
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}
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#[doc = "Bit 2 - Controller is Waiting"]
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#[inline(always)]
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pub fn waiting(&mut self) -> WAITING_W {
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WAITING_W { w: self }
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}
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#[doc = "Bit 3 - Controller is Tx Stalled"]
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#[inline(always)]
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pub fn txstalled(&mut self) -> TXSTALLED_W {
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TXSTALLED_W { w: self }
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}
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#[doc = "Bit 4 - Controller is Rx Stalled"]
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#[inline(always)]
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pub fn rxstalled(&mut self) -> RXSTALLED_W {
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RXSTALLED_W { w: self }
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}
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#[doc = "Bit 5 - I2C Address Match"]
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#[inline(always)]
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pub fn addressmatch(&mut self) -> ADDRESSMATCH_W {
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ADDRESSMATCH_W { w: self }
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}
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#[doc = "Bit 6 - I2C Data was not Acknowledged"]
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#[inline(always)]
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pub fn nackdata(&mut self) -> NACKDATA_W {
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NACKDATA_W { w: self }
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}
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#[doc = "Bit 7 - Pending Data is first Byte following Address"]
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#[inline(always)]
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pub fn rxdatafirst(&mut self) -> RXDATAFIRST_W {
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RXDATAFIRST_W { w: self }
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}
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#[doc = "Bit 8 - I2C Start Condition"]
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#[inline(always)]
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pub fn i2c_start(&mut self) -> I2C_START_W {
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I2C_START_W { w: self }
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}
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#[doc = "Bit 9 - I2C Stop Condition"]
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#[inline(always)]
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pub fn i2c_stop(&mut self) -> I2C_STOP_W {
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I2C_STOP_W { w: self }
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}
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#[doc = "Bit 10 - TX FIFO Underflowed"]
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#[inline(always)]
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pub fn txunderflow(&mut self) -> TXUNDERFLOW_W {
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TXUNDERFLOW_W { w: self }
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}
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#[doc = "Bit 11 - TX FIFO Overflowed"]
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#[inline(always)]
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pub fn rxoverflow(&mut self) -> RXOVERFLOW_W {
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RXOVERFLOW_W { w: self }
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}
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#[doc = "Bit 12 - TX FIFO Ready"]
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#[inline(always)]
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pub fn txready(&mut self) -> TXREADY_W {
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TXREADY_W { w: self }
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}
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#[doc = "Bit 13 - RX FIFO Ready"]
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#[inline(always)]
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pub fn rxready(&mut self) -> RXREADY_W {
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RXREADY_W { w: self }
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}
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#[doc = "Bit 14 - TX FIFO Empty"]
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#[inline(always)]
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pub fn txempty(&mut self) -> TXEMPTY_W {
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TXEMPTY_W { w: self }
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}
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#[doc = "Bit 15 - RX FIFO Full"]
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#[inline(always)]
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pub fn rxfull(&mut self) -> RXFULL_W {
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RXFULL_W { w: self }
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Slave Clear Interrupt Status Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_irq_clr](index.html) module"]
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pub struct S0_IRQ_CLR_SPEC;
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impl crate::RegisterSpec for S0_IRQ_CLR_SPEC {
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type Ux = u32;
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}
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#[doc = "`write(|w| ..)` method takes [s0_irq_clr::W](W) writer structure"]
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impl crate::Writable for S0_IRQ_CLR_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets S0_IRQ_CLR to value 0"]
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impl crate::Resettable for S0_IRQ_CLR_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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