improve UART impl
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@ -9,6 +9,7 @@
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//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/uart.rs)
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//! - [UART echo with IRQ and Embassy](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/embassy/src/bin/uart-echo-with-irq.rs)
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//! - [Flashloader app using UART with IRQs](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader)
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use core::convert::Infallible;
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use core::ops::Deref;
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use embedded_hal_nb::serial::Read;
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@ -69,17 +70,28 @@ impl RxPin<Uart2> for Pin<PF9, AltFunc1> {}
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// Regular Definitions
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//==================================================================================================
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#[derive(Debug)]
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum RxError {
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Overrun,
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Framing,
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Parity,
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}
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Error {
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Overrun,
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FramingError,
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ParityError,
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Rx(RxError),
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BreakCondition,
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TransferPending,
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BufferTooShort,
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}
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impl From<RxError> for Error {
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fn from(value: RxError) -> Self {
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Self::Rx(value)
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}
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}
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Event {
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@ -295,43 +307,9 @@ enum IrqReceptionMode {
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}
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//==================================================================================================
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// UART implementation
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// UART peripheral wrapper
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//==================================================================================================
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/// Type erased variant of a UART. Can be created with the [Uart::downgrade] function.
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pub struct UartBase<Uart> {
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uart: Uart,
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tx: Tx<Uart>,
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rx: Rx<Uart>,
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}
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/// Serial abstraction. Entry point to create a new UART
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pub struct Uart<UartInstance, Pins> {
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inner: UartBase<UartInstance>,
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pins: Pins,
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}
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/// Serial receiver.
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///
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/// Can be created by using the [Uart::split] or [UartBase::split] API.
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pub struct Rx<Uart>(Uart);
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/// Serial transmitter
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///
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/// Can be created by using the [Uart::split] or [UartBase::split] API.
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pub struct Tx<Uart>(Uart);
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impl<Uart: Instance> Rx<Uart> {
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fn new(uart: Uart) -> Self {
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Self(uart)
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}
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}
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impl<Uart> Tx<Uart> {
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fn new(uart: Uart) -> Self {
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Self(uart)
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}
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}
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pub trait Instance: Deref<Target = uart_base::RegisterBlock> {
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const IDX: u8;
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const PERIPH_SEL: PeripheralSelect;
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@ -389,6 +367,17 @@ impl Instance for Uart2 {
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}
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}
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//==================================================================================================
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// UART implementation
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//==================================================================================================
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/// Type erased variant of a UART. Can be created with the [Uart::downgrade] function.
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pub struct UartBase<Uart> {
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uart: Uart,
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tx: Tx<Uart>,
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rx: Rx<Uart>,
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}
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impl<Uart: Instance> UartBase<Uart> {
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fn init(self, config: Config, clocks: &Clocks) -> Self {
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if Uart::IDX == 2 {
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@ -522,6 +511,12 @@ impl<Uart: Instance> UartBase<Uart> {
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}
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}
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/// Serial abstraction. Entry point to create a new UART
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pub struct Uart<UartInstance, Pins> {
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inner: UartBase<UartInstance>,
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pins: Pins,
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}
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impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstance: Instance>
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Uart<UartInstance, (TxPinInst, RxPinInst)>
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{
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@ -617,6 +612,17 @@ impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstanc
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}
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}
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/// Serial receiver.
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///
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/// Can be created by using the [Uart::split] or [UartBase::split] API.
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pub struct Rx<Uart>(Uart);
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impl<Uart: Instance> Rx<Uart> {
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fn new(uart: Uart) -> Self {
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Self(uart)
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}
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}
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impl<Uart: Instance> Rx<Uart> {
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/// Direct access to the peripheral structure.
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///
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@ -642,6 +648,33 @@ impl<Uart: Instance> Rx<Uart> {
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self.0.enable().modify(|_, w| w.rxenable().clear_bit());
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}
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/// Low level function to read a word from the UART FIFO.
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///
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/// Uses the [nb] API to allow usage in blocking and non-blocking contexts.
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///
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/// Please note that you might have to mask the returned value with 0xff to retrieve the actual
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/// value if you use the manual parity mode. See chapter 11.4.1 for more information.
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#[inline(always)]
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pub fn read_fifo(&self) -> nb::Result<u32, Infallible> {
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if self.0.rxstatus().read().rdavl().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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}
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Ok(self.read_fifo_unchecked())
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}
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/// Low level function to read a word from from the UART FIFO.
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///
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/// This does not necesarily mean there is a word in the FIFO available.
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/// Use the [Self::read_fifo] function to read a word from the FIFO reliably using the [nb]
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/// API.
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///
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/// Please note that you might have to mask the returned value with 0xff to retrieve the actual
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/// value if you use the manual parity mode. See chapter 11.4.1 for more information.
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#[inline(always)]
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pub fn read_fifo_unchecked(&self) -> u32 {
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self.0.data().read().bits()
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}
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pub fn to_rx_with_irq(self) -> RxWithIrq<Uart> {
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RxWithIrq(self)
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}
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@ -651,6 +684,17 @@ impl<Uart: Instance> Rx<Uart> {
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}
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}
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/// Serial transmitter
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///
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/// Can be created by using the [Uart::split] or [UartBase::split] API.
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pub struct Tx<Uart>(Uart);
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impl<Uart> Tx<Uart> {
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fn new(uart: Uart) -> Self {
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Self(uart)
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}
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}
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impl<Uart: Instance> Tx<Uart> {
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/// Direct access to the peripheral structure.
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///
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@ -675,6 +719,32 @@ impl<Uart: Instance> Tx<Uart> {
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pub fn disable(&mut self) {
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self.0.enable().modify(|_, w| w.txenable().clear_bit());
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}
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/// Low level function to write a word to the UART FIFO.
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///
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/// Uses the [nb] API to allow usage in blocking and non-blocking contexts.
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///
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/// Please note that you might have to mask the returned value with 0xff to retrieve the actual
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/// value if you use the manual parity mode. See chapter 11.4.1 for more information.
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#[inline(always)]
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pub fn write_fifo(&self, data: u32) -> nb::Result<(), Infallible> {
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if self.0.txstatus().read().wrrdy().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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}
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self.write_fifo_unchecked(data);
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Ok(())
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}
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/// Low level function to write a word to the UART FIFO.
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///
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/// This does not necesarily mean that the FIFO can process another word because it might be
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/// full.
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/// Use the [Self::read_fifo] function to write a word to the FIFO reliably using the [nb]
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/// API.
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#[inline(always)]
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pub fn write_fifo_unchecked(&self, data: u32) {
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self.0.data().write(|w| unsafe { w.bits(data) });
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}
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}
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#[derive(Default, Debug)]
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@ -937,25 +1007,22 @@ impl<Uart: Instance> RxWithIrq<Uart> {
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fn read_handler(
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&self,
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errors: &mut IrqUartError,
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read_res: &nb::Result<u8, Error>,
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read_res: &nb::Result<u8, RxError>,
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) -> Option<u8> {
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match read_res {
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Ok(byte) => Some(*byte),
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Err(nb::Error::WouldBlock) => None,
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Err(nb::Error::Other(e)) => {
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match e {
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Error::Overrun => {
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RxError::Overrun => {
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errors.overflow = true;
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}
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Error::FramingError => {
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RxError::Framing => {
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errors.framing = true;
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}
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Error::ParityError => {
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RxError::Parity => {
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errors.parity = true;
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}
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_ => {
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errors.other = true;
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}
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}
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None
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}
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@ -1000,18 +1067,34 @@ impl embedded_io::Error for Error {
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}
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}
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impl embedded_io::Error for RxError {
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fn kind(&self) -> embedded_io::ErrorKind {
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embedded_io::ErrorKind::Other
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}
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}
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impl embedded_hal_nb::serial::Error for Error {
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fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
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embedded_hal_nb::serial::ErrorKind::Other
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}
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}
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impl embedded_hal_nb::serial::Error for RxError {
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fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
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match self {
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RxError::Overrun => embedded_hal_nb::serial::ErrorKind::Overrun,
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RxError::Framing => embedded_hal_nb::serial::ErrorKind::FrameFormat,
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RxError::Parity => embedded_hal_nb::serial::ErrorKind::Parity,
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}
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}
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}
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impl<Uart> embedded_io::ErrorType for Rx<Uart> {
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type Error = Error;
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type Error = RxError;
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}
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impl<Uart> embedded_hal_nb::serial::ErrorType for Rx<Uart> {
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type Error = Error;
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type Error = RxError;
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}
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impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
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@ -1019,11 +1102,11 @@ impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
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let uart = unsafe { &(*Uart::ptr()) };
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let status_reader = uart.rxstatus().read();
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let err = if status_reader.rxovr().bit_is_set() {
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Some(Error::Overrun)
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Some(RxError::Overrun)
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} else if status_reader.rxfrm().bit_is_set() {
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Some(Error::FramingError)
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Some(RxError::Framing)
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} else if status_reader.rxpar().bit_is_set() {
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Some(Error::ParityError)
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Some(RxError::Parity)
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} else {
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None
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};
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@ -1032,14 +1115,15 @@ impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
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// and parity status bits. We have to read the DATA register
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// so that the next status reflects the next DATA word
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// For overrun error, we read as well to clear the peripheral
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uart.data().read().bits();
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Err(err.into())
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} else if status_reader.rdavl().bit_is_set() {
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let data = uart.data().read().bits();
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Ok((data & 0xff) as u8)
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} else {
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Err(nb::Error::WouldBlock)
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self.read_fifo_unchecked();
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return Err(err.into());
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}
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self.read_fifo().map(|val| (val & 0xff) as u8).map_err(|e| {
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if let nb::Error::Other(_) = e {
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unreachable!()
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}
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nb::Error::WouldBlock
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})
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}
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}
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@ -1059,28 +1143,16 @@ impl<Uart: Instance> embedded_io::Read for Rx<Uart> {
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}
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impl<Uart> embedded_io::ErrorType for Tx<Uart> {
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type Error = Error;
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type Error = Infallible;
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}
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impl<Uart> embedded_hal_nb::serial::ErrorType for Tx<Uart> {
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type Error = Error;
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type Error = Infallible;
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}
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impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for Tx<Uart> {
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fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
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let reader = unsafe { &(*Uart::ptr()) }.txstatus().read();
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if reader.wrrdy().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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} else {
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// DPARITY bit not supported yet
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unsafe {
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// NOTE(unsafe) atomic write to data register
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// NOTE(write_volatile) 8-bit write that's not
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// possible through the svd2rust API
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(*Uart::ptr()).data().write(|w| w.bits(word as u32));
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}
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}
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Ok(())
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self.write_fifo(word as u32)
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}
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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@ -1123,7 +1195,7 @@ impl<UartInstance> embedded_hal_nb::serial::ErrorType for UartBase<UartInstance>
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impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for UartBase<Uart> {
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fn read(&mut self) -> nb::Result<u8, Self::Error> {
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self.rx.read()
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self.rx.read().map_err(|e| e.map(Error::Rx))
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}
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}
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