smaller improvements

va416xx-hal/src/clock.rs

@@ -311,6 +311,12 @@ impl ClkgenCfgr {
         self
     }
 
+    #[inline]
+    pub fn pll_cfg(mut self, pll_cfg: PllCfg) -> Self {
+        self.pll_cfg = Some(pll_cfg);
+        self
+    }
+
     #[inline]
     pub fn ref_clk_sel(mut self, ref_clk_sel: RefClkSel) -> Self {
         self.ref_clk_sel = ref_clk_sel;
@@ -318,7 +324,7 @@ impl ClkgenCfgr {
     }
 
     /// Configures all clocks and return a clock configuration structure containing the final
-    /// frozen clock.
+    /// frozen clocks.
     ///
     /// Internal implementation details: This implementation is based on the HAL implementation
     /// which performs a lot of delays. I do not know if all of those are necessary, but
@@ -499,7 +505,7 @@ impl Clocks {
     }
 
     /// Returns the frequency of the APB0 which is equal to the system clock.
-    pub fn apb0(&self) -> Hertz {
+    pub const fn apb0(&self) -> Hertz {
         self.sysclk()
     }