Init Commit

Monorepo for Rust support of VA416XX family of radiation hardened MCUs
2021-12-07 00:31:51 +01:00
commit 5d1740efea
606 changed files with 74678 additions and 0 deletions
--- a/va416xx/src/irq_router/adcsel.rs
+++ b/va416xx/src/irq_router/adcsel.rs
@ -0,0 +1,40 @@
+#[doc = "Register `ADCSEL` reader"]
+pub type R = crate::R<AdcselSpec>;
+#[doc = "Register `ADCSEL` writer"]
+pub type W = crate::W<AdcselSpec>;
+#[doc = "Field `ADCSEL` reader - ADC trigger source selection value"]
+pub type AdcselR = crate::FieldReader;
+#[doc = "Field `ADCSEL` writer - ADC trigger source selection value"]
+pub type AdcselW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
+impl R {
+    #[doc = "Bits 0:4 - ADC trigger source selection value"]
+    #[inline(always)]
+    pub fn adcsel(&self) -> AdcselR {
+        AdcselR::new((self.bits & 0x1f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - ADC trigger source selection value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn adcsel(&mut self) -> AdcselW<AdcselSpec> {
+        AdcselW::new(self, 0)
+    }
+}
+#[doc = "Interrupt select for ADC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adcsel::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`adcsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct AdcselSpec;
+impl crate::RegisterSpec for AdcselSpec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`adcsel::R`](R) reader structure"]
+impl crate::Readable for AdcselSpec {}
+#[doc = "`write(|w| ..)` method takes [`adcsel::W`](W) writer structure"]
+impl crate::Writable for AdcselSpec {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets ADCSEL to value 0x1f"]
+impl crate::Resettable for AdcselSpec {
+    const RESET_VALUE: u32 = 0x1f;
+}
--- a/va416xx/src/irq_router/dacsel0.rs
+++ b/va416xx/src/irq_router/dacsel0.rs
@ -0,0 +1,40 @@
+#[doc = "Register `DACSEL0` reader"]
+pub type R = crate::R<Dacsel0Spec>;
+#[doc = "Register `DACSEL0` writer"]
+pub type W = crate::W<Dacsel0Spec>;
+#[doc = "Field `DACSEL` reader - DAC trigger source selection value"]
+pub type DacselR = crate::FieldReader;
+#[doc = "Field `DACSEL` writer - DAC trigger source selection value"]
+pub type DacselW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
+impl R {
+    #[doc = "Bits 0:4 - DAC trigger source selection value"]
+    #[inline(always)]
+    pub fn dacsel(&self) -> DacselR {
+        DacselR::new((self.bits & 0x1f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - DAC trigger source selection value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn dacsel(&mut self) -> DacselW<Dacsel0Spec> {
+        DacselW::new(self, 0)
+    }
+}
+#[doc = "Interrupt select for DAC0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct Dacsel0Spec;
+impl crate::RegisterSpec for Dacsel0Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`dacsel0::R`](R) reader structure"]
+impl crate::Readable for Dacsel0Spec {}
+#[doc = "`write(|w| ..)` method takes [`dacsel0::W`](W) writer structure"]
+impl crate::Writable for Dacsel0Spec {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DACSEL0 to value 0x1f"]
+impl crate::Resettable for Dacsel0Spec {
+    const RESET_VALUE: u32 = 0x1f;
+}
--- a/va416xx/src/irq_router/dacsel1.rs
+++ b/va416xx/src/irq_router/dacsel1.rs
@ -0,0 +1,40 @@
+#[doc = "Register `DACSEL1` reader"]
+pub type R = crate::R<Dacsel1Spec>;
+#[doc = "Register `DACSEL1` writer"]
+pub type W = crate::W<Dacsel1Spec>;
+#[doc = "Field `DACSEL` reader - DAC trigger source selection value"]
+pub type DacselR = crate::FieldReader;
+#[doc = "Field `DACSEL` writer - DAC trigger source selection value"]
+pub type DacselW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
+impl R {
+    #[doc = "Bits 0:4 - DAC trigger source selection value"]
+    #[inline(always)]
+    pub fn dacsel(&self) -> DacselR {
+        DacselR::new((self.bits & 0x1f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - DAC trigger source selection value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn dacsel(&mut self) -> DacselW<Dacsel1Spec> {
+        DacselW::new(self, 0)
+    }
+}
+#[doc = "Interrupt select for DAC1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct Dacsel1Spec;
+impl crate::RegisterSpec for Dacsel1Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`dacsel1::R`](R) reader structure"]
+impl crate::Readable for Dacsel1Spec {}
+#[doc = "`write(|w| ..)` method takes [`dacsel1::W`](W) writer structure"]
+impl crate::Writable for Dacsel1Spec {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DACSEL1 to value 0x1f"]
+impl crate::Resettable for Dacsel1Spec {
+    const RESET_VALUE: u32 = 0x1f;
+}
--- a/va416xx/src/irq_router/dmasel0.rs
+++ b/va416xx/src/irq_router/dmasel0.rs
@ -0,0 +1,40 @@
+#[doc = "Register `DMASEL0` reader"]
+pub type R = crate::R<Dmasel0Spec>;
+#[doc = "Register `DMASEL0` writer"]
+pub type W = crate::W<Dmasel0Spec>;
+#[doc = "Field `DMASEL` reader - DMA trigger source selection value"]
+pub type DmaselR = crate::FieldReader;
+#[doc = "Field `DMASEL` writer - DMA trigger source selection value"]
+pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
+impl R {
+    #[doc = "Bits 0:6 - DMA trigger source selection value"]
+    #[inline(always)]
+    pub fn dmasel(&self) -> DmaselR {
+        DmaselR::new((self.bits & 0x7f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:6 - DMA trigger source selection value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn dmasel(&mut self) -> DmaselW<Dmasel0Spec> {
+        DmaselW::new(self, 0)
+    }
+}
+#[doc = "Interrupt select for DMA channel 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct Dmasel0Spec;
+impl crate::RegisterSpec for Dmasel0Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`dmasel0::R`](R) reader structure"]
+impl crate::Readable for Dmasel0Spec {}
+#[doc = "`write(|w| ..)` method takes [`dmasel0::W`](W) writer structure"]
+impl crate::Writable for Dmasel0Spec {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DMASEL0 to value 0x7f"]
+impl crate::Resettable for Dmasel0Spec {
+    const RESET_VALUE: u32 = 0x7f;
+}
--- a/va416xx/src/irq_router/dmasel1.rs
+++ b/va416xx/src/irq_router/dmasel1.rs
@ -0,0 +1,40 @@
+#[doc = "Register `DMASEL1` reader"]
+pub type R = crate::R<Dmasel1Spec>;
+#[doc = "Register `DMASEL1` writer"]
+pub type W = crate::W<Dmasel1Spec>;
+#[doc = "Field `DMASEL` reader - DMA trigger source selection value"]
+pub type DmaselR = crate::FieldReader;
+#[doc = "Field `DMASEL` writer - DMA trigger source selection value"]
+pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
+impl R {
+    #[doc = "Bits 0:6 - DMA trigger source selection value"]
+    #[inline(always)]
+    pub fn dmasel(&self) -> DmaselR {
+        DmaselR::new((self.bits & 0x7f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:6 - DMA trigger source selection value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn dmasel(&mut self) -> DmaselW<Dmasel1Spec> {
+        DmaselW::new(self, 0)
+    }
+}
+#[doc = "Interrupt select for DMA channel 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct Dmasel1Spec;
+impl crate::RegisterSpec for Dmasel1Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`dmasel1::R`](R) reader structure"]
+impl crate::Readable for Dmasel1Spec {}
+#[doc = "`write(|w| ..)` method takes [`dmasel1::W`](W) writer structure"]
+impl crate::Writable for Dmasel1Spec {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DMASEL1 to value 0x7f"]
+impl crate::Resettable for Dmasel1Spec {
+    const RESET_VALUE: u32 = 0x7f;
+}
--- a/va416xx/src/irq_router/dmasel2.rs
+++ b/va416xx/src/irq_router/dmasel2.rs
@ -0,0 +1,40 @@
+#[doc = "Register `DMASEL2` reader"]
+pub type R = crate::R<Dmasel2Spec>;
+#[doc = "Register `DMASEL2` writer"]
+pub type W = crate::W<Dmasel2Spec>;
+#[doc = "Field `DMASEL` reader - DMA trigger source selection value"]
+pub type DmaselR = crate::FieldReader;
+#[doc = "Field `DMASEL` writer - DMA trigger source selection value"]
+pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
+impl R {
+    #[doc = "Bits 0:6 - DMA trigger source selection value"]
+    #[inline(always)]
+    pub fn dmasel(&self) -> DmaselR {
+        DmaselR::new((self.bits & 0x7f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:6 - DMA trigger source selection value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn dmasel(&mut self) -> DmaselW<Dmasel2Spec> {
+        DmaselW::new(self, 0)
+    }
+}
+#[doc = "Interrupt select for DMA channel 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct Dmasel2Spec;
+impl crate::RegisterSpec for Dmasel2Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`dmasel2::R`](R) reader structure"]
+impl crate::Readable for Dmasel2Spec {}
+#[doc = "`write(|w| ..)` method takes [`dmasel2::W`](W) writer structure"]
+impl crate::Writable for Dmasel2Spec {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DMASEL2 to value 0x7f"]
+impl crate::Resettable for Dmasel2Spec {
+    const RESET_VALUE: u32 = 0x7f;
+}
--- a/va416xx/src/irq_router/dmasel3.rs
+++ b/va416xx/src/irq_router/dmasel3.rs
@ -0,0 +1,40 @@
+#[doc = "Register `DMASEL3` reader"]
+pub type R = crate::R<Dmasel3Spec>;
+#[doc = "Register `DMASEL3` writer"]
+pub type W = crate::W<Dmasel3Spec>;
+#[doc = "Field `DMASEL` reader - DMA trigger source selection value"]
+pub type DmaselR = crate::FieldReader;
+#[doc = "Field `DMASEL` writer - DMA trigger source selection value"]
+pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
+impl R {
+    #[doc = "Bits 0:6 - DMA trigger source selection value"]
+    #[inline(always)]
+    pub fn dmasel(&self) -> DmaselR {
+        DmaselR::new((self.bits & 0x7f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:6 - DMA trigger source selection value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn dmasel(&mut self) -> DmaselW<Dmasel3Spec> {
+        DmaselW::new(self, 0)
+    }
+}
+#[doc = "Interrupt select for DMA channel 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct Dmasel3Spec;
+impl crate::RegisterSpec for Dmasel3Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`dmasel3::R`](R) reader structure"]
+impl crate::Readable for Dmasel3Spec {}
+#[doc = "`write(|w| ..)` method takes [`dmasel3::W`](W) writer structure"]
+impl crate::Writable for Dmasel3Spec {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DMASEL3 to value 0x7f"]
+impl crate::Resettable for Dmasel3Spec {
+    const RESET_VALUE: u32 = 0x7f;
+}
--- a/va416xx/src/irq_router/dmattsel.rs
+++ b/va416xx/src/irq_router/dmattsel.rs
@ -0,0 +1,40 @@
+#[doc = "Register `DMATTSEL` reader"]
+pub type R = crate::R<DmattselSpec>;
+#[doc = "Register `DMATTSEL` writer"]
+pub type W = crate::W<DmattselSpec>;
+#[doc = "Field `DMATTSEL` reader - DMA trigger type selection value"]
+pub type DmattselR = crate::FieldReader;
+#[doc = "Field `DMATTSEL` writer - DMA trigger type selection value"]
+pub type DmattselW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
+impl R {
+    #[doc = "Bits 0:3 - DMA trigger type selection value"]
+    #[inline(always)]
+    pub fn dmattsel(&self) -> DmattselR {
+        DmattselR::new((self.bits & 0x0f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - DMA trigger type selection value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn dmattsel(&mut self) -> DmattselW<DmattselSpec> {
+        DmattselW::new(self, 0)
+    }
+}
+#[doc = "Trigger select for the DMA channels\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmattsel::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmattsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct DmattselSpec;
+impl crate::RegisterSpec for DmattselSpec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`dmattsel::R`](R) reader structure"]
+impl crate::Readable for DmattselSpec {}
+#[doc = "`write(|w| ..)` method takes [`dmattsel::W`](W) writer structure"]
+impl crate::Writable for DmattselSpec {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DMATTSEL to value 0"]
+impl crate::Resettable for DmattselSpec {
+    const RESET_VALUE: u32 = 0;
+}
--- a/va416xx/src/irq_router/irq_out0.rs
+++ b/va416xx/src/irq_router/irq_out0.rs
@ -0,0 +1,22 @@
+#[doc = "Register `IRQ_OUT0` reader"]
+pub type R = crate::R<IrqOut0Spec>;
+#[doc = "Field `IRQ_OUT0` reader - IRQ_OUT\\[31:0\\]"]
+pub type IrqOut0R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - IRQ_OUT\\[31:0\\]"]
+    #[inline(always)]
+    pub fn irq_out0(&self) -> IrqOut0R {
+        IrqOut0R::new(self.bits)
+    }
+}
+#[doc = "DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IrqOut0Spec;
+impl crate::RegisterSpec for IrqOut0Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`irq_out0::R`](R) reader structure"]
+impl crate::Readable for IrqOut0Spec {}
+#[doc = "`reset()` method sets IRQ_OUT0 to value 0"]
+impl crate::Resettable for IrqOut0Spec {
+    const RESET_VALUE: u32 = 0;
+}
--- a/va416xx/src/irq_router/irq_out1.rs
+++ b/va416xx/src/irq_router/irq_out1.rs
@ -0,0 +1,22 @@
+#[doc = "Register `IRQ_OUT1` reader"]
+pub type R = crate::R<IrqOut1Spec>;
+#[doc = "Field `IRQ_OUT1` reader - IRQ_OUT\\[63:32\\]"]
+pub type IrqOut1R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - IRQ_OUT\\[63:32\\]"]
+    #[inline(always)]
+    pub fn irq_out1(&self) -> IrqOut1R {
+        IrqOut1R::new(self.bits)
+    }
+}
+#[doc = "DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out1::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IrqOut1Spec;
+impl crate::RegisterSpec for IrqOut1Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`irq_out1::R`](R) reader structure"]
+impl crate::Readable for IrqOut1Spec {}
+#[doc = "`reset()` method sets IRQ_OUT1 to value 0"]
+impl crate::Resettable for IrqOut1Spec {
+    const RESET_VALUE: u32 = 0;
+}
--- a/va416xx/src/irq_router/irq_out2.rs
+++ b/va416xx/src/irq_router/irq_out2.rs
@ -0,0 +1,22 @@
+#[doc = "Register `IRQ_OUT2` reader"]
+pub type R = crate::R<IrqOut2Spec>;
+#[doc = "Field `IRQ_OUT2` reader - IRQ_OUT\\[95:64\\]"]
+pub type IrqOut2R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - IRQ_OUT\\[95:64\\]"]
+    #[inline(always)]
+    pub fn irq_out2(&self) -> IrqOut2R {
+        IrqOut2R::new(self.bits)
+    }
+}
+#[doc = "DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out2::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IrqOut2Spec;
+impl crate::RegisterSpec for IrqOut2Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`irq_out2::R`](R) reader structure"]
+impl crate::Readable for IrqOut2Spec {}
+#[doc = "`reset()` method sets IRQ_OUT2 to value 0"]
+impl crate::Resettable for IrqOut2Spec {
+    const RESET_VALUE: u32 = 0;
+}
--- a/va416xx/src/irq_router/irq_out3.rs
+++ b/va416xx/src/irq_router/irq_out3.rs
@ -0,0 +1,22 @@
+#[doc = "Register `IRQ_OUT3` reader"]
+pub type R = crate::R<IrqOut3Spec>;
+#[doc = "Field `IRQ_OUT3` reader - IRQ_OUT\\[127:96\\]"]
+pub type IrqOut3R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - IRQ_OUT\\[127:96\\]"]
+    #[inline(always)]
+    pub fn irq_out3(&self) -> IrqOut3R {
+        IrqOut3R::new(self.bits)
+    }
+}
+#[doc = "DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out3::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IrqOut3Spec;
+impl crate::RegisterSpec for IrqOut3Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`irq_out3::R`](R) reader structure"]
+impl crate::Readable for IrqOut3Spec {}
+#[doc = "`reset()` method sets IRQ_OUT3 to value 0"]
+impl crate::Resettable for IrqOut3Spec {
+    const RESET_VALUE: u32 = 0;
+}
--- a/va416xx/src/irq_router/irq_out4.rs
+++ b/va416xx/src/irq_router/irq_out4.rs
@ -0,0 +1,22 @@
+#[doc = "Register `IRQ_OUT4` reader"]
+pub type R = crate::R<IrqOut4Spec>;
+#[doc = "Field `IRQ_OUT4` reader - IRQ_OUT\\[159:128\\]"]
+pub type IrqOut4R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - IRQ_OUT\\[159:128\\]"]
+    #[inline(always)]
+    pub fn irq_out4(&self) -> IrqOut4R {
+        IrqOut4R::new(self.bits)
+    }
+}
+#[doc = "DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out4::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IrqOut4Spec;
+impl crate::RegisterSpec for IrqOut4Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`irq_out4::R`](R) reader structure"]
+impl crate::Readable for IrqOut4Spec {}
+#[doc = "`reset()` method sets IRQ_OUT4 to value 0"]
+impl crate::Resettable for IrqOut4Spec {
+    const RESET_VALUE: u32 = 0;
+}
--- a/va416xx/src/irq_router/irq_out5.rs
+++ b/va416xx/src/irq_router/irq_out5.rs
@ -0,0 +1,22 @@
+#[doc = "Register `IRQ_OUT5` reader"]
+pub type R = crate::R<IrqOut5Spec>;
+#[doc = "Field `IRQ_OUT5` reader - IRQ_OUT\\[179:160\\]"]
+pub type IrqOut5R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:19 - IRQ_OUT\\[179:160\\]"]
+    #[inline(always)]
+    pub fn irq_out5(&self) -> IrqOut5R {
+        IrqOut5R::new(self.bits & 0x000f_ffff)
+    }
+}
+#[doc = "DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out5::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IrqOut5Spec;
+impl crate::RegisterSpec for IrqOut5Spec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`irq_out5::R`](R) reader structure"]
+impl crate::Readable for IrqOut5Spec {}
+#[doc = "`reset()` method sets IRQ_OUT5 to value 0"]
+impl crate::Resettable for IrqOut5Spec {
+    const RESET_VALUE: u32 = 0;
+}
--- a/va416xx/src/irq_router/perid.rs
+++ b/va416xx/src/irq_router/perid.rs
@ -0,0 +1,18 @@
+#[doc = "Register `PERID` reader"]
+pub type R = crate::R<PeridSpec>;
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        write!(f, "{}", self.bits())
+    }
+}
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PeridSpec;
+impl crate::RegisterSpec for PeridSpec {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`perid::R`](R) reader structure"]
+impl crate::Readable for PeridSpec {}
+#[doc = "`reset()` method sets PERID to value 0x0281_07e9"]
+impl crate::Resettable for PeridSpec {
+    const RESET_VALUE: u32 = 0x0281_07e9;
+}