rust/va416xx-rs
6
0
Fork 0
Code Issues Pull Requests Projects Releases 5 Wiki Activity

auto-format SVD file

Browse Source
This commit is contained in:
Robin Müller 2024-06-11 14:07:44 +02:00
parent d10086ee71
commit 8028c1023b
1 changed files with 1921 additions and 1914 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

67
va416xx/svd/va416xx-base.svd
View File

@ -1,11 +1,11 @@
<?xml version="1.1" encoding="UTF-8"?> <?xml version="1.1" encoding="UTF-8"?>
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd"> <device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
<vendor>VORAGO TECHNOLOGIES</vendor> <vendor>VORAGO TECHNOLOGIES</vendor>
<vendorID>SST</vendorID> <vendorID>SST</vendorID>
<name>va416xx</name> <name>va416xx</name>
<series>M4</series> <series>M4</series>
<version>1.3</version> <version>1.3</version>
<!--Release History <!--Release History
V1.3 - Feb 2020 - Ethernet, Removed unsupported registers, renamed registers for brevity and clarity. V1.3 - Feb 2020 - Ethernet, Removed unsupported registers, renamed registers for brevity and clarity.
V1.2 - Feb 2017 - Added missing CSDTRG2 in CSD_CTRL register V1.2 - Feb 2017 - Added missing CSDTRG2 in CSD_CTRL register
V1.1 - March 2016 V1.1 - March 2016
@ -38,13 +38,18 @@ V1.0 - Original release Dec 2015
</cpu> </cpu>
<headerSystemFilename>system_va416xx</headerSystemFilename> <headerSystemFilename>system_va416xx</headerSystemFilename>
<headerDefinitionsPrefix>VOR_</headerDefinitionsPrefix> <headerDefinitionsPrefix>VOR_</headerDefinitionsPrefix>
<addressUnitBits>8</addressUnitBits><!--byte addressable memory--> <addressUnitBits>8</addressUnitBits>
<width>32</width><!--bus width is 32 bits--> <!--byte addressable memory-->
<width>32</width>
<!--bus width is 32 bits-->
<!-- registerPropertiesGroup: default settings implicitly inherited by subsequent sections --> <!-- registerPropertiesGroup: default settings implicitly inherited by subsequent sections -->
<size>32</size> <size>32</size>
<access>read-write</access><!-- default size (number of bits) of all peripherals --> <access>read-write</access>
<resetValue>0x00000000</resetValue><!-- by default all bits of the registers are initialized to 0 on reset --> <!-- default size (number of bits) of all peripherals -->
<resetMask>0xFFFFFFFF</resetMask><!-- by default all 32Bits of the registers are used --> <resetValue>0x00000000</resetValue>
<!-- by default all bits of the registers are initialized to 0 on reset -->
<resetMask>0xFFFFFFFF</resetMask>
<!-- by default all 32Bits of the registers are used -->
<peripherals> <peripherals>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!--Clock Generator Peripheral--> <!--Clock Generator Peripheral-->
@ -850,7 +855,8 @@ V1.0 - Original release Dec 2015
<name>JMP2BOOT</name> <name>JMP2BOOT</name>
<description>Enables a skip of all delay counters and eFuse read</description> <description>Enables a skip of all delay counters and eFuse read</description>
<bitRange>[19:19]</bitRange> <bitRange>[19:19]</bitRange>
</field> <field> </field>
<field>
<name>SKIPBOOT</name> <name>SKIPBOOT</name>
<description>Enables a skip of all delay counters, eFuse read, and boot</description> <description>Enables a skip of all delay counters, eFuse read, and boot</description>
<bitRange>[20:20]</bitRange> <bitRange>[20:20]</bitRange>
@ -1102,7 +1108,7 @@ V1.0 - Original release Dec 2015
</register> </register>
</registers> </registers>
</peripheral> </peripheral>
<peripheral> <peripheral>
<name>DMA</name> <name>DMA</name>
<version>1.0</version> <version>1.0</version>
<description>DMA Controller Block</description> <description>DMA Controller Block</description>
@ -3063,7 +3069,7 @@ V1.0 - Original release Dec 2015
</register> </register>
<register> <register>
<name>IRQ_EVT</name> <name>IRQ_EVT</name>
<description>Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)</description> <description>Interrupt Event Register (1:HighLevel/L-&gt;H Edge, 0:LowLevel/H-&gt;L Edge)</description>
<addressOffset>0x03c</addressOffset> <addressOffset>0x03c</addressOffset>
<resetValue>0x00000000</resetValue> <resetValue>0x00000000</resetValue>
</register> </register>
@ -3990,7 +3996,7 @@ V1.0 - Original release Dec 2015
<fields> <fields>
<field> <field>
<name>SIZE</name> <name>SIZE</name>
<description>Data Size(0x3=>4, 0xf=>16)</description> <description>Data Size(0x3=&gt;4, 0xf=&gt;16)</description>
<bitRange>[3:0]</bitRange> <bitRange>[3:0]</bitRange>
</field> </field>
<field> <field>
@ -5107,7 +5113,7 @@ V1.0 - Original release Dec 2015
<name>I2C2</name> <name>I2C2</name>
<baseAddress>0x40016800</baseAddress> <baseAddress>0x40016800</baseAddress>
</peripheral> </peripheral>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!-- CAN --> <!-- CAN -->
<peripheral> <peripheral>
<name>CAN0</name> <name>CAN0</name>
@ -6433,7 +6439,6 @@ V1.0 - Original release Dec 2015
<addressOffset>0x130</addressOffset> <addressOffset>0x130</addressOffset>
<resetValue>0x00000000</resetValue> <resetValue>0x00000000</resetValue>
<fields> <fields>
<field> <field>
<name>BYTE3</name> <name>BYTE3</name>
<description>Data Byte 3</description> <description>Data Byte 3</description>
@ -6638,7 +6643,6 @@ V1.0 - Original release Dec 2015
<description>Data Length Code</description> <description>Data Length Code</description>
<bitRange>[15:12]</bitRange> <bitRange>[15:12]</bitRange>
</field> </field>
<field> <field>
<name>PRI</name> <name>PRI</name>
<description>Transmit Priority Code</description> <description>Transmit Priority Code</description>
@ -7672,7 +7676,7 @@ V1.0 - Original release Dec 2015
<name>CAN1</name> <name>CAN1</name>
<baseAddress>0x40014400</baseAddress> <baseAddress>0x40014400</baseAddress>
</peripheral> </peripheral>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!-- ADC --> <!-- ADC -->
<peripheral> <peripheral>
<name>ADC</name> <name>ADC</name>
@ -7964,7 +7968,7 @@ V1.0 - Original release Dec 2015
</register> </register>
</registers> </registers>
</peripheral> </peripheral>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!-- DAC --> <!-- DAC -->
<peripheral> <peripheral>
<name>DAC0</name> <name>DAC0</name>
@ -8257,7 +8261,7 @@ V1.0 - Original release Dec 2015
<name>DAC1</name> <name>DAC1</name>
<baseAddress>0x40023800</baseAddress> <baseAddress>0x40023800</baseAddress>
</peripheral> </peripheral>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!-- SpaceWire --> <!-- SpaceWire -->
<peripheral> <peripheral>
<name>SPW</name> <name>SPW</name>
@ -8397,15 +8401,18 @@ V1.0 - Original release Dec 2015
<name>TQ</name> <name>TQ</name>
<description>Generate interrupt when a valid time-code is received</description> <description>Generate interrupt when a valid time-code is received</description>
<bitRange>[8:8]</bitRange> <bitRange>[8:8]</bitRange>
</field> <field> </field>
<field>
<name>RS</name> <name>RS</name>
<description>Make complete reset of the SpaceWire node. Self-clearing</description> <description>Make complete reset of the SpaceWire node. Self-clearing</description>
<bitRange>[6:6]</bitRange> <bitRange>[6:6]</bitRange>
</field> <field> </field>
<field>
<name>PM</name> <name>PM</name>
<description>Enable Promiscuous mode</description> <description>Enable Promiscuous mode</description>
<bitRange>[5:5]</bitRange> <bitRange>[5:5]</bitRange>
</field> <field> </field>
<field>
<name>TI</name> <name>TI</name>
<description>The host can generate a tick by writing a one to this field</description> <description>The host can generate a tick by writing a one to this field</description>
<bitRange>[4:4]</bitRange> <bitRange>[4:4]</bitRange>
@ -8796,7 +8803,7 @@ V1.0 - Original release Dec 2015
</field> </field>
</fields> </fields>
</register> </register>
<!-- <register derivedFrom="DMACTRL0"> <!-- <register derivedFrom="DMACTRL0">
<name>DMACTRL1</name> <name>DMACTRL1</name>
<description>DMA Control Register</description> <description>DMA Control Register</description>
<addressOffset>0x040</addressOffset> <addressOffset>0x040</addressOffset>
@ -8881,7 +8888,7 @@ V1.0 - Original release Dec 2015
<addressOffset>0x090</addressOffset> <addressOffset>0x090</addressOffset>
<access>read-write</access> <access>read-write</access>
</register> --> </register> -->
<!-- <register> <!-- <register>
<name>INTCTRL</name> <name>INTCTRL</name>
<description>Interrupt Control Register</description> <description>Interrupt Control Register</description>
<addressOffset>0x0a0</addressOffset> <addressOffset>0x0a0</addressOffset>
@ -9193,7 +9200,7 @@ V1.0 - Original release Dec 2015
</field> </field>
</fields> </fields>
</register> --> </register> -->
<!-- <register> <!-- <register>
<name>PNPVEND</name> <name>PNPVEND</name>
<description>SpaceWire PnP Device Vendor and Product ID</description> <description>SpaceWire PnP Device Vendor and Product ID</description>
<addressOffset>0x0e0</addressOffset> <addressOffset>0x0e0</addressOffset>
@ -9357,7 +9364,7 @@ V1.0 - Original release Dec 2015
</register> --> </register> -->
</registers> </registers>
</peripheral> </peripheral>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!--Interrupt Router --> <!--Interrupt Router -->
<peripheral> <peripheral>
<name>IRQ_ROUTER</name> <name>IRQ_ROUTER</name>
@ -9664,7 +9671,7 @@ V1.0 - Original release Dec 2015
</register> </register>
</registers> </registers>
</peripheral> </peripheral>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!--Watchdog --> <!--Watchdog -->
<peripheral> <peripheral>
<name>WATCH_DOG</name> <name>WATCH_DOG</name>
@ -9933,7 +9940,7 @@ the counter from the value in the WDOGLOAD Register</description>
</register> </register>
</registers> </registers>
</peripheral> </peripheral>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!--TRNG --> <!--TRNG -->
<peripheral> <peripheral>
<name>TRNG</name> <name>TRNG</name>
@ -10244,7 +10251,7 @@ the counter from the value in the WDOGLOAD Register</description>
</register> </register>
</registers> </registers>
</peripheral> </peripheral>
<!-- **************************************************************************************** --> <!-- **************************************************************************************** -->
<!--ETHERNET --> <!--ETHERNET -->
<peripheral> <peripheral>
<name>ETH</name> <name>ETH</name>
@ -10261,7 +10268,7 @@ the counter from the value in the WDOGLOAD Register</description>
<value>36</value> <value>36</value>
</interrupt> </interrupt>
<headerStructName>ETH</headerStructName> <headerStructName>ETH</headerStructName>
<!-- GMAC Register Map --> <!-- GMAC Register Map -->
<registers> <registers>
<register> <register>
<name>MAC_CONFIG</name> <name>MAC_CONFIG</name>
@ -10734,7 +10741,7 @@ the counter from the value in the WDOGLOAD Register</description>
</field> </field>
</fields> </fields>
</register> </register>
<!-- MAC Management Counters registers --> <!-- MAC Management Counters registers -->
<register> <register>
<name>MMC_CNTRL</name> <name>MMC_CNTRL</name>
<description>MMC Control Register</description> <description>MMC Control Register</description>
@ -12342,7 +12349,7 @@ the counter from the value in the WDOGLOAD Register</description>
</field> </field>
</fields> </fields>
</register> </register>
<!-- DMA Register definitions --> <!-- DMA Register definitions -->
<register> <register>
<name>DMA_BUS_MODE</name> <name>DMA_BUS_MODE</name>
<description>Controls the DMA Host Interface Mode</description> <description>Controls the DMA Host Interface Mode</description>