rust/va416xx-rs
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auto-format SVD file

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This commit is contained in:
Robin Müller 2024-06-11 14:07:44 +02:00
parent d10086ee71
commit 8028c1023b
1 changed files with 1921 additions and 1914 deletions
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35
va416xx/svd/va416xx-base.svd
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@ -1,5 +1,5 @@
<?xml version="1.1" encoding="UTF-8"?>
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
<vendor>VORAGO TECHNOLOGIES</vendor>
<vendorID>SST</vendorID>
<name>va416xx</name>
@ -38,13 +38,18 @@ V1.0 - Original release Dec 2015
</cpu>
<headerSystemFilename>system_va416xx</headerSystemFilename>
<headerDefinitionsPrefix>VOR_</headerDefinitionsPrefix>
<addressUnitBits>8</addressUnitBits><!--byte addressable memory-->
<width>32</width><!--bus width is 32 bits-->
<addressUnitBits>8</addressUnitBits>
<!--byte addressable memory-->
<width>32</width>
<!--bus width is 32 bits-->
<!-- registerPropertiesGroup: default settings implicitly inherited by subsequent sections -->
<size>32</size>
<access>read-write</access><!-- default size (number of bits) of all peripherals -->
<resetValue>0x00000000</resetValue><!-- by default all bits of the registers are initialized to 0 on reset -->
<resetMask>0xFFFFFFFF</resetMask><!-- by default all 32Bits of the registers are used -->
<access>read-write</access>
<!-- default size (number of bits) of all peripherals -->
<resetValue>0x00000000</resetValue>
<!-- by default all bits of the registers are initialized to 0 on reset -->
<resetMask>0xFFFFFFFF</resetMask>
<!-- by default all 32Bits of the registers are used -->
<peripherals>
<!-- **************************************************************************************** -->
<!--Clock Generator Peripheral-->
@ -850,7 +855,8 @@ V1.0 - Original release Dec 2015
<name>JMP2BOOT</name>
<description>Enables a skip of all delay counters and eFuse read</description>
<bitRange>[19:19]</bitRange>
</field> <field>
</field>
<field>
<name>SKIPBOOT</name>
<description>Enables a skip of all delay counters, eFuse read, and boot</description>
<bitRange>[20:20]</bitRange>
@ -3063,7 +3069,7 @@ V1.0 - Original release Dec 2015
</register>
<register>
<name>IRQ_EVT</name>
<description>Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)</description>
<description>Interrupt Event Register (1:HighLevel/L-&gt;H Edge, 0:LowLevel/H-&gt;L Edge)</description>
<addressOffset>0x03c</addressOffset>
<resetValue>0x00000000</resetValue>
</register>
@ -3990,7 +3996,7 @@ V1.0 - Original release Dec 2015
<fields>
<field>
<name>SIZE</name>
<description>Data Size(0x3=>4, 0xf=>16)</description>
<description>Data Size(0x3=&gt;4, 0xf=&gt;16)</description>
<bitRange>[3:0]</bitRange>
</field>
<field>
@ -6433,7 +6439,6 @@ V1.0 - Original release Dec 2015
<addressOffset>0x130</addressOffset>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BYTE3</name>
<description>Data Byte 3</description>
@ -6638,7 +6643,6 @@ V1.0 - Original release Dec 2015
<description>Data Length Code</description>
<bitRange>[15:12]</bitRange>
</field>
<field>
<name>PRI</name>
<description>Transmit Priority Code</description>
@ -8397,15 +8401,18 @@ V1.0 - Original release Dec 2015
<name>TQ</name>
<description>Generate interrupt when a valid time-code is received</description>
<bitRange>[8:8]</bitRange>
</field> <field>
</field>
<field>
<name>RS</name>
<description>Make complete reset of the SpaceWire node. Self-clearing</description>
<bitRange>[6:6]</bitRange>
</field> <field>
</field>
<field>
<name>PM</name>
<description>Enable Promiscuous mode</description>
<bitRange>[5:5]</bitRange>
</field> <field>
</field>
<field>
<name>TI</name>
<description>The host can generate a tick by writing a one to this field</description>
<bitRange>[4:4]</bitRange>