updated GPIO impl
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@ -30,12 +30,6 @@ rustup target add thumbv7em-none-eabihf
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After that, you can use `cargo build` to build the development version of the crate.
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If you have not done this yet, it is recommended to read some of the excellent resources
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available to learn Rust:
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- [Rust Embedded Book](https://docs.rust-embedded.org/book/)
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- [Rust Discovery Book](https://docs.rust-embedded.org/discovery/)
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## Setting up your own binary crate
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If you have a custom board, you might be interested in setting up a new binary crate for your
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@ -71,3 +65,11 @@ is contained within the
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7. Flashing the board might work differently for different boards and there is usually
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more than one way. You can find example instructions in primary README.
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## Embedded Rust
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If you have not done this yet, it is recommended to read some of the excellent resources
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available to learn Rust:
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- [Rust Embedded Book](https://docs.rust-embedded.org/book/)
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- [Rust Discovery Book](https://docs.rust-embedded.org/discovery/)
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3
va416xx-hal/docs.sh
Executable file
3
va416xx-hal/docs.sh
Executable file
@ -0,0 +1,3 @@
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#!/bin/sh
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export RUSTDOCFLAGS="--cfg docsrs --generate-link-to-definition -Z unstable-options"
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cargo +nightly doc --all-features --open
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@ -55,7 +55,7 @@
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//! error. If the [`DynPin`] is not in the correct [`DynPinMode`] for the
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//! operation, the trait functions will return
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//! [InvalidPinTypeError].
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use embedded_hal::digital::{ErrorKind, ErrorType, InputPin, OutputPin, StatefulOutputPin};
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use embedded_hal::digital::{ErrorType, InputPin, OutputPin, StatefulOutputPin};
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use super::{
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reg::RegisterInterface, FilterClkSel, FilterType, InterruptEdge, InterruptLevel, Pin, PinId,
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@ -472,11 +472,6 @@ impl<I: PinId, M: PinMode> Pin<I, M> {
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self.inner.regs.write_pin(false)
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}
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#[inline]
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pub(crate) fn _toggle_with_toggle_reg(&mut self) {
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self.inner.regs.toggle();
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}
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#[inline]
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pub(crate) fn _is_low(&self) -> bool {
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!self.inner.regs.read_pin()
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@ -598,6 +593,11 @@ impl<I: PinId, C: OutputConfig> Pin<I, Output<C>> {
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self.inner.regs.configure_delay(delay_1, delay_2);
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}
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#[inline]
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pub fn toggle_with_toggle_reg(&mut self) {
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self.inner.regs.toggle()
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}
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/// See p.52 of the programmers guide for more information.
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/// When configured for pulse mode, a given pin will set the non-default state for exactly
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/// one clock cycle before returning to the configured default state
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@ -144,7 +144,7 @@ pub(super) unsafe trait RegisterInterface {
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}
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}
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#[inline]
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#[inline(always)]
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fn port_reg(&self) -> &PortRegisterBlock {
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match self.id().group {
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DynGroup::A => unsafe { &(*Porta::ptr()) },
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@ -157,6 +157,7 @@ pub(super) unsafe trait RegisterInterface {
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}
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}
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#[inline(always)]
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fn iocfg_port(&self) -> &PortReg {
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let ioconfig = unsafe { Ioconfig::ptr().as_ref().unwrap() };
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match self.id().group {
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@ -170,12 +171,12 @@ pub(super) unsafe trait RegisterInterface {
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}
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}
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#[inline]
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#[inline(always)]
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fn mask_32(&self) -> u32 {
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1 << self.id().num
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}
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#[inline]
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#[inline(always)]
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fn enable_irq(&self) {
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self.port_reg()
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.irq_enb()
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@ -30,7 +30,7 @@ pub enum FifoEmptyMode {
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct ClockTooSlowForFastI2c;
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pub struct ClockTooSlowForFastI2cError;
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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@ -52,11 +52,11 @@ pub enum InitError {
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/// Wrong address used in constructor
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WrongAddrMode,
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/// APB1 clock is too slow for fast I2C mode.
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ClkTooSlow(ClockTooSlowForFastI2c),
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ClkTooSlow(ClockTooSlowForFastI2cError),
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}
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impl From<ClockTooSlowForFastI2c> for InitError {
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fn from(value: ClockTooSlowForFastI2c) -> Self {
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impl From<ClockTooSlowForFastI2cError> for InitError {
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fn from(value: ClockTooSlowForFastI2cError) -> Self {
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Self::ClkTooSlow(value)
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}
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}
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@ -318,7 +318,7 @@ impl<I2c: Instance> I2cBase<I2c> {
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speed_mode: I2cSpeed,
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ms_cfg: Option<&MasterConfig>,
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sl_cfg: Option<&SlaveConfig>,
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) -> Result<Self, ClockTooSlowForFastI2c> {
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) -> Result<Self, ClockTooSlowForFastI2cError> {
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syscfg.enable_peripheral_clock(I2c::PERIPH_SEL);
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let mut i2c_base = I2cBase {
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@ -421,19 +421,19 @@ impl<I2c: Instance> I2cBase<I2c> {
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});
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}
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fn calc_clk_div(&self, speed_mode: I2cSpeed) -> Result<u8, ClockTooSlowForFastI2c> {
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fn calc_clk_div(&self, speed_mode: I2cSpeed) -> Result<u8, ClockTooSlowForFastI2cError> {
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if speed_mode == I2cSpeed::Regular100khz {
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Ok(((self.clock.raw() / CLK_100K.raw() / 20) - 1) as u8)
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} else {
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if self.clock.raw() < MIN_CLK_400K.raw() {
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return Err(ClockTooSlowForFastI2c);
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return Err(ClockTooSlowForFastI2cError);
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}
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Ok(((self.clock.raw() / CLK_400K.raw() / 25) - 1) as u8)
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}
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}
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/// Configures the clock scale for a given speed mode setting
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pub fn cfg_clk_scale(&mut self, speed_mode: I2cSpeed) -> Result<(), ClockTooSlowForFastI2c> {
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pub fn cfg_clk_scale(&mut self, speed_mode: I2cSpeed) -> Result<(), ClockTooSlowForFastI2cError> {
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let clk_div = self.calc_clk_div(speed_mode)?;
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self.i2c
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.clkscale()
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@ -472,7 +472,7 @@ impl<I2c: Instance, Addr> I2cMaster<I2c, Addr> {
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cfg: MasterConfig,
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clocks: &Clocks,
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speed_mode: I2cSpeed,
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) -> Result<Self, ClockTooSlowForFastI2c> {
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) -> Result<Self, ClockTooSlowForFastI2cError> {
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Ok(I2cMaster {
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i2c_base: I2cBase::new(i2c, sys_cfg, clocks, speed_mode, Some(&cfg), None)?,
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addr: PhantomData,
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@ -733,7 +733,7 @@ impl<I2c: Instance, Addr> I2cSlave<I2c, Addr> {
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cfg: SlaveConfig,
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clocks: &Clocks,
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speed_mode: I2cSpeed,
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) -> Result<Self, ClockTooSlowForFastI2c> {
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) -> Result<Self, ClockTooSlowForFastI2cError> {
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Ok(I2cSlave {
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i2c_base: I2cBase::new(i2c, sys_cfg, clocks, speed_mode, None, Some(&cfg))?,
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addr: PhantomData,
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@ -895,7 +895,7 @@ impl<I2c: Instance> I2cSlave<I2c, TenBitAddress> {
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cfg: SlaveConfig,
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clocks: &Clocks,
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speed_mode: I2cSpeed,
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) -> Result<Self, ClockTooSlowForFastI2c> {
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) -> Result<Self, ClockTooSlowForFastI2cError> {
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Self::new_generic(i2c, sys_cfg, cfg, clocks, speed_mode)
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}
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}
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