examples work

va416xx-hal/src/uart/mod.rs

@@ -622,6 +622,7 @@ impl<Uart: Instance> UartBase<Uart> {
             w.txenable().clear_bit()
         });
         disable_nvic_interrupt(Uart::IRQ_RX);
+        disable_nvic_interrupt(Uart::IRQ_TX);
         self.uart
     }
 

va416xx-hal/src/uart/rx_asynch.rs

@@ -26,6 +26,8 @@ use embedded_io::ErrorType;
 use portable_atomic::AtomicBool;
 use va416xx::uart0 as uart_base;
 
+use crate::enable_nvic_interrupt;
+
 use super::{Bank, Instance, Rx, RxError, UartErrors};
 
 static UART_RX_WAKERS: [AtomicWaker; 3] = [const { AtomicWaker::new() }; 3];
@@ -277,6 +279,9 @@ impl<Uart: Instance, const N: usize> ErrorType for RxAsync<Uart, N> {
 fn stop_async_rx<Uart: Instance>(rx: &mut Rx<Uart>) {
     rx.disable_interrupts();
     rx.disable();
+    unsafe {
+        enable_nvic_interrupt(Uart::IRQ_RX);
+    }
     rx.clear_fifo();
 }
 
@@ -291,6 +296,9 @@ impl<Uart: Instance, const N: usize> RxAsync<Uart, N> {
         rx.clear_fifo();
         // Enable those together.
         critical_section::with(|_| {
+            unsafe {
+                enable_nvic_interrupt(Uart::IRQ_RX);
+            }
             rx.enable_interrupts();
             rx.enable();
         });

va416xx-hal/src/uart/tx_asynch.rs

@@ -219,11 +219,19 @@ pub struct TxAsync<Uart: Instance> {
 }
 
 impl<Uart: Instance> TxAsync<Uart> {
+    /// Create a new asynchronous TX object.
+    ///
+    /// This function also enable the NVIC interrupt, but does not enable the peripheral specific
+    /// interrupts.
     pub fn new(tx: Tx<Uart>) -> Self {
+        // Safety: We own TX now.
+        unsafe { enable_nvic_interrupt(Uart::IRQ_TX) };
         Self { tx }
     }
 
+    /// This function also disables the NVIC interrupt.
     pub fn release(self) -> Tx<Uart> {
+        disable_nvic_interrupt(Uart::IRQ_TX);
         self.tx
     }
 }