examples work
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@ -39,7 +39,6 @@ static QUEUE_UART_A: static_cell::ConstStaticCell<Queue<u8, 256>> =
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static_cell::ConstStaticCell::new(Queue::new());
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static_cell::ConstStaticCell::new(Queue::new());
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static PRODUCER_UART_A: Mutex<RefCell<Option<Producer<u8, 256>>>> = Mutex::new(RefCell::new(None));
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static PRODUCER_UART_A: Mutex<RefCell<Option<Producer<u8, 256>>>> = Mutex::new(RefCell::new(None));
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// main is itself an async function.
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#[embassy_executor::main]
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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async fn main(_spawner: Spawner) {
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rtt_init_print!();
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rtt_init_print!();
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@ -81,6 +80,7 @@ async fn main(_spawner: Spawner) {
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*PRODUCER_UART_A.borrow(cs).borrow_mut() = Some(prod_uart_a);
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*PRODUCER_UART_A.borrow(cs).borrow_mut() = Some(prod_uart_a);
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});
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});
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// TODO: Add example for RxAsyncOverwriting using another UART.
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let mut async_uart_rx = RxAsync::new(rx_uart_a, cons_uart_a);
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let mut async_uart_rx = RxAsync::new(rx_uart_a, cons_uart_a);
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let mut buf = [0u8; 256];
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let mut buf = [0u8; 256];
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loop {
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loop {
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@ -622,6 +622,7 @@ impl<Uart: Instance> UartBase<Uart> {
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w.txenable().clear_bit()
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w.txenable().clear_bit()
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});
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});
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disable_nvic_interrupt(Uart::IRQ_RX);
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disable_nvic_interrupt(Uart::IRQ_RX);
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disable_nvic_interrupt(Uart::IRQ_TX);
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self.uart
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self.uart
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}
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}
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@ -26,6 +26,8 @@ use embedded_io::ErrorType;
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use portable_atomic::AtomicBool;
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use portable_atomic::AtomicBool;
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use va416xx::uart0 as uart_base;
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use va416xx::uart0 as uart_base;
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use crate::enable_nvic_interrupt;
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use super::{Bank, Instance, Rx, RxError, UartErrors};
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use super::{Bank, Instance, Rx, RxError, UartErrors};
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static UART_RX_WAKERS: [AtomicWaker; 3] = [const { AtomicWaker::new() }; 3];
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static UART_RX_WAKERS: [AtomicWaker; 3] = [const { AtomicWaker::new() }; 3];
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@ -277,6 +279,9 @@ impl<Uart: Instance, const N: usize> ErrorType for RxAsync<Uart, N> {
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fn stop_async_rx<Uart: Instance>(rx: &mut Rx<Uart>) {
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fn stop_async_rx<Uart: Instance>(rx: &mut Rx<Uart>) {
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rx.disable_interrupts();
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rx.disable_interrupts();
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rx.disable();
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rx.disable();
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unsafe {
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enable_nvic_interrupt(Uart::IRQ_RX);
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}
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rx.clear_fifo();
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rx.clear_fifo();
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}
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}
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@ -291,6 +296,9 @@ impl<Uart: Instance, const N: usize> RxAsync<Uart, N> {
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rx.clear_fifo();
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rx.clear_fifo();
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// Enable those together.
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// Enable those together.
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critical_section::with(|_| {
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critical_section::with(|_| {
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unsafe {
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enable_nvic_interrupt(Uart::IRQ_RX);
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}
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rx.enable_interrupts();
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rx.enable_interrupts();
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rx.enable();
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rx.enable();
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});
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});
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@ -219,11 +219,19 @@ pub struct TxAsync<Uart: Instance> {
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}
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}
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impl<Uart: Instance> TxAsync<Uart> {
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impl<Uart: Instance> TxAsync<Uart> {
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/// Create a new asynchronous TX object.
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///
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/// This function also enable the NVIC interrupt, but does not enable the peripheral specific
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/// interrupts.
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pub fn new(tx: Tx<Uart>) -> Self {
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pub fn new(tx: Tx<Uart>) -> Self {
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// Safety: We own TX now.
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unsafe { enable_nvic_interrupt(Uart::IRQ_TX) };
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Self { tx }
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Self { tx }
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}
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}
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/// This function also disables the NVIC interrupt.
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pub fn release(self) -> Tx<Uart> {
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pub fn release(self) -> Tx<Uart> {
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disable_nvic_interrupt(Uart::IRQ_TX);
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self.tx
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self.tx
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}
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}
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}
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}
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