examples work

This commit is contained in:
Robin Müller 2025-02-17 11:13:45 +01:00
parent 7999b13c94
commit e540f5d4c1
Signed by: muellerr
GPG Key ID: A649FB78196E3849
4 changed files with 18 additions and 1 deletions

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@ -39,7 +39,6 @@ static QUEUE_UART_A: static_cell::ConstStaticCell<Queue<u8, 256>> =
static_cell::ConstStaticCell::new(Queue::new()); static_cell::ConstStaticCell::new(Queue::new());
static PRODUCER_UART_A: Mutex<RefCell<Option<Producer<u8, 256>>>> = Mutex::new(RefCell::new(None)); static PRODUCER_UART_A: Mutex<RefCell<Option<Producer<u8, 256>>>> = Mutex::new(RefCell::new(None));
// main is itself an async function.
#[embassy_executor::main] #[embassy_executor::main]
async fn main(_spawner: Spawner) { async fn main(_spawner: Spawner) {
rtt_init_print!(); rtt_init_print!();
@ -81,6 +80,7 @@ async fn main(_spawner: Spawner) {
*PRODUCER_UART_A.borrow(cs).borrow_mut() = Some(prod_uart_a); *PRODUCER_UART_A.borrow(cs).borrow_mut() = Some(prod_uart_a);
}); });
// TODO: Add example for RxAsyncOverwriting using another UART.
let mut async_uart_rx = RxAsync::new(rx_uart_a, cons_uart_a); let mut async_uart_rx = RxAsync::new(rx_uart_a, cons_uart_a);
let mut buf = [0u8; 256]; let mut buf = [0u8; 256];
loop { loop {

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@ -622,6 +622,7 @@ impl<Uart: Instance> UartBase<Uart> {
w.txenable().clear_bit() w.txenable().clear_bit()
}); });
disable_nvic_interrupt(Uart::IRQ_RX); disable_nvic_interrupt(Uart::IRQ_RX);
disable_nvic_interrupt(Uart::IRQ_TX);
self.uart self.uart
} }

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@ -26,6 +26,8 @@ use embedded_io::ErrorType;
use portable_atomic::AtomicBool; use portable_atomic::AtomicBool;
use va416xx::uart0 as uart_base; use va416xx::uart0 as uart_base;
use crate::enable_nvic_interrupt;
use super::{Bank, Instance, Rx, RxError, UartErrors}; use super::{Bank, Instance, Rx, RxError, UartErrors};
static UART_RX_WAKERS: [AtomicWaker; 3] = [const { AtomicWaker::new() }; 3]; static UART_RX_WAKERS: [AtomicWaker; 3] = [const { AtomicWaker::new() }; 3];
@ -277,6 +279,9 @@ impl<Uart: Instance, const N: usize> ErrorType for RxAsync<Uart, N> {
fn stop_async_rx<Uart: Instance>(rx: &mut Rx<Uart>) { fn stop_async_rx<Uart: Instance>(rx: &mut Rx<Uart>) {
rx.disable_interrupts(); rx.disable_interrupts();
rx.disable(); rx.disable();
unsafe {
enable_nvic_interrupt(Uart::IRQ_RX);
}
rx.clear_fifo(); rx.clear_fifo();
} }
@ -291,6 +296,9 @@ impl<Uart: Instance, const N: usize> RxAsync<Uart, N> {
rx.clear_fifo(); rx.clear_fifo();
// Enable those together. // Enable those together.
critical_section::with(|_| { critical_section::with(|_| {
unsafe {
enable_nvic_interrupt(Uart::IRQ_RX);
}
rx.enable_interrupts(); rx.enable_interrupts();
rx.enable(); rx.enable();
}); });

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@ -219,11 +219,19 @@ pub struct TxAsync<Uart: Instance> {
} }
impl<Uart: Instance> TxAsync<Uart> { impl<Uart: Instance> TxAsync<Uart> {
/// Create a new asynchronous TX object.
///
/// This function also enable the NVIC interrupt, but does not enable the peripheral specific
/// interrupts.
pub fn new(tx: Tx<Uart>) -> Self { pub fn new(tx: Tx<Uart>) -> Self {
// Safety: We own TX now.
unsafe { enable_nvic_interrupt(Uart::IRQ_TX) };
Self { tx } Self { tx }
} }
/// This function also disables the NVIC interrupt.
pub fn release(self) -> Tx<Uart> { pub fn release(self) -> Tx<Uart> {
disable_nvic_interrupt(Uart::IRQ_TX);
self.tx self.tx
} }
} }