UART embedded-io fixes

Reviewed-on: #65

bootloader/Cargo.toml

@@ -14,7 +14,7 @@ crc = "3"
 static_assertions = "1"
 
 [dependencies.va416xx-hal]
-path = "../va416xx-hal"
+version = "0.5"
 features = ["va41630"]
 
 [features]

examples/embassy/Cargo.toml

@@ -28,8 +28,8 @@ embassy-executor = { version = "0.7", features = [
   "executor-interrupt"
 ]}
 
-va416xx-hal = { version = "0.5", path = "../../va416xx-hal" }
-va416xx-embassy = { version = "0.1", default-features = false, path = "../../va416xx-embassy" }
+va416xx-hal = { version = "0.5" }
+va416xx-embassy = { version = "0.1", default-features = false }
 
 [features]
 default = ["ticks-hz-1_000", "va416xx-embassy/irq-tim14-tim15"]

examples/rtic/Cargo.toml

@@ -11,7 +11,7 @@ rtt-target = { version = "0.6" }
 rtic-sync = { version = "1.3", features = ["defmt-03"] }
 panic-rtt-target = { version = "0.2" }
 
-va416xx-hal = { version = "0.5", features = ["va41630"], path = "../../va416xx-hal" }
+va416xx-hal = { version = "0.5", features = ["va41630"] }
 
 [dependencies.rtic]
 version = "2"

examples/simple/Cargo.toml

@@ -16,7 +16,7 @@ embedded-io = "0.6"
 panic-halt = "1"
 accelerometer = "0.12"
 
-va416xx-hal = { version = "0.5", features = ["va41630"], path = "../../va416xx-hal" }
+va416xx-hal = { version = "0.5", features = ["va41630"] }
 
 [dependencies.vorago-peb1]
 path = "../../vorago-peb1"

flashloader/Cargo.toml

@@ -22,7 +22,7 @@ once_cell = { version = "1", default-features = false, features = ["critical-sec
 spacepackets = { version = "0.13", default-features = false }
 cobs = { version = "0.3", default-features = false }
 
-va416xx-hal = { version = "0.4", features = ["va41630"] }
+va416xx-hal = { version = "0.5", features = ["va41630"] }
 
 rtic = { version = "2", features = ["thumbv7-backend"] }
 rtic-monotonics = { version = "2", features = ["cortex-m-systick"] }

flashloader/src/main.rs

@@ -256,7 +256,7 @@ mod app {
         match cx
             .local
             .uart_rx
-            .irq_handler_max_size_or_timeout_based(cx.local.rx_context, cx.local.rx_buf)
+            .on_interrupt_max_size_or_timeout_based(cx.local.rx_context, cx.local.rx_buf)
         {
             Ok(result) => {
                 if RX_DEBUGGING {

va416xx-embassy/Cargo.toml

@@ -21,7 +21,7 @@ portable-atomic = "1"
 
 once_cell = { version = "1", default-features = false, features = ["critical-section"] }
 
-va416xx-hal = { version = "0.5", path = "../va416xx-hal" }
+va416xx-hal = { version = ">=0.4, <=0.5" }
 
 [features]
 default = ["irq-tim14-tim15"]

va416xx-hal/CHANGELOG.md

@@ -8,6 +8,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 # [unreleased]
 
+# [v0.5.1] 2025-03-10
+
+## Fixed
+
+- Fix `embedded_io` UART implementation to implement the documented contract properly.
+  The implementation will now block until at least one byte is available or can be written, unless
+  the send or receive buffer is empty.
+
 # [v0.5.0] 2025-03-07
 
 - Bugfix for I2C `TimingCfg::reg`
@@ -111,6 +119,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Initial release with basic HAL drivers
 
 [unreleased]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-hal-v0.5.0...HEAD
+[v0.5.1]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-hal-v0.5.0...va416xx-hal-v0.5.1
 [v0.5.0]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-hal-v0.4.1...va416xx-hal-v0.5.0
 [v0.4.1]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-hal-v0.4.0...va416xx-hal-v0.4.1
 [v0.4.0]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-hal-v0.3.0...va416xx-hal-v0.4.0

va416xx-hal/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "va416xx-hal"
-version = "0.5.0"
+version = "0.5.1"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "HAL for the Vorago VA416xx family of MCUs"

va416xx-hal/src/uart/mod.rs

@@ -868,7 +868,15 @@ impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
 
 impl<Uart: Instance> embedded_io::Read for Rx<Uart> {
     fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
+        if buf.is_empty() {
+            return Ok(0);
+        }
         let mut read = 0;
+        loop {
+            if self.0.rxstatus().read().rdavl().bit_is_set() {
+                break;
+            }
+        }
         for byte in buf.iter_mut() {
             match <Self as embedded_hal_nb::serial::Read<u8>>::read(self) {
                 Ok(w) => {
@@ -1038,14 +1046,19 @@ impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
         if buf.is_empty() {
             return Ok(0);
         }
-
-        for byte in buf.iter() {
-            nb::block!(<Self as embedded_hal_nb::serial::Write<u8>>::write(
-                self, *byte
-            ))?;
+        loop {
+            if self.0.txstatus().read().wrrdy().bit_is_set() {
+                break;
+            }
         }
-
-        Ok(buf.len())
+        let mut written = 0;
+        for byte in buf.iter() {
+            match <Self as embedded_hal_nb::serial::Write<u8>>::write(self, *byte) {
+                Ok(_) => written += 1,
+                Err(nb::Error::WouldBlock) => return Ok(written),
+            }
+        }
+        Ok(written)
     }
 
     fn flush(&mut self) -> Result<(), Self::Error> {