first building version of the PAC

2021-11-21 20:06:32 +01:00
parent 71f0713e4f
commit 6145f4163f
580 changed files with 96467 additions and 6 deletions
--- a/src/utility/perid.rs
+++ b/src/utility/perid.rs
@ -0,0 +1,31 @@
+#[doc = "Register `PERID` reader"]
+pub struct R(crate::R<PERID_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PERID_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PERID_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PERID_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"]
+pub struct PERID_SPEC;
+impl crate::RegisterSpec for PERID_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [perid::R](R) reader structure"]
+impl crate::Readable for PERID_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets PERID to value 0x0284_07e9"]
+impl crate::Resettable for PERID_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x0284_07e9
+    }
+}
--- a/src/utility/ram_trap_addr0.rs
+++ b/src/utility/ram_trap_addr0.rs
@ -0,0 +1,150 @@
+#[doc = "Register `RAM_TRAP_ADDR0` reader"]
+pub struct R(crate::R<RAM_TRAP_ADDR0_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_TRAP_ADDR0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_TRAP_ADDR0_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_TRAP_ADDR0_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_TRAP_ADDR0` writer"]
+pub struct W(crate::W<RAM_TRAP_ADDR0_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_TRAP_ADDR0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_TRAP_ADDR0_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_TRAP_ADDR0_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable Trap mode"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable Trap mode"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
+        self.w
+    }
+}
+#[doc = "Field `ADDR` reader - Address bits for trap match"]
+pub struct ADDR_R(crate::FieldReader<u32, u32>);
+impl ADDR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Address bits for trap match"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u32) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x1fff_ffff << 2)) | ((value as u32 & 0x1fff_ffff) << 2);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 31 - Enable Trap mode"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 31) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:30 - Address bits for trap match"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new(((self.bits >> 2) & 0x1fff_ffff) as u32)
+    }
+}
+impl W {
+    #[doc = "Bit 31 - Enable Trap mode"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:30 - Address bits for trap match"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM0 EDAC Trap Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_addr0](index.html) module"]
+pub struct RAM_TRAP_ADDR0_SPEC;
+impl crate::RegisterSpec for RAM_TRAP_ADDR0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_trap_addr0::R](R) reader structure"]
+impl crate::Readable for RAM_TRAP_ADDR0_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_trap_addr0::W](W) writer structure"]
+impl crate::Writable for RAM_TRAP_ADDR0_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_TRAP_ADDR0 to value 0"]
+impl crate::Resettable for RAM_TRAP_ADDR0_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/ram_trap_addr1.rs
+++ b/src/utility/ram_trap_addr1.rs
@ -0,0 +1,150 @@
+#[doc = "Register `RAM_TRAP_ADDR1` reader"]
+pub struct R(crate::R<RAM_TRAP_ADDR1_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_TRAP_ADDR1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_TRAP_ADDR1_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_TRAP_ADDR1_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_TRAP_ADDR1` writer"]
+pub struct W(crate::W<RAM_TRAP_ADDR1_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_TRAP_ADDR1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_TRAP_ADDR1_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_TRAP_ADDR1_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable Trap mode"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable Trap mode"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
+        self.w
+    }
+}
+#[doc = "Field `ADDR` reader - Address bits for trap match"]
+pub struct ADDR_R(crate::FieldReader<u32, u32>);
+impl ADDR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Address bits for trap match"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u32) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x1fff_ffff << 2)) | ((value as u32 & 0x1fff_ffff) << 2);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 31 - Enable Trap mode"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 31) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:30 - Address bits for trap match"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new(((self.bits >> 2) & 0x1fff_ffff) as u32)
+    }
+}
+impl W {
+    #[doc = "Bit 31 - Enable Trap mode"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:30 - Address bits for trap match"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM1 EDAC Trap Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_addr1](index.html) module"]
+pub struct RAM_TRAP_ADDR1_SPEC;
+impl crate::RegisterSpec for RAM_TRAP_ADDR1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_trap_addr1::R](R) reader structure"]
+impl crate::Readable for RAM_TRAP_ADDR1_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_trap_addr1::W](W) writer structure"]
+impl crate::Writable for RAM_TRAP_ADDR1_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_TRAP_ADDR1 to value 0"]
+impl crate::Resettable for RAM_TRAP_ADDR1_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/ram_trap_synd0.rs
+++ b/src/utility/ram_trap_synd0.rs
@ -0,0 +1,140 @@
+#[doc = "Register `RAM_TRAP_SYND0` reader"]
+pub struct R(crate::R<RAM_TRAP_SYND0_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_TRAP_SYND0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_TRAP_SYND0_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_TRAP_SYND0_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_TRAP_SYND0` writer"]
+pub struct W(crate::W<RAM_TRAP_SYND0_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_TRAP_SYND0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_TRAP_SYND0_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_TRAP_SYND0_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `RAM_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"]
+pub struct RAM_SYND_31_16_R(crate::FieldReader<u8, u8>);
+impl RAM_SYND_31_16_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        RAM_SYND_31_16_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAM_SYND_31_16_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RAM_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"]
+pub struct RAM_SYND_31_16_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RAM_SYND_31_16_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6);
+        self.w
+    }
+}
+#[doc = "Field `RAM_SYND_7_0` reader - 6-bit syndrome value for bits 15-0"]
+pub struct RAM_SYND_7_0_R(crate::FieldReader<u8, u8>);
+impl RAM_SYND_7_0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        RAM_SYND_7_0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAM_SYND_7_0_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RAM_SYND_7_0` writer - 6-bit syndrome value for bits 15-0"]
+pub struct RAM_SYND_7_0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RAM_SYND_7_0_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
+    #[inline(always)]
+    pub fn ram_synd_31_16(&self) -> RAM_SYND_31_16_R {
+        RAM_SYND_31_16_R::new(((self.bits >> 6) & 0x3f) as u8)
+    }
+    #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn ram_synd_7_0(&self) -> RAM_SYND_7_0_R {
+        RAM_SYND_7_0_R::new((self.bits & 0x3f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
+    #[inline(always)]
+    pub fn ram_synd_31_16(&mut self) -> RAM_SYND_31_16_W {
+        RAM_SYND_31_16_W { w: self }
+    }
+    #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn ram_synd_7_0(&mut self) -> RAM_SYND_7_0_W {
+        RAM_SYND_7_0_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM0 EDAC Trap Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_synd0](index.html) module"]
+pub struct RAM_TRAP_SYND0_SPEC;
+impl crate::RegisterSpec for RAM_TRAP_SYND0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_trap_synd0::R](R) reader structure"]
+impl crate::Readable for RAM_TRAP_SYND0_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_trap_synd0::W](W) writer structure"]
+impl crate::Writable for RAM_TRAP_SYND0_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_TRAP_SYND0 to value 0"]
+impl crate::Resettable for RAM_TRAP_SYND0_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/ram_trap_synd1.rs
+++ b/src/utility/ram_trap_synd1.rs
@ -0,0 +1,140 @@
+#[doc = "Register `RAM_TRAP_SYND1` reader"]
+pub struct R(crate::R<RAM_TRAP_SYND1_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_TRAP_SYND1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_TRAP_SYND1_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_TRAP_SYND1_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_TRAP_SYND1` writer"]
+pub struct W(crate::W<RAM_TRAP_SYND1_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_TRAP_SYND1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_TRAP_SYND1_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_TRAP_SYND1_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `RAM_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"]
+pub struct RAM_SYND_31_16_R(crate::FieldReader<u8, u8>);
+impl RAM_SYND_31_16_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        RAM_SYND_31_16_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAM_SYND_31_16_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RAM_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"]
+pub struct RAM_SYND_31_16_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RAM_SYND_31_16_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6);
+        self.w
+    }
+}
+#[doc = "Field `RAM_SYND_7_0` reader - 6-bit syndrome value for bits 15-0"]
+pub struct RAM_SYND_7_0_R(crate::FieldReader<u8, u8>);
+impl RAM_SYND_7_0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        RAM_SYND_7_0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAM_SYND_7_0_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RAM_SYND_7_0` writer - 6-bit syndrome value for bits 15-0"]
+pub struct RAM_SYND_7_0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RAM_SYND_7_0_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
+    #[inline(always)]
+    pub fn ram_synd_31_16(&self) -> RAM_SYND_31_16_R {
+        RAM_SYND_31_16_R::new(((self.bits >> 6) & 0x3f) as u8)
+    }
+    #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn ram_synd_7_0(&self) -> RAM_SYND_7_0_R {
+        RAM_SYND_7_0_R::new((self.bits & 0x3f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
+    #[inline(always)]
+    pub fn ram_synd_31_16(&mut self) -> RAM_SYND_31_16_W {
+        RAM_SYND_31_16_W { w: self }
+    }
+    #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn ram_synd_7_0(&mut self) -> RAM_SYND_7_0_W {
+        RAM_SYND_7_0_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM1 EDAC Trap Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_synd1](index.html) module"]
+pub struct RAM_TRAP_SYND1_SPEC;
+impl crate::RegisterSpec for RAM_TRAP_SYND1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_trap_synd1::R](R) reader structure"]
+impl crate::Readable for RAM_TRAP_SYND1_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_trap_synd1::W](W) writer structure"]
+impl crate::Writable for RAM_TRAP_SYND1_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_TRAP_SYND1 to value 0"]
+impl crate::Resettable for RAM_TRAP_SYND1_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/rom_trap_address.rs
+++ b/src/utility/rom_trap_address.rs
@ -0,0 +1,150 @@
+#[doc = "Register `ROM_TRAP_ADDRESS` reader"]
+pub struct R(crate::R<ROM_TRAP_ADDRESS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_TRAP_ADDRESS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_TRAP_ADDRESS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_TRAP_ADDRESS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ROM_TRAP_ADDRESS` writer"]
+pub struct W(crate::W<ROM_TRAP_ADDRESS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ROM_TRAP_ADDRESS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ROM_TRAP_ADDRESS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ROM_TRAP_ADDRESS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable Trap mode"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable Trap mode"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
+        self.w
+    }
+}
+#[doc = "Field `ADDR` reader - Address bits for trap match"]
+pub struct ADDR_R(crate::FieldReader<u32, u32>);
+impl ADDR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Address bits for trap match"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u32) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x1fff_ffff << 2)) | ((value as u32 & 0x1fff_ffff) << 2);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 31 - Enable Trap mode"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 31) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:30 - Address bits for trap match"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new(((self.bits >> 2) & 0x1fff_ffff) as u32)
+    }
+}
+impl W {
+    #[doc = "Bit 31 - Enable Trap mode"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:30 - Address bits for trap match"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ROM EDAC Trap Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_trap_address](index.html) module"]
+pub struct ROM_TRAP_ADDRESS_SPEC;
+impl crate::RegisterSpec for ROM_TRAP_ADDRESS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_trap_address::R](R) reader structure"]
+impl crate::Readable for ROM_TRAP_ADDRESS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rom_trap_address::W](W) writer structure"]
+impl crate::Writable for ROM_TRAP_ADDRESS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ROM_TRAP_ADDRESS to value 0"]
+impl crate::Resettable for ROM_TRAP_ADDRESS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/rom_trap_synd.rs
+++ b/src/utility/rom_trap_synd.rs
@ -0,0 +1,140 @@
+#[doc = "Register `ROM_TRAP_SYND` reader"]
+pub struct R(crate::R<ROM_TRAP_SYND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_TRAP_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_TRAP_SYND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_TRAP_SYND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ROM_TRAP_SYND` writer"]
+pub struct W(crate::W<ROM_TRAP_SYND_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ROM_TRAP_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ROM_TRAP_SYND_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ROM_TRAP_SYND_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `R0M_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"]
+pub struct R0M_SYND_31_16_R(crate::FieldReader<u8, u8>);
+impl R0M_SYND_31_16_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        R0M_SYND_31_16_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for R0M_SYND_31_16_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `R0M_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"]
+pub struct R0M_SYND_31_16_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> R0M_SYND_31_16_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6);
+        self.w
+    }
+}
+#[doc = "Field `ROM_SYND_7_0` reader - 6-bit syndrome value for bits 15-0"]
+pub struct ROM_SYND_7_0_R(crate::FieldReader<u8, u8>);
+impl ROM_SYND_7_0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        ROM_SYND_7_0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ROM_SYND_7_0_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ROM_SYND_7_0` writer - 6-bit syndrome value for bits 15-0"]
+pub struct ROM_SYND_7_0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ROM_SYND_7_0_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
+    #[inline(always)]
+    pub fn r0m_synd_31_16(&self) -> R0M_SYND_31_16_R {
+        R0M_SYND_31_16_R::new(((self.bits >> 6) & 0x3f) as u8)
+    }
+    #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn rom_synd_7_0(&self) -> ROM_SYND_7_0_R {
+        ROM_SYND_7_0_R::new((self.bits & 0x3f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
+    #[inline(always)]
+    pub fn r0m_synd_31_16(&mut self) -> R0M_SYND_31_16_W {
+        R0M_SYND_31_16_W { w: self }
+    }
+    #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn rom_synd_7_0(&mut self) -> ROM_SYND_7_0_W {
+        ROM_SYND_7_0_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ROM EDAC Trap Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_trap_synd](index.html) module"]
+pub struct ROM_TRAP_SYND_SPEC;
+impl crate::RegisterSpec for ROM_TRAP_SYND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_trap_synd::R](R) reader structure"]
+impl crate::Readable for ROM_TRAP_SYND_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rom_trap_synd::W](W) writer structure"]
+impl crate::Writable for ROM_TRAP_SYND_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ROM_TRAP_SYND to value 0"]
+impl crate::Resettable for ROM_TRAP_SYND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/synd_check_32_44_data.rs
+++ b/src/utility/synd_check_32_44_data.rs
@ -0,0 +1,31 @@
+#[doc = "Register `SYND_CHECK_32_44_DATA` reader"]
+pub struct R(crate::R<SYND_CHECK_32_44_DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYND_CHECK_32_44_DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYND_CHECK_32_44_DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYND_CHECK_32_44_DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "EDAC Decode Data\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_check_32_44_data](index.html) module"]
+pub struct SYND_CHECK_32_44_DATA_SPEC;
+impl crate::RegisterSpec for SYND_CHECK_32_44_DATA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [synd_check_32_44_data::R](R) reader structure"]
+impl crate::Readable for SYND_CHECK_32_44_DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYND_CHECK_32_44_DATA to value 0"]
+impl crate::Resettable for SYND_CHECK_32_44_DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/synd_check_32_44_synd.rs
+++ b/src/utility/synd_check_32_44_synd.rs
@ -0,0 +1,93 @@
+#[doc = "Register `SYND_CHECK_32_44_SYND` reader"]
+pub struct R(crate::R<SYND_CHECK_32_44_SYND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYND_CHECK_32_44_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYND_CHECK_32_44_SYND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYND_CHECK_32_44_SYND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `MBE` reader - Multiple bit error detect status"]
+pub struct MBE_R(crate::FieldReader<u8, u8>);
+impl MBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        MBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MBE_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SBE` reader - Single bit error detect status"]
+pub struct SBE_R(crate::FieldReader<u8, u8>);
+impl SBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        SBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SBE_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYND_CHECK_32_44_SYND` reader - Correct syndrome value"]
+pub struct SYND_CHECK_32_44_SYND_R(crate::FieldReader<u16, u16>);
+impl SYND_CHECK_32_44_SYND_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u16) -> Self {
+        SYND_CHECK_32_44_SYND_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYND_CHECK_32_44_SYND_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bits 14:15 - Multiple bit error detect status"]
+    #[inline(always)]
+    pub fn mbe(&self) -> MBE_R {
+        MBE_R::new(((self.bits >> 14) & 0x03) as u8)
+    }
+    #[doc = "Bits 12:13 - Single bit error detect status"]
+    #[inline(always)]
+    pub fn sbe(&self) -> SBE_R {
+        SBE_R::new(((self.bits >> 12) & 0x03) as u8)
+    }
+    #[doc = "Bits 0:11 - Correct syndrome value"]
+    #[inline(always)]
+    pub fn synd_check_32_44_synd(&self) -> SYND_CHECK_32_44_SYND_R {
+        SYND_CHECK_32_44_SYND_R::new((self.bits & 0x0fff) as u16)
+    }
+}
+#[doc = "EDAC Decode Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_check_32_44_synd](index.html) module"]
+pub struct SYND_CHECK_32_44_SYND_SPEC;
+impl crate::RegisterSpec for SYND_CHECK_32_44_SYND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [synd_check_32_44_synd::R](R) reader structure"]
+impl crate::Readable for SYND_CHECK_32_44_SYND_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYND_CHECK_32_44_SYND to value 0"]
+impl crate::Resettable for SYND_CHECK_32_44_SYND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/synd_check_32_52_data.rs
+++ b/src/utility/synd_check_32_52_data.rs
@ -0,0 +1,31 @@
+#[doc = "Register `SYND_CHECK_32_52_DATA` reader"]
+pub struct R(crate::R<SYND_CHECK_32_52_DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYND_CHECK_32_52_DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYND_CHECK_32_52_DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYND_CHECK_32_52_DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "EDAC Decode Data\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_check_32_52_data](index.html) module"]
+pub struct SYND_CHECK_32_52_DATA_SPEC;
+impl crate::RegisterSpec for SYND_CHECK_32_52_DATA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [synd_check_32_52_data::R](R) reader structure"]
+impl crate::Readable for SYND_CHECK_32_52_DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYND_CHECK_32_52_DATA to value 0"]
+impl crate::Resettable for SYND_CHECK_32_52_DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/synd_check_32_52_synd.rs
+++ b/src/utility/synd_check_32_52_synd.rs
@ -0,0 +1,93 @@
+#[doc = "Register `SYND_CHECK_32_52_SYND` reader"]
+pub struct R(crate::R<SYND_CHECK_32_52_SYND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYND_CHECK_32_52_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYND_CHECK_32_52_SYND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYND_CHECK_32_52_SYND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `MBE` reader - Multiple bit error detect status"]
+pub struct MBE_R(crate::FieldReader<u8, u8>);
+impl MBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        MBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MBE_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SBE` reader - Single bit error detect status"]
+pub struct SBE_R(crate::FieldReader<u8, u8>);
+impl SBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        SBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SBE_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYND_CHECK_32_52_SYND` reader - Corrected syndrome value"]
+pub struct SYND_CHECK_32_52_SYND_R(crate::FieldReader<u32, u32>);
+impl SYND_CHECK_32_52_SYND_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        SYND_CHECK_32_52_SYND_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYND_CHECK_32_52_SYND_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bits 28:31 - Multiple bit error detect status"]
+    #[inline(always)]
+    pub fn mbe(&self) -> MBE_R {
+        MBE_R::new(((self.bits >> 28) & 0x0f) as u8)
+    }
+    #[doc = "Bits 24:27 - Single bit error detect status"]
+    #[inline(always)]
+    pub fn sbe(&self) -> SBE_R {
+        SBE_R::new(((self.bits >> 24) & 0x0f) as u8)
+    }
+    #[doc = "Bits 0:19 - Corrected syndrome value"]
+    #[inline(always)]
+    pub fn synd_check_32_52_synd(&self) -> SYND_CHECK_32_52_SYND_R {
+        SYND_CHECK_32_52_SYND_R::new((self.bits & 0x000f_ffff) as u32)
+    }
+}
+#[doc = "EDAC Decode Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_check_32_52_synd](index.html) module"]
+pub struct SYND_CHECK_32_52_SYND_SPEC;
+impl crate::RegisterSpec for SYND_CHECK_32_52_SYND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [synd_check_32_52_synd::R](R) reader structure"]
+impl crate::Readable for SYND_CHECK_32_52_SYND_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYND_CHECK_32_52_SYND to value 0"]
+impl crate::Resettable for SYND_CHECK_32_52_SYND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/synd_data.rs
+++ b/src/utility/synd_data.rs
@ -0,0 +1,64 @@
+#[doc = "Register `SYND_DATA` reader"]
+pub struct R(crate::R<SYND_DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYND_DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYND_DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYND_DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SYND_DATA` writer"]
+pub struct W(crate::W<SYND_DATA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SYND_DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SYND_DATA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SYND_DATA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_data](index.html) module"]
+pub struct SYND_DATA_SPEC;
+impl crate::RegisterSpec for SYND_DATA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [synd_data::R](R) reader structure"]
+impl crate::Readable for SYND_DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [synd_data::W](W) writer structure"]
+impl crate::Writable for SYND_DATA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SYND_DATA to value 0"]
+impl crate::Resettable for SYND_DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/synd_enc_32_44.rs
+++ b/src/utility/synd_enc_32_44.rs
@ -0,0 +1,140 @@
+#[doc = "Register `SYND_ENC_32_44` reader"]
+pub struct R(crate::R<SYND_ENC_32_44_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYND_ENC_32_44_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYND_ENC_32_44_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYND_ENC_32_44_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SYND_ENC_32_44` writer"]
+pub struct W(crate::W<SYND_ENC_32_44_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SYND_ENC_32_44_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SYND_ENC_32_44_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SYND_ENC_32_44_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SYND_ENC_31_16` reader - Computed syndrome value for bits 31-16"]
+pub struct SYND_ENC_31_16_R(crate::FieldReader<u8, u8>);
+impl SYND_ENC_31_16_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        SYND_ENC_31_16_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYND_ENC_31_16_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYND_ENC_31_16` writer - Computed syndrome value for bits 31-16"]
+pub struct SYND_ENC_31_16_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SYND_ENC_31_16_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6);
+        self.w
+    }
+}
+#[doc = "Field `SYND_ENC_7_0` reader - Computed syndrome value for bits 15-0"]
+pub struct SYND_ENC_7_0_R(crate::FieldReader<u8, u8>);
+impl SYND_ENC_7_0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        SYND_ENC_7_0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYND_ENC_7_0_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYND_ENC_7_0` writer - Computed syndrome value for bits 15-0"]
+pub struct SYND_ENC_7_0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SYND_ENC_7_0_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 6:11 - Computed syndrome value for bits 31-16"]
+    #[inline(always)]
+    pub fn synd_enc_31_16(&self) -> SYND_ENC_31_16_R {
+        SYND_ENC_31_16_R::new(((self.bits >> 6) & 0x3f) as u8)
+    }
+    #[doc = "Bits 0:5 - Computed syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn synd_enc_7_0(&self) -> SYND_ENC_7_0_R {
+        SYND_ENC_7_0_R::new((self.bits & 0x3f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 6:11 - Computed syndrome value for bits 31-16"]
+    #[inline(always)]
+    pub fn synd_enc_31_16(&mut self) -> SYND_ENC_31_16_W {
+        SYND_ENC_31_16_W { w: self }
+    }
+    #[doc = "Bits 0:5 - Computed syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn synd_enc_7_0(&mut self) -> SYND_ENC_7_0_W {
+        SYND_ENC_7_0_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "EDAC Encode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_enc_32_44](index.html) module"]
+pub struct SYND_ENC_32_44_SPEC;
+impl crate::RegisterSpec for SYND_ENC_32_44_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [synd_enc_32_44::R](R) reader structure"]
+impl crate::Readable for SYND_ENC_32_44_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [synd_enc_32_44::W](W) writer structure"]
+impl crate::Writable for SYND_ENC_32_44_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SYND_ENC_32_44 to value 0"]
+impl crate::Resettable for SYND_ENC_32_44_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/synd_enc_32_52.rs
+++ b/src/utility/synd_enc_32_52.rs
@ -0,0 +1,53 @@
+#[doc = "Register `SYND_ENC_32_52` reader"]
+pub struct R(crate::R<SYND_ENC_32_52_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYND_ENC_32_52_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYND_ENC_32_52_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYND_ENC_32_52_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SYND_ENC_32_52` reader - Computed syndrome value for bits 15-0"]
+pub struct SYND_ENC_32_52_R(crate::FieldReader<u32, u32>);
+impl SYND_ENC_32_52_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        SYND_ENC_32_52_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYND_ENC_32_52_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bits 0:19 - Computed syndrome value for bits 15-0"]
+    #[inline(always)]
+    pub fn synd_enc_32_52(&self) -> SYND_ENC_32_52_R {
+        SYND_ENC_32_52_R::new((self.bits & 0x000f_ffff) as u32)
+    }
+}
+#[doc = "EDAC Encode\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_enc_32_52](index.html) module"]
+pub struct SYND_ENC_32_52_SPEC;
+impl crate::RegisterSpec for SYND_ENC_32_52_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [synd_enc_32_52::R](R) reader structure"]
+impl crate::Readable for SYND_ENC_32_52_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYND_ENC_32_52 to value 0"]
+impl crate::Resettable for SYND_ENC_32_52_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/utility/synd_synd.rs
+++ b/src/utility/synd_synd.rs
@ -0,0 +1,103 @@
+#[doc = "Register `SYND_SYND` reader"]
+pub struct R(crate::R<SYND_SYND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYND_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYND_SYND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYND_SYND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SYND_SYND` writer"]
+pub struct W(crate::W<SYND_SYND_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SYND_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SYND_SYND_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SYND_SYND_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SYND_SYND` reader - Provides bits 11:0 for syndrome, 2x6-bit"]
+pub struct SYND_SYND_R(crate::FieldReader<u16, u16>);
+impl SYND_SYND_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u16) -> Self {
+        SYND_SYND_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYND_SYND_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYND_SYND` writer - Provides bits 11:0 for syndrome, 2x6-bit"]
+pub struct SYND_SYND_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SYND_SYND_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:11 - Provides bits 11:0 for syndrome, 2x6-bit"]
+    #[inline(always)]
+    pub fn synd_synd(&self) -> SYND_SYND_R {
+        SYND_SYND_R::new((self.bits & 0x0fff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:11 - Provides bits 11:0 for syndrome, 2x6-bit"]
+    #[inline(always)]
+    pub fn synd_synd(&mut self) -> SYND_SYND_W {
+        SYND_SYND_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Syndrome Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_synd](index.html) module"]
+pub struct SYND_SYND_SPEC;
+impl crate::RegisterSpec for SYND_SYND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [synd_synd::R](R) reader structure"]
+impl crate::Readable for SYND_SYND_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [synd_synd::W](W) writer structure"]
+impl crate::Writable for SYND_SYND_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SYND_SYND to value 0"]
+impl crate::Resettable for SYND_SYND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}