reenabled clippy in CI/CD

- Bumped version to v0.1.1

.github/bors.toml

@@ -0,0 +1,2 @@
+status = ["ci"]
+delete_merged_branches = true

.github/workflows/changelog.yml

@@ -0,0 +1,20 @@
+on:
+  pull_request_target:
+
+name: Changelog check
+
+jobs:
+  changelog:
+    name: Changelog check
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout sources
+        uses: actions/checkout@v2
+
+      - name: Changelog updated
+        uses: Zomzog/changelog-checker@v1.2.0
+        with:
+          fileName: CHANGELOG.md
+          noChangelogLabel: no changelog
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

.github/workflows/ci.yml

@@ -0,0 +1,64 @@
+on: [push]
+
+name: build
+
+jobs:
+  check:
+    name: Check
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v2
+      - uses: actions-rs/toolchain@v1
+        with:
+          profile: minimal
+          toolchain: stable
+          target: thumbv7em-none-eabihf
+          override: true
+      - uses: actions-rs/cargo@v1
+        with:
+          use-cross: true
+          command: check
+          args: --target thumbv7em-none-eabihf
+
+  fmt:
+    name: Rustfmt
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v2
+      - uses: actions-rs/toolchain@v1
+        with:
+          profile: minimal
+          toolchain: stable
+          override: true
+      - run: rustup component add rustfmt
+      - uses: actions-rs/cargo@v1
+        with:
+          command: fmt
+          args: --all -- --check
+
+  clippy:
+    name: Clippy
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v2
+      - uses: actions-rs/toolchain@v1
+        with:
+          profile: minimal
+          toolchain: stable
+          target: thumbv7em-none-eabihf
+          override: true
+      - run: rustup component add clippy
+      - uses: actions-rs/cargo@v1
+        with:
+          use-cross: true
+          command: clippy
+          args: --target thumbv7em-none-eabihf -- -D warnings
+
+  ci:
+      if: ${{ success() }}
+      # all new jobs must be added to this list
+      needs: [check, fmt, clippy]
+      runs-on: ubuntu-latest
+      steps:
+        - name: CI succeeded
+          run: exit 0

CHANGELOG.md

@@ -0,0 +1,21 @@
+Change Log
+=======
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](http://keepachangelog.com/)
+and this project adheres to [Semantic Versioning](http://semver.org/).
+
+## [unreleased]
+
+## [v0.1.1]
+
+- Clippy issue fixed by regenerating PAC with patched `svd2rust`:
+  https://github.com/rust-embedded/svd2rust/pull/558
+
+## [v0.1.0]
+
+- Clippy currently complains about unsound code which should still work.
+  Related issue: https://github.com/rust-embedded/svd2rust/issues/557
+  Clippy is disabled in CI/CD for now.
+- Initial release

Cargo.toml

@@ -1,19 +1,19 @@
 [package]
 name = "va416xx"
-version = "0.1.0"
-authors = ["Robin Mueller <robin.mueller.m@gmail.com>"]
+version = "0.1.1"
+authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "PAC for the Vorago VA416xx family of MCUs"
 homepage = "https://egit.irs.uni-stuttgart.de/rust/va416xx"
 repository = "https://egit.irs.uni-stuttgart.de/rust/va416xx"
-license = "MIT OR Apache-2.0"
+license = "Apache-2.0"
 keywords = ["no-std", "arm", "cortex-m", "vorago", "va416xx"]
 categories = ["embedded", "no-std", "hardware-support"]
 
 # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
 
 [dependencies]
-cortex-m = "0.7.3"
+cortex-m = "0.7"
 vcell = "0.1.3"
 
 [dependencies.cortex-m-rt]

LICENSE-APACHE

@@ -0,0 +1,201 @@
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+limitations under the License.

NOTICE

@@ -0,0 +1,3 @@
+Rust Peripheral Access Crate (PAC) crate for the Vorago VA416xx family of MCUs
+
+This software contains code developed at the University of Stuttgart.

README.md

@@ -1,3 +1,7 @@
+[![Crates.io](https://img.shields.io/crates/v/va416xx)](https://crates.io/crates/va416xx)
+[![build](https://github.com/us-irs/va416xx-rs/actions/workflows/ci.yml/badge.svg)](https://github.com/us-irs/va416xx-rs/actions/workflows/ci.yml)
+[![docs.rs](https://img.shields.io/docsrs/va416xx)](https://docs.rs/va416xx)
+
 # PAC for the Vorago VA416xx microcontroller family
 
 This repository contains the Peripheral Access Crate (PAC) for
@@ -10,8 +14,8 @@ The crate was generated using [`svd2rust`](https://github.com/rust-embedded/svd2
 To use this crate, add this to your `Cargo.toml`
 
 ```toml
-[dependencies.va108xx]
-version = "0.1"
+[dependencies.va416xx]
+version = "<MostRecentVersion>"
 features = ["rt"]
 ```
 

automation/Dockerfile

@@ -0,0 +1,11 @@
+# Run the following commands from root directory to build and run locally
+# docker build -f automation/Dockerfile -t <NAME> .
+# docker run -it <NAME>
+FROM rust:latest
+RUN apt-get update
+RUN apt-get --yes upgrade
+# tzdata is a dependency, won't install otherwise
+ARG DEBIAN_FRONTEND=noninteractive
+
+RUN rustup target add thumbv7em-none-eabihf && \
+	rustup component add rustfmt clippy

automation/Jenkinsfile

@@ -0,0 +1,39 @@
+pipeline {
+    agent any
+
+    stages {
+        stage('Clippy') {
+            agent {
+                dockerfile {
+                    dir 'automation'
+                    reuseNode true
+                }
+            }
+            steps {
+                sh 'cargo clippy'
+            }
+        }
+        stage('Rustfmt') {
+            agent {
+                dockerfile {
+                    dir 'automation'
+                    reuseNode true
+                }
+            }
+            steps {
+                sh 'cargo fmt'
+            }
+        }
+        stage('Check') {
+            agent {
+                dockerfile {
+                    dir 'automation'
+                    reuseNode true
+                }
+            }
+            steps {
+                sh 'cargo check --target thumbv7em-none-eabihf'
+            }
+        }
+    }
+}

src/adc/fifo_clr.rs

@@ -1,3 +1,18 @@
+#[doc = "Register `FIFO_CLR` reader"]
+pub struct R(crate::R<FIFO_CLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<FIFO_CLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<FIFO_CLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<FIFO_CLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
 #[doc = "Register `FIFO_CLR` writer"]
 pub struct W(crate::W<FIFO_CLR_SPEC>);
 impl core::ops::Deref for W {
@@ -54,11 +69,15 @@ impl W {
         self
     }
 }
-#[doc = "FIFO Clear\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"]
+#[doc = "FIFO Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"]
 pub struct FIFO_CLR_SPEC;
 impl crate::RegisterSpec for FIFO_CLR_SPEC {
     type Ux = u32;
 }
+#[doc = "`read()` method returns [fifo_clr::R](R) reader structure"]
+impl crate::Readable for FIFO_CLR_SPEC {
+    type Reader = R;
+}
 #[doc = "`write(|w| ..)` method takes [fifo_clr::W](W) writer structure"]
 impl crate::Writable for FIFO_CLR_SPEC {
     type Writer = W;

src/can0/ctmr.rs

@@ -13,6 +13,27 @@ impl From<crate::R<CTMR_SPEC>> for R {
         R(reader)
     }
 }
+#[doc = "Register `CTMR` writer"]
+pub struct W(crate::W<CTMR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTMR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTMR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTMR_SPEC>) -> Self {
+        W(writer)
+    }
+}
 #[doc = "Field `CTMR` reader - Time Stamp Counter"]
 pub struct CTMR_R(crate::FieldReader<u16, u16>);
 impl CTMR_R {
@@ -35,7 +56,15 @@ impl R {
         CTMR_R::new((self.bits & 0xffff) as u16)
     }
 }
-#[doc = "CAN Timer Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctmr](index.html) module"]
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "CAN Timer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctmr](index.html) module"]
 pub struct CTMR_SPEC;
 impl crate::RegisterSpec for CTMR_SPEC {
     type Ux = u32;
@@ -44,6 +73,10 @@ impl crate::RegisterSpec for CTMR_SPEC {
 impl crate::Readable for CTMR_SPEC {
     type Reader = R;
 }
+#[doc = "`write(|w| ..)` method takes [ctmr::W](W) writer structure"]
+impl crate::Writable for CTMR_SPEC {
+    type Writer = W;
+}
 #[doc = "`reset()` method sets CTMR to value 0"]
 impl crate::Resettable for CTMR_SPEC {
     #[inline(always)]

src/dac0/fifo_clr.rs

@@ -1,3 +1,18 @@
+#[doc = "Register `FIFO_CLR` reader"]
+pub struct R(crate::R<FIFO_CLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<FIFO_CLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<FIFO_CLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<FIFO_CLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
 #[doc = "Register `FIFO_CLR` writer"]
 pub struct W(crate::W<FIFO_CLR_SPEC>);
 impl core::ops::Deref for W {
@@ -54,11 +69,15 @@ impl W {
         self
     }
 }
-#[doc = "FIFO Clear\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"]
+#[doc = "FIFO Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"]
 pub struct FIFO_CLR_SPEC;
 impl crate::RegisterSpec for FIFO_CLR_SPEC {
     type Ux = u32;
 }
+#[doc = "`read()` method returns [fifo_clr::R](R) reader structure"]
+impl crate::Readable for FIFO_CLR_SPEC {
+    type Reader = R;
+}
 #[doc = "`write(|w| ..)` method takes [fifo_clr::W](W) writer structure"]
 impl crate::Writable for FIFO_CLR_SPEC {
     type Writer = W;

src/dma/alt_ctrl_base_ptr.rs

@@ -57,7 +57,7 @@ impl<'a> ALT_CTRL_BASE_PTR_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Base Pointer for Alternate DMA Control Register"]
     #[inline(always)]
     pub fn alt_ctrl_base_ptr(&self) -> ALT_CTRL_BASE_PTR_R {
-        ALT_CTRL_BASE_PTR_R::new((self.bits & 0xffff_ffff) as u32)
+        ALT_CTRL_BASE_PTR_R::new(self.bits as u32)
     }
 }
 impl W {

src/dma/err_set.rs

@@ -13,6 +13,27 @@ impl From<crate::R<ERR_SET_SPEC>> for R {
         R(reader)
     }
 }
+#[doc = "Register `ERR_SET` writer"]
+pub struct W(crate::W<ERR_SET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ERR_SET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ERR_SET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ERR_SET_SPEC>) -> Self {
+        W(writer)
+    }
+}
 #[doc = "Field `ERR_SET` reader - Set Error"]
 pub struct ERR_SET_R(crate::FieldReader<bool, bool>);
 impl ERR_SET_R {
@@ -35,7 +56,15 @@ impl R {
         ERR_SET_R::new((self.bits & 0x01) != 0)
     }
 }
-#[doc = "DMA bus error set\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [err_set](index.html) module"]
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "DMA bus error set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [err_set](index.html) module"]
 pub struct ERR_SET_SPEC;
 impl crate::RegisterSpec for ERR_SET_SPEC {
     type Ux = u32;
@@ -44,6 +73,10 @@ impl crate::RegisterSpec for ERR_SET_SPEC {
 impl crate::Readable for ERR_SET_SPEC {
     type Reader = R;
 }
+#[doc = "`write(|w| ..)` method takes [err_set::W](W) writer structure"]
+impl crate::Writable for ERR_SET_SPEC {
+    type Writer = W;
+}
 #[doc = "`reset()` method sets ERR_SET to value 0"]
 impl crate::Resettable for ERR_SET_SPEC {
     #[inline(always)]

src/dma/stall_status.rs

@@ -13,6 +13,27 @@ impl From<crate::R<STALL_STATUS_SPEC>> for R {
         R(reader)
     }
 }
+#[doc = "Register `STALL_STATUS` writer"]
+pub struct W(crate::W<STALL_STATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<STALL_STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<STALL_STATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<STALL_STATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
 #[doc = "Field `STALL_STATUS` reader - DMA is stalled"]
 pub struct STALL_STATUS_R(crate::FieldReader<bool, bool>);
 impl STALL_STATUS_R {
@@ -35,7 +56,15 @@ impl R {
         STALL_STATUS_R::new((self.bits & 0x01) != 0)
     }
 }
-#[doc = "DMA stall status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stall_status](index.html) module"]
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "DMA stall status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stall_status](index.html) module"]
 pub struct STALL_STATUS_SPEC;
 impl crate::RegisterSpec for STALL_STATUS_SPEC {
     type Ux = u32;
@@ -44,6 +73,10 @@ impl crate::RegisterSpec for STALL_STATUS_SPEC {
 impl crate::Readable for STALL_STATUS_SPEC {
     type Reader = R;
 }
+#[doc = "`write(|w| ..)` method takes [stall_status::W](W) writer structure"]
+impl crate::Writable for STALL_STATUS_SPEC {
+    type Writer = W;
+}
 #[doc = "`reset()` method sets STALL_STATUS to value 0"]
 impl crate::Resettable for STALL_STATUS_SPEC {
     #[inline(always)]

src/eth/dma_curr_rx_bufr_addr.rs

@@ -57,7 +57,7 @@ impl<'a> CURTBUFAPTR_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."]
     #[inline(always)]
     pub fn curtbufaptr(&self) -> CURTBUFAPTR_R {
-        CURTBUFAPTR_R::new((self.bits & 0xffff_ffff) as u32)
+        CURTBUFAPTR_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/dma_curr_rx_desc.rs

@@ -57,7 +57,7 @@ impl<'a> CURRDESAPTR_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."]
     #[inline(always)]
     pub fn currdesaptr(&self) -> CURRDESAPTR_R {
-        CURRDESAPTR_R::new((self.bits & 0xffff_ffff) as u32)
+        CURRDESAPTR_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/dma_curr_tx_bufr_addr.rs

@@ -57,7 +57,7 @@ impl<'a> CURTBUFAPTR_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."]
     #[inline(always)]
     pub fn curtbufaptr(&self) -> CURTBUFAPTR_R {
-        CURTBUFAPTR_R::new((self.bits & 0xffff_ffff) as u32)
+        CURTBUFAPTR_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/dma_curr_tx_desc.rs

@@ -57,7 +57,7 @@ impl<'a> CURTDESAPTR_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."]
     #[inline(always)]
     pub fn curtdesaptr(&self) -> CURTDESAPTR_R {
-        CURTDESAPTR_R::new((self.bits & 0xffff_ffff) as u32)
+        CURTDESAPTR_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/dma_rx_desc_list_addr.rs

@@ -57,7 +57,7 @@ impl<'a> RDESLA_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Start of Receive List"]
     #[inline(always)]
     pub fn rdesla(&self) -> RDESLA_R {
-        RDESLA_R::new((self.bits & 0xffff_ffff) as u32)
+        RDESLA_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/dma_rx_poll_demand.rs

@@ -57,7 +57,7 @@ impl<'a> RPD_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Receive Poll Demand (Read Only and Write Trigger)"]
     #[inline(always)]
     pub fn rpd(&self) -> RPD_R {
-        RPD_R::new((self.bits & 0xffff_ffff) as u32)
+        RPD_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/dma_tx_desc_list_addr.rs

@@ -57,7 +57,7 @@ impl<'a> TDESLA_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Start of Transmit List"]
     #[inline(always)]
     pub fn tdesla(&self) -> TDESLA_R {
-        TDESLA_R::new((self.bits & 0xffff_ffff) as u32)
+        TDESLA_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/dma_tx_poll_demand.rs

@@ -57,7 +57,7 @@ impl<'a> TPD_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Transmit Poll Demand (Read Only and Write Trigger)"]
     #[inline(always)]
     pub fn tpd(&self) -> TPD_R {
-        TPD_R::new((self.bits & 0xffff_ffff) as u32)
+        TPD_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/mac_addr_l.rs

@@ -53,7 +53,7 @@ impl R {
     #[doc = "Bits 0:31 - MAC Address0\\[31:0\\]"]
     #[inline(always)]
     pub fn addrlo(&self) -> ADDRLO_R {
-        ADDRLO_R::new((self.bits & 0xffff_ffff) as u32)
+        ADDRLO_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/rx1024maxoct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx1024maxoct_gb](index.html) module"]

src/eth/rx128to255oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx128to255oct_gb](index.html) module"]

src/eth/rx256to511oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx256to511oct_gb](index.html) module"]

src/eth/rx512to1023oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx512to1023oct_gb](index.html) module"]

src/eth/rx64octets_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and bad frames received with length 64 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx64octets_gb](index.html) module"]

src/eth/rx65to127oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx65to127oct_gb](index.html) module"]

src/eth/rxalignerror.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received with alignment error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxalignerror](index.html) module"]

src/eth/rxbcastframes_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good broadcast frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxbcastframes_g](index.html) module"]

src/eth/rxcrcerror.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received with CRC error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcrcerror](index.html) module"]

src/eth/rxctrlframes_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of received good control frames\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxctrlframes_g](index.html) module"]

src/eth/rxfifooverflow.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of missed received frames because of FIFO overflow\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifooverflow](index.html) module"]

src/eth/rxframecount_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and bad frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxframecount_gb](index.html) module"]

src/eth/rxjabbererror.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxjabbererror](index.html) module"]

src/eth/rxlengtherror.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received with length error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxlengtherror](index.html) module"]

src/eth/rxmcastframes_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good multicast frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmcastframes_g](index.html) module"]

src/eth/rxoctetcount_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of bytes"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of bytes received in good frames only\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoctetcount_g](index.html) module"]

src/eth/rxoctetcount_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of bytes"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of bytes received in good and bad frames\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoctetcount_gb](index.html) module"]

src/eth/rxoutrangetype.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received with length field not equal to the valid frame size\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoutrangetype](index.html) module"]

src/eth/rxoversize_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received without errors with length greater than the max size\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoversize_g](index.html) module"]

src/eth/rxpauseframes.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and valid Pause frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxpauseframes](index.html) module"]

src/eth/rxrcverror.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received with Receive error or Frame Extension error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxrcverror](index.html) module"]

src/eth/rxrunterror.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received with runt error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxrunterror](index.html) module"]

src/eth/rxucastframes_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of received good unicast frames\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxucastframes_g](index.html) module"]

src/eth/rxundersize_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received with length less than 64 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxundersize_g](index.html) module"]

src/eth/rxvlanframes_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good and bad VLAN frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxvlanframes_gb](index.html) module"]

src/eth/rxwdogerror.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames received with error because of watchdog timeout error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxwdogerror](index.html) module"]

src/eth/systime_seconds.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Timestamp Second"]
     #[inline(always)]
     pub fn tss(&self) -> TSS_R {
-        TSS_R::new((self.bits & 0xffff_ffff) as u32)
+        TSS_R::new(self.bits as u32)
     }
 }
 #[doc = "Holds the lower 32 bits of the second field of the system time\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [systime_seconds](index.html) module"]

src/eth/systime_secsupdat.rs

@@ -57,7 +57,7 @@ impl<'a> TSS_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Timestamp Second"]
     #[inline(always)]
     pub fn tss(&self) -> TSS_R {
-        TSS_R::new((self.bits & 0xffff_ffff) as u32)
+        TSS_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/target_time_secs.rs

@@ -57,7 +57,7 @@ impl<'a> TSTR_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Target Time Seconds Registe"]
     #[inline(always)]
     pub fn tstr(&self) -> TSTR_R {
-        TSTR_R::new((self.bits & 0xffff_ffff) as u32)
+        TSTR_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/timestampaddend.rs

@@ -57,7 +57,7 @@ impl<'a> TSAR_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Timestamp Addend Register"]
     #[inline(always)]
     pub fn tsar(&self) -> TSAR_R {
-        TSAR_R::new((self.bits & 0xffff_ffff) as u32)
+        TSAR_R::new(self.bits as u32)
     }
 }
 impl W {

src/eth/tx1024maxoct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx1024maxoct_gb](index.html) module"]

src/eth/tx128to255oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Good and bad Frames transmitted with length 128 to 255\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx128to255oct_gb](index.html) module"]

src/eth/tx256to511oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Good and bad Frames transmitted with length 256 to 511\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx256to511oct_gb](index.html) module"]

src/eth/tx512to1023oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Good and bad Frames transmitted with length 512 to 1023\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx512to1023oct_gb](index.html) module"]

src/eth/tx64oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Good and bad Frames transmitted with length 64\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx64oct_gb](index.html) module"]

src/eth/tx65to127oct_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Good and bad Frames transmitted with length 65 to 127\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx65to127oct_gb](index.html) module"]

src/eth/txbcastframe_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC number of good and bad broadcast frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txbcastframe_gb](index.html) module"]

src/eth/txbcastframes_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Good Broadcast Frames Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txbcastframes_g](index.html) module"]

src/eth/txcarriererror.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of aborted frames because of carrier sense error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcarriererror](index.html) module"]

src/eth/txdeferred.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of successfully transmitted frames after a deferral\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdeferred](index.html) module"]

src/eth/txexcessdef.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames aborted because of excessive deferral error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txexcessdef](index.html) module"]

src/eth/txexesscol.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of aborted frames because of excessive collision errors\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txexesscol](index.html) module"]

src/eth/txframecount_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txframecount_g](index.html) module"]

src/eth/txframecount_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Frame Count Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txframecount_gb](index.html) module"]

src/eth/txlanframes_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good VLAN frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txlanframes_g](index.html) module"]

src/eth/txlatecol.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of aborted frames because of late collision error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txlatecol](index.html) module"]

src/eth/txmcastframe_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC number of good and bad MULTIcast frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmcastframe_gb](index.html) module"]

src/eth/txmcastframes_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Good Multicast Frames Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmcastframes_g](index.html) module"]

src/eth/txmulticol_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of successfully transmitted frames after multiple collisions\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmulticol_g](index.html) module"]

src/eth/txoctetcount_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of bytes"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of bytes transmitted frames only in good frames\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txoctetcount_g](index.html) module"]

src/eth/txoctetcount_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of bytes"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Transmit Count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txoctetcount_gb](index.html) module"]

src/eth/txoversize_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of frames transmitted without errors\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txoversize_g](index.html) module"]

src/eth/txpauseframes.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of good pause frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txpauseframes](index.html) module"]

src/eth/txsinglecol_g.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC Number of successfully transmitted frames after a single collision\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txsinglecol_g](index.html) module"]

src/eth/txucastframe_gb.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC number of good and bad unicast frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txucastframe_gb](index.html) module"]

src/eth/txundererr.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Number of frames"]
     #[inline(always)]
     pub fn count(&self) -> COUNT_R {
-        COUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        COUNT_R::new(self.bits as u32)
     }
 }
 #[doc = "MMC number of frames aborted because of frame underflow error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txundererr](index.html) module"]

src/irq_router/irq_out0.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - IRQ_OUT\\[31:0\\]"]
     #[inline(always)]
     pub fn irq_out0(&self) -> IRQ_OUT0_R {
-        IRQ_OUT0_R::new((self.bits & 0xffff_ffff) as u32)
+        IRQ_OUT0_R::new(self.bits as u32)
     }
 }
 #[doc = "DEBUG IRQ_OUT\\[31:0\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out0](index.html) module"]

src/irq_router/irq_out1.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - IRQ_OUT\\[63:32\\]"]
     #[inline(always)]
     pub fn irq_out1(&self) -> IRQ_OUT1_R {
-        IRQ_OUT1_R::new((self.bits & 0xffff_ffff) as u32)
+        IRQ_OUT1_R::new(self.bits as u32)
     }
 }
 #[doc = "DEBUG IRQ_OUT\\[63:32\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out1](index.html) module"]

src/irq_router/irq_out2.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - IRQ_OUT\\[95:64\\]"]
     #[inline(always)]
     pub fn irq_out2(&self) -> IRQ_OUT2_R {
-        IRQ_OUT2_R::new((self.bits & 0xffff_ffff) as u32)
+        IRQ_OUT2_R::new(self.bits as u32)
     }
 }
 #[doc = "DEBUG IRQ_OUT\\[95:64\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out2](index.html) module"]

src/irq_router/irq_out3.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - IRQ_OUT\\[127:96\\]"]
     #[inline(always)]
     pub fn irq_out3(&self) -> IRQ_OUT3_R {
-        IRQ_OUT3_R::new((self.bits & 0xffff_ffff) as u32)
+        IRQ_OUT3_R::new(self.bits as u32)
     }
 }
 #[doc = "DEBUG IRQ_OUT\\[127:96\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out3](index.html) module"]

src/irq_router/irq_out4.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - IRQ_OUT\\[159:128\\]"]
     #[inline(always)]
     pub fn irq_out4(&self) -> IRQ_OUT4_R {
-        IRQ_OUT4_R::new((self.bits & 0xffff_ffff) as u32)
+        IRQ_OUT4_R::new(self.bits as u32)
     }
 }
 #[doc = "DEBUG IRQ_OUT\\[159:128\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out4](index.html) module"]

src/lib.rs

@@ -1,5 +1,5 @@
-#![doc = "Peripheral access API for VA416XX microcontrollers (generated using svd2rust v0.19.0 (877196f 2021-11-14))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
-svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
+#![doc = "Peripheral access API for VA416XX microcontrollers (generated using svd2rust v0.20.0 (b9857c5 2021-12-10))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
+svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.20.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
 #![deny(const_err)]
 #![deny(dead_code)]
 #![deny(improper_ctypes)]

src/sysconfig/refresh_config_l.rs

@@ -57,7 +57,7 @@ impl<'a> DIVCOUNT_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Lower 32-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"]
     #[inline(always)]
     pub fn divcount(&self) -> DIVCOUNT_R {
-        DIVCOUNT_R::new((self.bits & 0xffff_ffff) as u32)
+        DIVCOUNT_R::new(self.bits as u32)
     }
 }
 impl W {

src/trng/ehr_data0.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"]
     #[inline(always)]
     pub fn ehr_data(&self) -> EHR_DATA_R {
-        EHR_DATA_R::new((self.bits & 0xffff_ffff) as u32)
+        EHR_DATA_R::new(self.bits as u32)
     }
 }
 #[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data0](index.html) module"]

src/trng/ehr_data1.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"]
     #[inline(always)]
     pub fn ehr_data(&self) -> EHR_DATA_R {
-        EHR_DATA_R::new((self.bits & 0xffff_ffff) as u32)
+        EHR_DATA_R::new(self.bits as u32)
     }
 }
 #[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data1](index.html) module"]

src/trng/ehr_data2.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"]
     #[inline(always)]
     pub fn ehr_data(&self) -> EHR_DATA_R {
-        EHR_DATA_R::new((self.bits & 0xffff_ffff) as u32)
+        EHR_DATA_R::new(self.bits as u32)
     }
 }
 #[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data2](index.html) module"]

src/trng/ehr_data3.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"]
     #[inline(always)]
     pub fn ehr_data(&self) -> EHR_DATA_R {
-        EHR_DATA_R::new((self.bits & 0xffff_ffff) as u32)
+        EHR_DATA_R::new(self.bits as u32)
     }
 }
 #[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data3](index.html) module"]

src/trng/ehr_data4.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"]
     #[inline(always)]
     pub fn ehr_data(&self) -> EHR_DATA_R {
-        EHR_DATA_R::new((self.bits & 0xffff_ffff) as u32)
+        EHR_DATA_R::new(self.bits as u32)
     }
 }
 #[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data4](index.html) module"]

src/trng/ehr_data5.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"]
     #[inline(always)]
     pub fn ehr_data(&self) -> EHR_DATA_R {
-        EHR_DATA_R::new((self.bits & 0xffff_ffff) as u32)
+        EHR_DATA_R::new(self.bits as u32)
     }
 }
 #[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data5](index.html) module"]

src/trng/sample_cnt1.rs

@@ -57,7 +57,7 @@ impl<'a> SAMPLE_CNTR1_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Sets the number of clk cycles between two consecutive ring oscillator samples"]
     #[inline(always)]
     pub fn sample_cntr1(&self) -> SAMPLE_CNTR1_R {
-        SAMPLE_CNTR1_R::new((self.bits & 0xffff_ffff) as u32)
+        SAMPLE_CNTR1_R::new(self.bits as u32)
     }
 }
 impl W {

src/watch_dog/wdogintclr.rs

@@ -57,7 +57,7 @@ impl<'a> CLEAR_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Write any value to clear interrupt"]
     #[inline(always)]
     pub fn clear(&self) -> CLEAR_R {
-        CLEAR_R::new((self.bits & 0xffff_ffff) as u32)
+        CLEAR_R::new(self.bits as u32)
     }
 }
 impl W {

src/watch_dog/wdogload.rs

@@ -57,7 +57,7 @@ impl<'a> CNT_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Count to load"]
     #[inline(always)]
     pub fn cnt(&self) -> CNT_R {
-        CNT_R::new((self.bits & 0xffff_ffff) as u32)
+        CNT_R::new(self.bits as u32)
     }
 }
 impl W {

src/watch_dog/wdoglock.rs

@@ -57,7 +57,7 @@ impl<'a> REG_WR_EN_W<'a> {
     #[doc = r"Writes raw bits to the field"]
     #[inline(always)]
     pub unsafe fn bits(self, value: u32) -> &'a mut W {
-        self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff);
+        self.w.bits = value as u32;
         self.w
     }
 }
@@ -65,7 +65,7 @@ impl R {
     #[doc = "Bits 0:31 - Register write enable status"]
     #[inline(always)]
     pub fn reg_wr_en(&self) -> REG_WR_EN_R {
-        REG_WR_EN_R::new((self.bits & 0xffff_ffff) as u32)
+        REG_WR_EN_R::new(self.bits as u32)
     }
 }
 impl W {

src/watch_dog/wdogvalue.rs

@@ -32,7 +32,7 @@ impl R {
     #[doc = "Bits 0:31 - Actual Count"]
     #[inline(always)]
     pub fn cnt(&self) -> CNT_R {
-        CNT_R::new((self.bits & 0xffff_ffff) as u32)
+        CNT_R::new(self.bits as u32)
     }
 }
 #[doc = "Down Counter Value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogvalue](index.html) module"]