smaller tweaks, note on VA108xx target #20
+10
-3
@@ -90,15 +90,22 @@ work yet.
|
||||
After installation, you can run the following command
|
||||
|
||||
```sh
|
||||
probe-rs run --chip VA108xx_RAM --protocol jtag target/thumbv6m-none-eabi/debug/examples/blinky
|
||||
probe-rs run --chip VA108xx_RAM --protocol jtag target/thumbv6m-none-eabi/debug/blinky
|
||||
```
|
||||
|
||||
to flash and run the blinky program on the RAM. There is also a `VA108xx` chip target
|
||||
available for persistent flashing.
|
||||
available for persistent flashing (see note below!).
|
||||
|
||||
Runner configuration is available in the `.cargo/def-config.toml` file to use `probe-rs` for
|
||||
Runner configuration is available in the `.cargo/config.toml.template` file to use `probe-rs` for
|
||||
convenience. `probe-rs` is also able to process and display `defmt` strings directly.
|
||||
|
||||
Special note on the `VA108xx` target: This target allows flashing the NVM, but doing a soft reset
|
||||
with a tool like `probe-rs` can only perform a soft reset where the code already running in RAM
|
||||
is reset. If you want to immediately run the code flashed to the NVM and get `defmt` printouts,
|
||||
use `probe-rs download` to flash to NVM, then flash a binary which issues the system reset
|
||||
(e.g. the `reset` app inside the example folder), and then attach with `probe-rs attach`, passing
|
||||
the image downloaded to NVM to the attach command.
|
||||
|
||||
### Using VS Code
|
||||
|
||||
Assuming a working debug connection to your VA108xx board, you can debug using VS Code with
|
||||
|
||||
@@ -0,0 +1,12 @@
|
||||
//! Dummy app which does not do anything.
|
||||
#![no_main]
|
||||
#![no_std]
|
||||
|
||||
use cortex_m_rt::entry;
|
||||
use panic_halt as _;
|
||||
use va108xx_hal as _;
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
cortex_m::peripheral::SCB::sys_reset();
|
||||
}
|
||||
@@ -12,9 +12,4 @@
|
||||
//!
|
||||
//! The [crate::pins] module exposes singletons to access the [Pin]s required by this module
|
||||
//! in a type-safe way.
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [Blinky example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/simple/examples/blinky.rs)
|
||||
//! - [Async GPIO example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/embassy/src/bin/async-gpio.rs)
|
||||
pub use vorago_shared_hal::gpio::*;
|
||||
|
||||
@@ -1,6 +1,2 @@
|
||||
//! API for the I2C peripheral
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [REB1 I2C temperature sensor example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/vorago-reb1/examples/adt75-temp-sensor.rs)
|
||||
pub use vorago_shared_hal::i2c::*;
|
||||
|
||||
@@ -7,6 +7,9 @@
|
||||
//! raw PAC. This crate also implements traits specified by the
|
||||
//! [embedded-hal](https://github.com/rust-embedded/embedded-hal) project, making it compatible with
|
||||
//! various drivers in the embedded rust ecosystem.
|
||||
//!
|
||||
//! The [examples folder](https://github.com/us-irs/vorago-rs/tree/main/va108xx/examples) contains
|
||||
//! various example applications using the HAL.
|
||||
#![no_std]
|
||||
#![cfg_attr(docsrs, feature(doc_cfg))]
|
||||
|
||||
|
||||
@@ -1,8 +1,2 @@
|
||||
//! API for Pulse-Width Modulation (PWM)
|
||||
//!
|
||||
//! The Vorago VA108xx devices use the TIM peripherals to perform PWM related tasks
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [PWM example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/simple/examples/pwm.rs)
|
||||
pub use vorago_shared_hal::pwm::*;
|
||||
|
||||
@@ -3,10 +3,4 @@
|
||||
//! The main abstraction provided by this module is the [Spi] an structure.
|
||||
//! It provides the [SpiBus trait](https://docs.rs/embedded-hal/latest/embedded_hal/spi/trait.SpiBus.html),
|
||||
//! but also offer a low level interface via the [SpiLowLevel] trait.
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [Blocking SPI example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/simple/examples/spi.rs)
|
||||
//! - [REB1 ADC example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/vorago-reb1/examples/max11519-adc.rs)
|
||||
//! - [REB1 EEPROM library](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/vorago-reb1/src/m95m01.rs)
|
||||
pub use vorago_shared_hal::spi::*;
|
||||
|
||||
@@ -1,7 +1,2 @@
|
||||
//! API for the TIM peripherals
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [MS and second tick implementation](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/simple/examples/timer-ticks.rs)
|
||||
//! - [Cascade feature example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/simple/examples/cascade.rs)
|
||||
pub use vorago_shared_hal::timer::*;
|
||||
|
||||
@@ -6,12 +6,4 @@
|
||||
//!
|
||||
//! The [rx_async] and [tx_async] modules provide an asynchronous non-blocking API for the UART
|
||||
//! peripheral.
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/simple/examples/uart.rs)
|
||||
//! - [UART with IRQ and RTIC](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/rtic/src/bin/uart-echo-rtic.rs)
|
||||
//! - [Flashloader exposing a CCSDS interface via UART](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/flashloader)
|
||||
//! - [Async UART RX example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/embassy/src/bin/async-uart-rx.rs)
|
||||
//! - [Async UART TX example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va108xx/examples/embassy/src/bin/async-uart-tx.rs)
|
||||
pub use vorago_shared_hal::uart::*;
|
||||
|
||||
+1
-1
@@ -88,7 +88,7 @@ work yet.
|
||||
After installation, you can run the following command
|
||||
|
||||
```sh
|
||||
probe-rs run --chip VA416xx_RAM --protocol jtag target/thumbv7em-none-eabihf/debug/examples/blinky
|
||||
probe-rs run --chip VA416xx_RAM --protocol jtag target/thumbv7em-none-eabihf/debug/blinky
|
||||
```
|
||||
|
||||
to flash and run the blinky program on the RAM. There is also a `VA416xx` chip target
|
||||
|
||||
@@ -22,23 +22,9 @@ va416xx = { version = "0.5", path = "../../va416xx" }
|
||||
|
||||
[dependencies.vorago-peb1]
|
||||
path = "../../vorago-peb1"
|
||||
optional = true
|
||||
|
||||
[features]
|
||||
default = ["va41630"]
|
||||
va41630 = ["va416xx-hal/va41630", "has-adc-dac"]
|
||||
va41629 = ["va416xx-hal/va41629", "has-adc-dac"]
|
||||
va41630 = ["va416xx-hal/va41630"]
|
||||
va41629 = ["va416xx-hal/va41629"]
|
||||
va41628 = ["va416xx-hal/va41628"]
|
||||
has-adc-dac = []
|
||||
|
||||
[[example]]
|
||||
name = "peb1-accelerometer"
|
||||
required-features = ["vorago-peb1"]
|
||||
|
||||
[[example]]
|
||||
name = "dac-adc"
|
||||
required-features = ["has-adc-dac"]
|
||||
|
||||
[[example]]
|
||||
name = "adc"
|
||||
required-features = ["has-adc-dac"]
|
||||
|
||||
+1
-2
@@ -15,7 +15,6 @@ use va416xx_hal::{
|
||||
clock::ClockConfigurator,
|
||||
i2c,
|
||||
pac::{self},
|
||||
prelude::*,
|
||||
timer::CountdownTimer,
|
||||
};
|
||||
use vorago_peb1::lis2dh12::{self, detect_i2c_addr, FullScale, Odr};
|
||||
@@ -29,7 +28,7 @@ const DISPLAY_MODE: DisplayMode = DisplayMode::Normalized;
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let mut dp = pac::Peripherals::take().unwrap();
|
||||
let dp = pac::Peripherals::take().unwrap();
|
||||
defmt::println!("-- Vorago PEB1 accelerometer example --");
|
||||
// Use the external clock connected to XTAL_N.
|
||||
let clocks = ClockConfigurator::new(dp.clkgen)
|
||||
@@ -49,7 +49,7 @@ fn main() -> ! {
|
||||
let mut counter: u32 = 0;
|
||||
loop {
|
||||
counter = counter.wrapping_add(1);
|
||||
if counter % log_divisor == 0 {
|
||||
if counter.is_multiple_of(log_divisor) {
|
||||
defmt::info!("wdt example main loop alive");
|
||||
}
|
||||
if TEST_MODE != TestMode::AllowReset {
|
||||
@@ -1,9 +1,4 @@
|
||||
//! Analog to Digital Converter (ADC) driver.
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [ADC and DAC example](https://github.com/us-irs/vorago-rs/blob/main/va416xx/examples/simple/examples/dac-adc.rs)
|
||||
//! - [ADC](https://github.com/us-irs/vorago-rs/blob/main/va416xx/examples/simple/examples/adc.rs)
|
||||
use core::marker::PhantomData;
|
||||
|
||||
use crate::clock::Clocks;
|
||||
|
||||
@@ -6,10 +6,6 @@
|
||||
//!
|
||||
//! Calling [ClockConfigurator::freeze] returns the frozen clock configuration inside the [Clocks]
|
||||
//! structure. This structure can also be used to configure other structures provided by this HAL.
|
||||
//!
|
||||
//! # Examples
|
||||
//!
|
||||
//! - [UART example on the PEB1 board](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/uart.rs)
|
||||
#[cfg(not(feature = "va41628"))]
|
||||
use crate::adc::ADC_MAX_CLK;
|
||||
use crate::pac;
|
||||
|
||||
@@ -1,8 +1,4 @@
|
||||
//! Digital to Analog Converter (DAC) driver.
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [ADC and DAC example](https://github.com/us-irs/vorago-rs/blob/main/va416xx/examples/simple/examples/dac-adc.rs)
|
||||
use core::ops::Deref;
|
||||
|
||||
use vorago_shared_hal::{
|
||||
|
||||
@@ -1,8 +1,4 @@
|
||||
//! API for the DMA peripheral
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [Simple DMA example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/dma.rs)
|
||||
use arbitrary_int::{u10, u3};
|
||||
use vorago_shared_hal::{enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect};
|
||||
|
||||
|
||||
@@ -12,9 +12,4 @@
|
||||
//!
|
||||
//! The [crate::pins] module exposes singletons to access the [Pin]s required by this module
|
||||
//! in a type-safe way.
|
||||
//!
|
||||
//! # Examples
|
||||
//!
|
||||
//! - [Blinky example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/blinky.rs)
|
||||
//! - [Async GPIO example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/embassy/src/bin/async-gpio.rs)
|
||||
pub use vorago_shared_hal::gpio::*;
|
||||
|
||||
@@ -1,6 +1,2 @@
|
||||
//! API for the I2C peripheral
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [PEB1 accelerometer example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/peb1-accelerometer.rs)
|
||||
pub use vorago_shared_hal::i2c::*;
|
||||
|
||||
@@ -25,6 +25,9 @@
|
||||
//! with interrupts, it is strongly recommended to set up the IRQ router with the
|
||||
//! [crate::irq_router] module at the very least because that peripheral has confusing and/or
|
||||
//! faulty register reset values which might lead to weird bugs and glitches.
|
||||
//!
|
||||
//! The [examples folder](https://github.com/us-irs/vorago-rs/tree/main/va416xx/examples) contains
|
||||
//! various example applications using the HAL.
|
||||
#![no_std]
|
||||
#![cfg_attr(docsrs, feature(doc_cfg))]
|
||||
#[cfg(feature = "alloc")]
|
||||
|
||||
@@ -1,8 +1,4 @@
|
||||
//! API for Pulse-Width Modulation (PWM)
|
||||
//!
|
||||
//! The Vorago devices use the TIM peripherals to perform PWM related tasks
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [PWM example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/pwm.rs)
|
||||
pub use vorago_shared_hal::pwm::*;
|
||||
|
||||
@@ -3,9 +3,4 @@
|
||||
//! The main abstraction provided by this module is the [Spi] an structure.
|
||||
//! It provides the [SpiBus trait](https://docs.rs/embedded-hal/latest/embedded_hal/spi/trait.SpiBus.html),
|
||||
//! but also offer a low level interface via the [SpiLowLevel] trait.
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [Blocking SPI example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/spi.rs)
|
||||
//! - [NVM library][crate::nvm]
|
||||
pub use vorago_shared_hal::spi::*;
|
||||
|
||||
@@ -1,9 +1,4 @@
|
||||
//! API for the TIM peripherals
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [MS and second tick implementation](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/timer-ticks.rs)
|
||||
//! - [Cascade feature example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/cascade.rs)
|
||||
pub use vorago_shared_hal::timer::*;
|
||||
|
||||
pub const TIM_IRQ_OFFSET: usize = 48;
|
||||
|
||||
@@ -6,12 +6,4 @@
|
||||
//!
|
||||
//! The [rx_async] and [tx_async] modules provide an asynchronous non-blocking API for the UART
|
||||
//! peripheral.
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/uart.rs)
|
||||
//! - [UART with IRQ and RTIC](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/rtic/src/bin/uart-echo-rtic.rs)
|
||||
//! - [Flashloader exposing a CCSDS interface via UART](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/flashloader)
|
||||
//! - [Async UART RX example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/embassy/src/bin/async-uart-rx.rs)
|
||||
//! - [Async UART TX example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/embassy/src/bin/async-uart-tx.rs)
|
||||
pub use vorago_shared_hal::uart::*;
|
||||
|
||||
@@ -1,8 +1,4 @@
|
||||
//! # API for the Watchdog peripheral
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! - [Watchdog simple example](https://egit.irs.uni-stuttgart.de/rust/vorago-rs/src/branch/main/va416xx/examples/simple/examples/wdt.rs)
|
||||
use vorago_shared_hal::{enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect};
|
||||
|
||||
use crate::time::Hertz;
|
||||
|
||||
Reference in New Issue
Block a user