update UART clock config, bugfix #23
@@ -0,0 +1,7 @@
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[package]
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name = "uart-clock-calc"
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version = "0.1.0"
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edition = "2024"
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[dependencies]
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arbitrary-int = "2"
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@@ -0,0 +1,50 @@
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use arbitrary_int::{u6, u18};
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#[derive(Debug, Copy, Clone)]
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pub struct ClockConfig {
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pub frac: u6,
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pub int: u18,
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}
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#[derive(Debug, Copy, Clone)]
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pub enum BaudMultiplier {
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_8 = 8,
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_16 = 16,
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}
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pub fn uart_clock_calc(ref_clk: u32, baudrate: u32, baud_mult: BaudMultiplier) -> ClockConfig {
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// This is the calculation: (64.0 * (x - integer_part as f32) + 0.5) as u32 without floating
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// point calculations.
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let multiplier = baud_mult as u32;
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let frac = ((ref_clk % (baudrate * multiplier)) * 64 + (baudrate * (multiplier / 2)))
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/ (baudrate * multiplier);
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// Calculations here are derived from chapter 4.8.5 (p.79) of the datasheet.
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let integer_part = ref_clk / (baudrate * multiplier);
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ClockConfig {
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frac: u6::new(frac as u8),
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int: u18::new(integer_part),
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}
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}
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const SYS_CLK_50_MHZ: u32 = 50_000_000;
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fn main() {
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println!("UART Clock Configuration App");
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let clock_config = uart_clock_calc(SYS_CLK_50_MHZ, 38400, BaudMultiplier::_16);
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println!(
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"For a reference clock of {} Hz and baud rate of {} bps with multiplier {}, the clock configuration is: {:?}",
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SYS_CLK_50_MHZ,
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38400,
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BaudMultiplier::_16 as u32,
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clock_config
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);
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let clock_config = uart_clock_calc(SYS_CLK_50_MHZ, 38400, BaudMultiplier::_8);
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println!(
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"For a reference clock of {} Hz and baud rate of {} bps with multiplier {}, the clock configuration is: {:?}",
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SYS_CLK_50_MHZ,
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38400,
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BaudMultiplier::_8 as u32,
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clock_config
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);
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()
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}
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@@ -65,12 +65,13 @@ async fn main(spawner: Spawner) {
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let tx_uart_a = porta.pa9;
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let rx_uart_a = porta.pa8;
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let clock_config = uart::ClockConfig::calculate(50.MHz(), 115200.Hz(), uart::BaudMode::_16);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let uarta = uart::Uart::new_with_interrupt_uart0(
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dp.uarta,
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tx_uart_a,
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rx_uart_a,
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50.MHz(),
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115200.Hz().into(),
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uart_config,
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InterruptConfig::new(pac::Interrupt::OC2, true, true),
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);
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@@ -81,8 +82,7 @@ async fn main(spawner: Spawner) {
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dp.uartb,
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tx_uart_b,
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rx_uart_b,
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50.MHz(),
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115200.Hz().into(),
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uart_config,
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InterruptConfig::new(pac::Interrupt::OC3, true, true),
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);
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let (mut tx_uart_a, rx_uart_a) = uarta.split();
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@@ -52,12 +52,13 @@ async fn main(_spawner: Spawner) {
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let tx = porta.pa9;
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let rx = porta.pa8;
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let clock_config = uart::ClockConfig::calculate(50.MHz(), 115200.Hz(), uart::BaudMode::_16);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let uarta = uart::Uart::new_with_interrupt_uart0(
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dp.uarta,
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tx,
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rx,
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50.MHz(),
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115200.Hz().into(),
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uart_config,
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InterruptConfig::new(pac::Interrupt::OC2, true, true),
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);
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let (tx, _rx) = uarta.split();
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@@ -53,12 +53,14 @@ mod app {
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let tx = gpioa.pa9;
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let rx = gpioa.pa8;
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let clock_config =
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uart::ClockConfig::calculate(SYSCLK_FREQ, 115200.Hz(), uart::BaudMode::_16);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let irq_uart = uart::Uart::new_with_interrupt_uart0(
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dp.uarta,
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tx,
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rx,
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SYSCLK_FREQ,
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115200.Hz().into(),
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uart_config,
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InterruptConfig::new(pac::Interrupt::OC3, true, true),
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);
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let (tx, rx) = irq_uart.split();
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@@ -28,8 +28,9 @@ fn main() -> ! {
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let gpioa = PinsA::new(dp.porta);
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let tx = gpioa.pa9;
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let rx = gpioa.pa8;
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let uart =
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uart::Uart::new_without_interrupt_uart0(dp.uarta, tx, rx, 50.MHz(), 115200.Hz().into());
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let clock_config = uart::ClockConfig::calculate(50.MHz(), 115200.Hz(), uart::BaudMode::_16);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let uart = uart::Uart::new_without_interrupt_uart0(dp.uarta, tx, rx, uart_config);
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let (mut tx, mut rx) = uart.split();
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writeln!(tx, "Hello World\r").unwrap();
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@@ -116,12 +116,14 @@ mod app {
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let tx = gpioa.pa9;
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let rx = gpioa.pa8;
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let clock_config =
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uart::ClockConfig::calculate(SYSCLK_FREQ, UART_BAUDRATE.Hz(), uart::BaudMode::_16);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let irq_uart = uart::Uart::new_with_interrupt_uart0(
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dp.uarta,
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tx,
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rx,
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SYSCLK_FREQ,
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UART_BAUDRATE.Hz().into(),
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uart_config,
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InterruptConfig::new(pac::Interrupt::OC0, true, true),
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);
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let (tx, rx) = irq_uart.split();
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@@ -61,8 +61,14 @@ async fn main(_spawner: Spawner) {
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let portg = PinsG::new(dp.portg);
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let mut led = Output::new(portg.pg5, PinState::Low);
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let uarta =
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uart::Uart::new_for_uart0(dp.uart0, portg.pg0, portg.pg1, &clocks, 115200.Hz().into());
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let clock_config = uart::ClockConfig::calculate_with_clocks(
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uart::Bank::Uart0,
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&clocks,
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115200.Hz(),
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uart::BaudMode::_16,
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);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let uarta = uart::Uart::new_for_uart0(dp.uart0, portg.pg0, portg.pg1, uart_config);
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let (mut tx_uart_a, rx_uart_a) = uarta.split();
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let (prod_uart_a, cons_uart_a) = QUEUE_UART_A.take().split();
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@@ -59,8 +59,14 @@ async fn main(_spawner: Spawner) {
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let pinsg = PinsG::new(dp.portg);
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let mut led = Output::new(pinsg.pg5, PinState::Low);
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let uarta =
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uart::Uart::new_for_uart0(dp.uart0, pinsg.pg0, pinsg.pg1, &clocks, 115200.Hz().into());
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let clock_config = uart::ClockConfig::calculate_with_clocks(
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uart::Bank::Uart0,
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&clocks,
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115200.Hz(),
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uart::BaudMode::_16,
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);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let uarta = uart::Uart::new_for_uart0(dp.uart0, pinsg.pg0, pinsg.pg1, uart_config);
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let (tx, _rx) = uarta.split();
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let mut async_tx = TxAsync::new(tx);
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let mut ticker = Ticker::every(Duration::from_secs(1));
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@@ -67,13 +67,14 @@ async fn main(spawner: Spawner) {
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let portg = PinsG::new(dp.portg);
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let uart0 = uart::Uart::new_for_uart0(
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dp.uart0,
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portg.pg0,
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portg.pg1,
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let clock_config = uart::ClockConfig::calculate_with_clocks(
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uart::Bank::Uart0,
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&clocks,
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Hertz::from_raw(BAUDRATE).into(),
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Hertz::from_raw(BAUDRATE),
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uart::BaudMode::_16,
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);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let uart0 = uart::Uart::new_for_uart0(dp.uart0, portg.pg0, portg.pg1, uart_config);
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let (mut tx, rx) = uart0.split();
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let mut rx = rx.into_rx_with_irq();
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rx.start();
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@@ -30,13 +30,14 @@ fn main() -> ! {
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let gpiog = PinsG::new(dp.portg);
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let uart0 = uart::Uart::new_for_uart0(
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dp.uart0,
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gpiog.pg0,
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gpiog.pg1,
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let clock_config = uart::ClockConfig::calculate_with_clocks(
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uart::Bank::Uart0,
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&clocks,
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Hertz::from_raw(115200).into(),
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Hertz::from_raw(115200),
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uart::BaudMode::_16,
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);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let uart0 = uart::Uart::new_for_uart0(dp.uart0, gpiog.pg0, gpiog.pg1, uart_config);
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let (mut tx, mut rx) = uart0.split();
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writeln!(tx, "Hello World\n\r").unwrap();
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loop {
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@@ -116,6 +116,7 @@ mod app {
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nvm::Nvm,
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pac,
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pins::PinsG,
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prelude::*,
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uart::{self, Uart},
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};
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@@ -167,13 +168,15 @@ mod app {
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let gpiog = PinsG::new(cx.device.portg);
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let uart0 = Uart::new_for_uart0(
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cx.device.uart0,
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gpiog.pg0,
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gpiog.pg1,
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let clock_config = uart::ClockConfig::calculate_with_clocks(
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uart::Bank::Uart0,
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&clocks,
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Hertz::from_raw(UART_BAUDRATE).into(),
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UART_BAUDRATE.Hz(),
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uart::BaudMode::_16,
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);
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let uart_config = uart::Config::new_with_clock_config(clock_config);
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let uart0 = Uart::new_for_uart0(cx.device.uart0, gpiog.pg0, gpiog.pg1, uart_config);
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let (tx, rx) = uart0.split();
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let verif_reporter = VerificationReportCreator::new(u11::new(0));
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@@ -21,12 +21,15 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Improved type level support for resource management for SPI, PWM, UART.
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- Renamed `tx_asynch` and `rx_asynch` module name to `*_async`
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- Naming improvements in SPI module: replaced `cfg` by `config*`
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- UART configuration now expects an explicit clock configuration structure and does not
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calculate it itself anymore.
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### Fixed
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- Removed HW CS pin provider implementation for PA23, PA22 and PA21, which are multi HW CS pins.
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- Added missing `AnyPin` trait impl for Multi HW CS pins.
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- Expose inner `Input` pin for `InputPinAsync`.
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- Bugfix for UART clock calculation with 8x baud mode.
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## [v0.2.0] 2025-09-03
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@@ -23,7 +23,6 @@ use crate::{
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sealed::Sealed,
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};
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use arbitrary_int::{prelude::*, u6, u18};
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use fugit::RateExtU32;
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use regs::{ClockScale, Control, Data, Enable, FifoClear, InterruptClear, MmioUart};
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use crate::{PeripheralSelect, enable_nvic_interrupt, enable_peripheral_clock, time::Hertz};
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@@ -120,6 +119,25 @@ pub enum Event {
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TxCts,
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}
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#[derive(Debug, Default, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum BaudMode {
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/// Default 16x baud clock.
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#[default]
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_16 = 0,
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/// Slower 8x baud clock.
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_8 = 1,
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}
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impl BaudMode {
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pub const fn multiplier(&self) -> u32 {
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match self {
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BaudMode::_16 => 16,
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BaudMode::_8 => 8,
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}
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}
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}
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Parity {
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@@ -128,22 +146,74 @@ pub enum Parity {
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Even,
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}
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct ClockConfig {
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/// Integer divisor.
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pub div: u18,
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/// Fractional divide value in 1/64 units.
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pub frac: u6,
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pub baud_mode: BaudMode,
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}
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impl ClockConfig {
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pub const fn calculate(ref_clk: Hertz, baudrate: Hertz, baud_mode: BaudMode) -> Self {
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// This is the calculation: (64.0 * (x - integer_part as f32) + 0.5) as u32 without floating
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// point calculations.
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let multiplier = baud_mode.multiplier();
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let frac = ((ref_clk.raw() % (baudrate.raw() * multiplier)) * 64
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+ (baudrate.raw() * (multiplier / 2)))
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/ (baudrate.raw() * multiplier);
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// Calculations here are derived from chapter 4.8.5 (p.79) of the datasheet.
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let integer_div = ref_clk.raw() / (baudrate.raw() * multiplier);
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Self {
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frac: u6::new(frac as u8),
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div: u18::new(integer_div),
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baud_mode,
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}
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}
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#[cfg(feature = "vor4x")]
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pub fn calculate_with_clocks(
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uart_id: Bank,
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clks: &Clocks,
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baudrate: Hertz,
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baud_mode: BaudMode,
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) -> Self {
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let clk = if uart_id == Bank::Uart2 {
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clks.apb1()
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} else {
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clks.apb2()
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};
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Self::calculate(clk, baudrate, baud_mode)
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}
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}
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct Config {
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pub baudrate: Hertz,
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pub clock_config: ClockConfig,
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pub parity: Parity,
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pub stopbits: Stopbits,
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// When false, use standard 16x baud clock, other 8x baud clock
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pub baud8: bool,
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pub wordsize: WordSize,
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pub enable_tx: bool,
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pub enable_rx: bool,
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}
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impl Config {
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pub fn baudrate(mut self, baudrate: Hertz) -> Self {
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self.baudrate = baudrate;
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pub fn new_with_clock_config(clock_config: ClockConfig) -> Self {
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Config {
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clock_config,
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parity: Parity::None,
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stopbits: Stopbits::One,
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wordsize: WordSize::Eight,
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enable_tx: true,
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enable_rx: true,
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}
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}
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pub fn clock_config(mut self, clock_config: ClockConfig) -> Self {
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self.clock_config = clock_config;
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self
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}
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@@ -171,32 +241,6 @@ impl Config {
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self.wordsize = wordsize;
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self
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}
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pub fn baud8(mut self, baud: bool) -> Self {
|
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self.baud8 = baud;
|
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self
|
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}
|
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}
|
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|
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impl Default for Config {
|
||||
fn default() -> Config {
|
||||
let baudrate = 115_200_u32.Hz();
|
||||
Config {
|
||||
baudrate,
|
||||
parity: Parity::None,
|
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stopbits: Stopbits::One,
|
||||
baud8: false,
|
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wordsize: WordSize::Eight,
|
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enable_tx: true,
|
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enable_rx: true,
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}
|
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}
|
||||
}
|
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|
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impl From<Hertz> for Config {
|
||||
fn from(baud: Hertz) -> Self {
|
||||
Config::default().baudrate(baud)
|
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}
|
||||
}
|
||||
|
||||
//==================================================================================================
|
||||
@@ -408,11 +452,10 @@ impl Uart {
|
||||
uart: Uart,
|
||||
tx_pin: Tx,
|
||||
rx_pin: Rx,
|
||||
sys_clk: Hertz,
|
||||
config: Config,
|
||||
irq_cfg: InterruptConfig,
|
||||
) -> Self {
|
||||
Self::new_for_uart0(uart, tx_pin, rx_pin, sys_clk, config, Some(irq_cfg))
|
||||
Self::new_for_uart0(uart, tx_pin, rx_pin, config, Some(irq_cfg))
|
||||
}
|
||||
|
||||
/// Calls [Self::new_for_uart1] with the interrupt configuration to some valid value.
|
||||
@@ -420,11 +463,10 @@ impl Uart {
|
||||
uart: Uart,
|
||||
tx_pin: Tx,
|
||||
rx_pin: Rx,
|
||||
sys_clk: Hertz,
|
||||
config: Config,
|
||||
irq_cfg: InterruptConfig,
|
||||
) -> Self {
|
||||
Self::new_for_uart1(uart, tx_pin, rx_pin, sys_clk, config, Some(irq_cfg))
|
||||
Self::new_for_uart1(uart, tx_pin, rx_pin, config, Some(irq_cfg))
|
||||
}
|
||||
|
||||
/// Calls [Self::new_for_uart0] with the interrupt configuration to [None].
|
||||
@@ -432,10 +474,9 @@ impl Uart {
|
||||
uart: Uart,
|
||||
tx_pin: Tx,
|
||||
rx_pin: Rx,
|
||||
sys_clk: Hertz,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
Self::new_for_uart0(uart, tx_pin, rx_pin, sys_clk, config, None)
|
||||
Self::new_for_uart0(uart, tx_pin, rx_pin, config, None)
|
||||
}
|
||||
|
||||
/// Calls [Self::new_for_uart1] with the interrupt configuration to [None].
|
||||
@@ -443,10 +484,9 @@ impl Uart {
|
||||
uart: Uart,
|
||||
tx_pin: Tx,
|
||||
rx_pin: Rx,
|
||||
sys_clk: Hertz,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
Self::new_for_uart1(uart, tx_pin, rx_pin, sys_clk, config, None)
|
||||
Self::new_for_uart1(uart, tx_pin, rx_pin, config, None)
|
||||
}
|
||||
|
||||
/// Create a new UART peripheral driver with an interrupt configuration.
|
||||
@@ -465,7 +505,6 @@ impl Uart {
|
||||
_uart: Uart,
|
||||
_tx_pin: Tx,
|
||||
_rx_pin: Rx,
|
||||
sys_clk: Hertz,
|
||||
config: Config,
|
||||
opt_irq_cfg: Option<InterruptConfig>,
|
||||
) -> Self {
|
||||
@@ -476,7 +515,6 @@ impl Uart {
|
||||
Tx::FUNC_SEL,
|
||||
Rx::ID,
|
||||
Rx::FUNC_SEL,
|
||||
sys_clk,
|
||||
config,
|
||||
opt_irq_cfg
|
||||
)
|
||||
@@ -498,7 +536,6 @@ impl Uart {
|
||||
_uart: Uart,
|
||||
_tx_pin: Tx,
|
||||
_rx_pin: Rx,
|
||||
sys_clk: Hertz,
|
||||
config: Config,
|
||||
opt_irq_cfg: Option<InterruptConfig>,
|
||||
) -> Self {
|
||||
@@ -509,7 +546,6 @@ impl Uart {
|
||||
Tx::FUNC_SEL,
|
||||
Rx::ID,
|
||||
Rx::FUNC_SEL,
|
||||
sys_clk,
|
||||
config,
|
||||
opt_irq_cfg
|
||||
)
|
||||
@@ -527,14 +563,8 @@ impl Uart {
|
||||
_uart: Uart,
|
||||
_tx_pin: Tx,
|
||||
_rx_pin: Rx,
|
||||
clks: &Clocks,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
let clk = if Uart::ID == Bank::Uart2 {
|
||||
clks.apb1()
|
||||
} else {
|
||||
clks.apb2()
|
||||
};
|
||||
Self::new_internal(
|
||||
Uart::PERIPH_SEL,
|
||||
Uart::ID,
|
||||
@@ -542,7 +572,6 @@ impl Uart {
|
||||
Tx::FUNC_SEL,
|
||||
Rx::ID,
|
||||
Rx::FUNC_SEL,
|
||||
clk,
|
||||
config
|
||||
)
|
||||
}
|
||||
@@ -559,14 +588,8 @@ impl Uart {
|
||||
_uart: Uart,
|
||||
_tx_pin: Tx,
|
||||
_rx_pin: Rx,
|
||||
clks: &Clocks,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
let clk = if Uart::ID == Bank::Uart2 {
|
||||
clks.apb1()
|
||||
} else {
|
||||
clks.apb2()
|
||||
};
|
||||
Self::new_internal(
|
||||
Uart::PERIPH_SEL,
|
||||
Uart::ID,
|
||||
@@ -574,7 +597,6 @@ impl Uart {
|
||||
Tx::FUNC_SEL,
|
||||
Rx::ID,
|
||||
Rx::FUNC_SEL,
|
||||
clk,
|
||||
config
|
||||
)
|
||||
}
|
||||
@@ -591,14 +613,8 @@ impl Uart {
|
||||
_uart: Uart,
|
||||
_tx_pin: Tx,
|
||||
_rx_pin: Rx,
|
||||
clks: &Clocks,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
let clk = if Uart::ID == Bank::Uart2 {
|
||||
clks.apb1()
|
||||
} else {
|
||||
clks.apb2()
|
||||
};
|
||||
Self::new_internal(
|
||||
Uart::PERIPH_SEL,
|
||||
Uart::ID,
|
||||
@@ -606,7 +622,6 @@ impl Uart {
|
||||
Tx::FUNC_SEL,
|
||||
Rx::ID,
|
||||
Rx::FUNC_SEL,
|
||||
clk,
|
||||
config
|
||||
)
|
||||
}
|
||||
@@ -623,7 +638,6 @@ impl Uart {
|
||||
_uart: Uart,
|
||||
_tx_pin: Tx,
|
||||
_rx_pin: Rx,
|
||||
ref_clk: Hertz,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
Self::new_internal(
|
||||
@@ -633,7 +647,6 @@ impl Uart {
|
||||
Tx::FUNC_SEL,
|
||||
Rx::ID,
|
||||
Rx::FUNC_SEL,
|
||||
ref_clk,
|
||||
config
|
||||
)
|
||||
}
|
||||
@@ -650,7 +663,6 @@ impl Uart {
|
||||
_uart: Uart,
|
||||
_tx_pin: Tx,
|
||||
_rx_pin: Rx,
|
||||
ref_clk: Hertz,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
Self::new_internal(
|
||||
@@ -660,7 +672,6 @@ impl Uart {
|
||||
Tx::FUNC_SEL,
|
||||
Rx::ID,
|
||||
Rx::FUNC_SEL,
|
||||
ref_clk,
|
||||
config
|
||||
)
|
||||
}
|
||||
@@ -677,7 +688,6 @@ impl Uart {
|
||||
_uart: Uart,
|
||||
_tx_pin: Tx,
|
||||
_rx_pin: Rx,
|
||||
ref_clk: Hertz,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
Self::new_internal(
|
||||
@@ -687,7 +697,6 @@ impl Uart {
|
||||
Tx::FUNC_SEL,
|
||||
Rx::ID,
|
||||
Rx::FUNC_SEL,
|
||||
ref_clk,
|
||||
config
|
||||
)
|
||||
}
|
||||
@@ -702,7 +711,6 @@ impl Uart {
|
||||
tx_func_sel: FunctionSelect,
|
||||
rx_pin_id: DynPinId,
|
||||
rx_func_sel: FunctionSelect,
|
||||
ref_clk: Hertz,
|
||||
config: Config,
|
||||
#[cfg(feature = "vor1x")] opt_irq_cfg: Option<InterruptConfig>,
|
||||
) -> Self {
|
||||
@@ -711,23 +719,10 @@ impl Uart {
|
||||
enable_peripheral_clock(periph_sel);
|
||||
|
||||
let mut reg_block = regs::Uart::new_mmio(uart_bank);
|
||||
let baud_multiplier = match config.baud8 {
|
||||
false => 16,
|
||||
true => 8,
|
||||
};
|
||||
|
||||
// This is the calculation: (64.0 * (x - integer_part as f32) + 0.5) as u32 without floating
|
||||
// point calculations.
|
||||
let frac = ((ref_clk.raw() % (config.baudrate.raw() * 16)) * 64
|
||||
+ (config.baudrate.raw() * 8))
|
||||
/ (config.baudrate.raw() * 16);
|
||||
// Calculations here are derived from chapter 4.8.5 (p.79) of the datasheet.
|
||||
let x = ref_clk.raw() as f32 / (config.baudrate.raw() * baud_multiplier) as f32;
|
||||
let integer_part = x as u32;
|
||||
reg_block.write_clkscale(
|
||||
ClockScale::builder()
|
||||
.with_int(u18::new(integer_part))
|
||||
.with_frac(u6::new(frac as u8))
|
||||
.with_int(config.clock_config.div)
|
||||
.with_frac(config.clock_config.frac)
|
||||
.build(),
|
||||
);
|
||||
|
||||
@@ -738,7 +733,7 @@ impl Uart {
|
||||
};
|
||||
reg_block.write_ctrl(
|
||||
Control::builder()
|
||||
.with_baud8(config.baud8)
|
||||
.with_baud8(config.clock_config.baud_mode == BaudMode::_8)
|
||||
.with_auto_rts(false)
|
||||
.with_def_rts(false)
|
||||
.with_auto_cts(false)
|
||||
|
||||
Reference in New Issue
Block a user