added missing trait impls for multi HW CS pins #9
@@ -14,7 +14,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Added `RxWithInterrupt::steal`.
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- Improved type level support for resource management for SPI, PWM, UART.
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### Fixed
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- Removed HW CS pin provider implementation for PA23, PA22 and PA21, which are multi HW CS pins.
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- Added missing `AnyPin` trait impl for Multi HW CS pins.
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## [v0.2.0] 2025-09-03
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@@ -104,6 +104,10 @@ mod macros {
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impl crate::sealed::Sealed for $name {}
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impl AnyPin for $name {
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const ID: DynPinId = <$pin_id as PinId>::ID;
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}
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impl HwCsProvider for $name {
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const PIN_ID: DynPinId = <$pin_id as PinId>::ID;
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const SPI_ID: Bank = $spi_id;
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@@ -1,6 +1,7 @@
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use super::{HwCsProvider, PinMiso0, PinMiso1, PinMosi0, PinMosi1, PinSck0, PinSck1};
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use crate::FunctionSelect;
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use crate::gpio::{DynPinId, PinId};
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use crate::pins::AnyPin;
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use crate::pins::{
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Pa10, Pa11, Pa12, Pa13, Pa14, Pa15, Pa16, Pa17, Pa18, Pa19, Pa20, Pa21, Pa22, Pa23, Pa24, Pa25,
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@@ -143,7 +144,6 @@ impl PinMiso1 for Pin<Pb3> {
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const FUN_SEL: FunctionSelect = FunctionSelect::Sel1;
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}
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// TODO: Need to deal with these duplications..
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hw_cs_pins!(
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Bank::Spi1,
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(Pb16, FunctionSelect::Sel1, HwChipSelectId::Id0),
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@@ -2,9 +2,9 @@ use crate::{
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FunctionSelect,
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gpio::{DynPinId, Pin, PinId},
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pins::{
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Pa0, Pa1, Pa2, Pa3, Pa4, Pa5, Pa6, Pa7, Pa8, Pa9, Pb0, Pb1, Pb2, Pb3, Pb4, Pb12, Pb13,
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Pb14, Pb15, Pc0, Pc1, Pc7, Pc8, Pc9, Pc10, Pc11, Pe5, Pe6, Pe7, Pe8, Pe9, Pe12, Pe13, Pe14,
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Pe15, Pf0, Pf1, Pg2, Pg3, Pg4,
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AnyPin, Pa0, Pa1, Pa2, Pa3, Pa4, Pa5, Pa6, Pa7, Pa8, Pa9, Pb0, Pb1, Pb2, Pb3, Pb4, Pb12,
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Pb13, Pb14, Pb15, Pc0, Pc1, Pc7, Pc8, Pc9, Pc10, Pc11, Pe5, Pe6, Pe7, Pe8, Pe9, Pe12, Pe13,
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Pe14, Pe15, Pf0, Pf1, Pg2, Pg3, Pg4,
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},
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};
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