added missing trait impls for multi HW CS pins #9

Merged
muellerr merged 1 commits from missing-multi-hw-cs-trait-impls into main 2025-12-27 14:53:32 +01:00
4 changed files with 12 additions and 4 deletions
+4
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@@ -14,7 +14,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Added `RxWithInterrupt::steal`.
- Improved type level support for resource management for SPI, PWM, UART.
### Fixed
- Removed HW CS pin provider implementation for PA23, PA22 and PA21, which are multi HW CS pins.
- Added missing `AnyPin` trait impl for Multi HW CS pins.
## [v0.2.0] 2025-09-03
+4
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@@ -104,6 +104,10 @@ mod macros {
impl crate::sealed::Sealed for $name {}
impl AnyPin for $name {
const ID: DynPinId = <$pin_id as PinId>::ID;
}
impl HwCsProvider for $name {
const PIN_ID: DynPinId = <$pin_id as PinId>::ID;
const SPI_ID: Bank = $spi_id;
+1 -1
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@@ -1,6 +1,7 @@
use super::{HwCsProvider, PinMiso0, PinMiso1, PinMosi0, PinMosi1, PinSck0, PinSck1};
use crate::FunctionSelect;
use crate::gpio::{DynPinId, PinId};
use crate::pins::AnyPin;
use crate::pins::{
Pa10, Pa11, Pa12, Pa13, Pa14, Pa15, Pa16, Pa17, Pa18, Pa19, Pa20, Pa21, Pa22, Pa23, Pa24, Pa25,
@@ -143,7 +144,6 @@ impl PinMiso1 for Pin<Pb3> {
const FUN_SEL: FunctionSelect = FunctionSelect::Sel1;
}
// TODO: Need to deal with these duplications..
hw_cs_pins!(
Bank::Spi1,
(Pb16, FunctionSelect::Sel1, HwChipSelectId::Id0),
+3 -3
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@@ -2,9 +2,9 @@ use crate::{
FunctionSelect,
gpio::{DynPinId, Pin, PinId},
pins::{
Pa0, Pa1, Pa2, Pa3, Pa4, Pa5, Pa6, Pa7, Pa8, Pa9, Pb0, Pb1, Pb2, Pb3, Pb4, Pb12, Pb13,
Pb14, Pb15, Pc0, Pc1, Pc7, Pc8, Pc9, Pc10, Pc11, Pe5, Pe6, Pe7, Pe8, Pe9, Pe12, Pe13, Pe14,
Pe15, Pf0, Pf1, Pg2, Pg3, Pg4,
AnyPin, Pa0, Pa1, Pa2, Pa3, Pa4, Pa5, Pa6, Pa7, Pa8, Pa9, Pb0, Pb1, Pb2, Pb3, Pb4, Pb12,
Pb13, Pb14, Pb15, Pc0, Pc1, Pc7, Pc8, Pc9, Pc10, Pc11, Pe5, Pe6, Pe7, Pe8, Pe9, Pe12, Pe13,
Pe14, Pe15, Pf0, Pf1, Pg2, Pg3, Pg4,
},
};