rust/vorago-shared-hal
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This commit is contained in:
Robin Mueller
2025-09-02 23:37:57 +02:00
parent 6aac1e41c5
commit b61feb62a7
5 changed files with 10 additions and 10 deletions
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8
src/gpio/ll.rs
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@@ -546,12 +546,12 @@ impl LowLevelGpio {
// Set the correct interrupt number in the IRQSEL register
super::Port::A => {
irqsel
.porta0(self.id().offset())
.porta(self.id().offset())
.write(|w| unsafe { w.bits(id as u32) });
}
super::Port::B => {
irqsel
.portb0(self.id().offset())
.portb(self.id().offset())
.write(|w| unsafe { w.bits(id as u32) });
}
}
@@ -566,12 +566,12 @@ impl LowLevelGpio {
// Set the correct interrupt number in the IRQSEL register
super::Port::A => {
irqsel
.porta0(self.id().offset())
.porta(self.id().offset())
.write(|w| unsafe { w.bits(u32::MAX) });
}
super::Port::B => {
irqsel
.portb0(self.id().offset())
.portb(self.id().offset())
.write(|w| unsafe { w.bits(u32::MAX) });
}
}