clean up a bit

Cargo.lock

@@ -146,6 +146,8 @@ dependencies = [
 name = "zynq7000"
 version = "0.1.0"
 dependencies = [
+ "arbitrary-int",
+ "bitbybit",
  "derive-mmio",
 ]
 

scripts/xsct-init.tcl

@@ -28,11 +28,6 @@ puts "Reset target"
 # Reset the target
 rst
 
-if {![file exists $env(BITSTREAM)]} {
-	error "The bitstream file '$env(BITSTREAM)' does not exist"
-	exit 0
-}
-
 if {![file exists $env(PS_INIT_SCRIPT)]} {
   puts "The ps init tcl script '$env(PS_INIT_SCRIPT)' does not exist"
   exit 0
@@ -63,15 +58,12 @@ source $env(PS_INIT_SCRIPT)
 ps7_init
 ps7_post_config
 
-if {![file exists $env(APP)]} {
-	puts "The app '$env(APP)' does not exist"
-	exit 0
-}
-
 puts "Set arm core 0 target with number: $arm_core_0_num"
 target $arm_core_0_num
 
+if {[info exists env(APP)] && [file exists $env(APP)]} {
   puts "Download app $env(APP) to target"
   dow $env(APP)
+}
 
 puts "Successful"

scripts/zynq7000-ps-pl-init.py

@@ -33,9 +33,7 @@ def main():
         required=True,
         help="Path to the ps7 initialization TCL file to prepare the processing system.",
     )
-    parser.add_argument(
+    parser.add_argument("-a", "--app", dest="app", help="Path to the app to program")
-        "-a", "--app", required=True, dest="app", help="Path to the app to program"
-    )
     parser.add_argument(
         "-i",
         "--ip",
@@ -70,11 +68,12 @@ def main():
         print("Error: 'xsct' could not be found after sourcing settings64.sh.")
         sys.exit(1)
 
-    if not os.path.isfile(args.app):
+    if args.app and not os.path.isfile(args.app):
         print(f"The app '{args.app}' does not exist")
         sys.exit(1)
 
     # Export environment variables
+    if args.app:
         os.environ["APP"] = args.app
     os.environ["IP_ADDRESS_HW_SERVER"] = args.ip
     if args.bit:

zynq-examples/src/main.rs

@@ -20,10 +20,10 @@ pub extern "C" fn boot_core(cpu_id: u32) -> ! {
 #[unsafe(export_name = "main")]
 pub fn main() -> ! {
     let mut gpio = unsafe { zynq7000::Gpio::new_mmio_fixed() };
-    gpio.write_xgpiops_dirm_offset(ZEDBOARD_LED_MASK);
+    gpio.modify_dirm_0(|v| v | ZEDBOARD_LED_MASK);
-    gpio.write_xgpiops_outen_offset(ZEDBOARD_LED_MASK);
+    gpio.modify_out_en_0(|v| v | ZEDBOARD_LED_MASK);
     loop {
-        gpio.modify_xgpiops_data_offset(|v| v ^ ZEDBOARD_LED_MASK);
+        gpio.modify_out_0(|v| v ^ ZEDBOARD_LED_MASK);
         for _ in 0..1_000_000 {
             nop();
         }

zynq7000/Cargo.toml

@@ -12,6 +12,8 @@ categories = ["embedded", "no-std", "hardware-support"]
 
 [dependencies]
 derive-mmio = "0.2"
+bitbybit = "1.3"
+arbitrary-int = "1.3"
 # cortex-r
 # defmt = { version = "0.3", optional = true }
 # critical-section = { version = "1", optional = true }

zynq7000/src/lib.rs

@@ -1,73 +1,84 @@
 //! Rust peripheral acess crate to the AMD Zynq 7000 SoCs
 #![no_std]
 
+#[bitbybit::bitfield(u32)]
+#[derive(Debug)]
+pub struct MaskedOutput {
+    #[bits(16..=31, w)]
+    pub mask: u16,
+    #[bits(0..=15, rw)]
+    pub output: u16,
+}
+
 #[derive(derive_mmio::Mmio)]
 #[repr(C)]
 pub struct Gpio {
     /// Maskable output data (GPIO bank 0, MIO, lower 16 bits)
-    xgpiops_data_lsw_offset: u32,
+    masked_out_0_lsw: MaskedOutput,
     /// Maskable output data (GPIO bank 0, MIO, upper 16 bits)
-    xgpiops_data_msw_offset: u32,
+    masked_out_0_msw: MaskedOutput,
     /// Maskable output data (GPIO bank 1, MIO, lower 16 bits)
-    mask_data_1_lsw: u32,
+    masked_out_1_lsw: MaskedOutput,
     /// Maskable output data (GPIO bank 1, MIO, upper 16 bits)
-    mask_data_1_msw: u32,
+    masked_out_1_msw: MaskedOutput,
     /// Maskable output data (GPIO bank 2, EMIO, lower 16 bits)
-    mask_data_2_lsw: u32,
+    masked_out_2_lsw: MaskedOutput,
     /// Maskable output data (GPIO bank 2, EMIO, upper 16 bits)
-    mask_data_2_msw: u32,
+    masked_out_2_msw: MaskedOutput,
     /// Maskable output data (GPIO bank 3, EMIO, lower 16 bits)
-    mask_data_3_lsw: u32,
+    masked_out_3_lsw: MaskedOutput,
     /// Maskable output data (GPIO bank 3, EMIO, upper 16 bits)
-    mask_data_3_msw: u32,
+    masked_out_3_msw: MaskedOutput,
+
     _reserved_0: [u32; 8],
+
     /// Output data (GPIO bank 0, MIO)
-    xgpiops_data_offset: u32,
+    out_0: u32,
     /// Output data (GPIO bank 1, MIO)
-    data_1: u32,
+    out_1: u32,
     /// Output data (GPIO bank 2, EMIO)
-    data_2: u32,
+    out_2: u32,
     /// Output data (GPIO bank 3, EMIO)
-    data_3: u32,
+    out_3: u32,
 
     _reserved_1: [u32; 4],
 
     /// Input data (GPIO bank 0, MIO)
-    data_0_ro: u32,
+    in_0: u32,
     /// Input data (GPIO bank 1, MIO)
-    data_1_ro: u32,
+    in_1: u32,
     /// Input data (GPIO bank 2, EMIO)
-    data_2_ro: u32,
+    in_2: u32,
     /// Input data (GPIO bank 3, EMIO)
-    data_3_ro: u32,
+    in_3: u32,
 
     _reserved_2: [u32; 101],
 
     /// Direction mode (GPIO bank 0, MIO)
-    xgpiops_dirm_offset: u32,
+    dirm_0: u32,
     /// Output enable (GPIO bank 0, MIO)
-    xgpiops_outen_offset: u32,
+    out_en_0: u32,
     /// Interrupt mask status (GPIO bank 0, MIO)
-    xgpiops_intmask_offset: u32,
+    int_mask_0: u32,
     /// Interrupt enable/unmask (GPIO bank 0, MIO)
-    xgpiops_inten_offset: u32,
+    int_en_0: u32,
     /// Interrupt disable/mask (GPIO bank 0, MIO)
-    xgpiops_intdis_offset: u32,
+    int_dis_0: u32,
     /// Interrupt status (GPIO bank 0, MIO)
-    xgpiops_intsts_offset: u32,
+    int_sts_0: u32,
     /// Interrupt type (GPIO bank 0, MIO)
-    xgpiops_inttype_offset: u32,
+    int_type_0: u32,
     /// Interrupt polarity (GPIO bank 0, MIO)
-    xgpiops_intpol_offset: u32,
+    int_pol_0: u32,
     /// Interrupt any edge sensitivity (GPIO bank 0, MIO)
-    xgpiops_intany_offset: u32,
+    int_any_0: u32,
 
     _reserved_3: [u32; 8],
 
     /// Direction mode (GPIO bank 1, MIO)
     dirm_1: u32,
     /// Output enable (GPIO bank 1, MIO)
-    outen_1: u32,
+    out_en_1: u32,
     /// Interrupt mask status (GPIO bank 1, MIO)
     int_mask_1: u32,
     /// Interrupt enable/unmask (GPIO bank 1, MIO)