Introduce Rust FSBL

This PR introduces some major features while also changing the project structure to be more flexible
for multiple platforms (e.g. host tooling). It also includes a lot of
bugfixes, renamings for consistency purposes and dependency updates.

Added features:

1. Pure Rust FSBL for the Zedboard. This first variant is simplistic. It
   is currently only capable of QSPI boot. It searches for a bitstream
   and ELF file inside the boot binary, flashes them and jumps to them.
2. QSPI flasher for the Zedboard.
3. DDR, QSPI, DEVC, private CPU timer and PLL configuration modules
3. Tooling to auto-generate board specific DDR and DDRIOB config
   parameters from the vendor provided ps7init.tcl file

Changed project structure:

1. All target specific project are inside a dedicated workspace inside
   the `zynq` folder now.
2. All tool intended to be run on a host are inside a `tools` workspace
3. All other common projects are at the project root

Major bugfixes:

1. SPI module: CPOL was not configured properly
2. Logger flush implementation was empty, implemented properly now.

zynq/zynq7000/src/gpio.rs

@@ -0,0 +1,121 @@
+//! # GPIO register module.
+#[bitbybit::bitfield(u32, default = 0x0)]
+#[derive(Debug)]
+pub struct MaskedOutput {
+    #[bits(16..=31, w)]
+    mask: u16,
+    #[bits(0..=15, rw)]
+    output: u16,
+}
+
+#[derive(derive_mmio::Mmio)]
+#[repr(C)]
+pub struct BankControl {
+    /// Direction mode
+    dirm: u32,
+    /// Output enable
+    out_en: u32,
+    /// Interrupt mask status
+    #[mmio(PureRead)]
+    int_mask: u32,
+    /// Interrupt enable/unmask
+    #[mmio(Write)]
+    int_en: u32,
+    /// Interrupt disable/mask
+    #[mmio(Write)]
+    int_dis: u32,
+    /// Interrupt status
+    #[mmio(PureRead, Write)]
+    int_sts: u32,
+    /// Interrupt type
+    int_type: u32,
+    /// Interrupt polarity
+    int_pol: u32,
+    /// Interrupt any edge sensitivity
+    int_any: u32,
+}
+
+#[derive(derive_mmio::Mmio)]
+#[repr(C)]
+pub struct Gpio {
+    /// Maskable output data (GPIO bank 0, MIO, lower 16 bits)
+    masked_out_0_lsw: MaskedOutput,
+    /// Maskable output data (GPIO bank 0, MIO, upper 16 bits)
+    masked_out_0_msw: MaskedOutput,
+    /// Maskable output data (GPIO bank 1, MIO, lower 16 bits)
+    masked_out_1_lsw: MaskedOutput,
+    /// Maskable output data (GPIO bank 1, MIO, upper 16 bits)
+    masked_out_1_msw: MaskedOutput,
+    /// Maskable output data (GPIO bank 2, EMIO, lower 16 bits)
+    masked_out_2_lsw: MaskedOutput,
+    /// Maskable output data (GPIO bank 2, EMIO, upper 16 bits)
+    masked_out_2_msw: MaskedOutput,
+    /// Maskable output data (GPIO bank 3, EMIO, lower 16 bits)
+    masked_out_3_lsw: MaskedOutput,
+    /// Maskable output data (GPIO bank 3, EMIO, upper 16 bits)
+    masked_out_3_msw: MaskedOutput,
+
+    _reserved_0: [u32; 8],
+
+    /// Output data (GPIO bank 0, MIO)
+    out_0: u32,
+    /// Output data (GPIO bank 1, MIO)
+    out_1: u32,
+    /// Output data (GPIO bank 2, EMIO)
+    out_2: u32,
+    /// Output data (GPIO bank 3, EMIO)
+    out_3: u32,
+
+    _reserved_1: [u32; 4],
+
+    /// Input data (GPIO bank 0, MIO)
+    #[mmio(PureRead)]
+    in_0: u32,
+    /// Input data (GPIO bank 1, MIO)
+    #[mmio(PureRead)]
+    in_1: u32,
+    /// Input data (GPIO bank 2, EMIO)
+    #[mmio(PureRead)]
+    in_2: u32,
+    /// Input data (GPIO bank 3, EMIO)
+    #[mmio(PureRead)]
+    in_3: u32,
+
+    _reserved_2: [u32; 101],
+
+    #[mmio(Inner)]
+    bank_0: BankControl,
+
+    _reserved_3: [u32; 7],
+
+    #[mmio(Inner)]
+    bank_1: BankControl,
+
+    _reserved_4: [u32; 7],
+
+    #[mmio(Inner)]
+    bank_2: BankControl,
+
+    _reserved_5: [u32; 7],
+
+    #[mmio(Inner)]
+    bank_3: BankControl,
+}
+
+static_assertions::const_assert_eq!(core::mem::size_of::<Gpio>(), 0x2E8);
+
+impl Gpio {
+    /// Create a new XGPIOPS GPIO MMIO instance.
+    ///
+    /// # Safety
+    ///
+    /// This API can be used to potentially create a driver to the same peripheral structure
+    /// from multiple threads. The user must ensure that concurrent accesses are safe and do not
+    /// interfere with each other.
+    pub const unsafe fn new_mmio_fixed() -> MmioGpio<'static> {
+        MmioGpio {
+            ptr: 0xE000A000 as *mut Gpio,
+            phantom: core::marker::PhantomData,
+        }
+    }
+}