add basic HAL for GIC

zynq7000/src/pac/gtc.rs

@@ -0,0 +1,40 @@
+//! Global timer counter module.
+
+pub const GTC_BASE_ADDR: usize = crate::pac::mpcore::MPCORE_BASE_ADDR + 0x0000_0200;
+
+/// Global timer counter.
+#[derive(derive_mmio::Mmio)]
+#[mmio(no_ctors)]
+#[repr(C)]
+pub struct Gtc {
+    /// Count register 0, lower 32 bits
+    count_lower: u32,
+    /// Count register 1, upper 32 bits
+    count_upper: u32,
+    /// Control register
+    ctrl: u32,
+    /// Interrupt status register
+    isr: u32,
+    /// Comparator 0, lower 32 bits
+    comparator_lower: u32,
+    /// Comparator 1, upper 32 bits
+    comparator_upper: u32,
+    /// Auto-increment register
+    auto_increment: u32,
+}
+
+static_assertions::const_assert_eq!(core::mem::size_of::<Gtc>(), 0x1C);
+
+impl Gtc {
+    /// Create a new GTC MMIO instance.
+    ///
+    /// # Safety
+    ///
+    /// This API can be used to potentially create a driver to the same peripheral structure
+    /// from multiple threads. The user must ensure that concurrent accesses are safe and do not
+    /// interfere with each other.
+    #[inline]
+    pub const unsafe fn new_mmio() -> MmioGtc<'static> {
+        unsafe { Gtc::_new_mmio(GTC_BASE_ADDR as *mut Gtc) }
+    }
+}