rust/zynq7000-rs
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rename register blocks
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This commit is contained in:
Robin Mueller
2025-10-18 23:24:36 +02:00
parent 709f9555ef
commit 789cad5bd5
47 changed files with 259 additions and 256 deletions
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zynq/examples/simple/src/bin/blinky.rs
+2 -2
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@@ -42,10 +42,10 @@ pub extern "C" fn boot_core(cpu_id: u32) -> ! {
#[unsafe(export_name = "main")]
pub fn main() -> ! {
l2_cache::init_with_defaults(&mut unsafe { zynq7000::l2_cache::L2Cache::new_mmio_fixed() });
l2_cache::init_with_defaults(&mut unsafe { zynq7000::l2_cache::Registers::new_mmio_fixed() });
match LIB {
Lib::Pac => {
let mut gpio = unsafe { zynq7000::gpio::Gpio::new_mmio_fixed() };
let mut gpio = unsafe { zynq7000::gpio::Registers::new_mmio_fixed() };
gpio.bank_0().modify_dirm(|v| v | ZEDBOARD_LED_MASK);
gpio.bank_0().modify_out_en(|v| v | ZEDBOARD_LED_MASK);
loop {