fix build ,update examples

examples/zedboard/src/bin/ethernet.rs

@@ -46,10 +46,10 @@ use zynq7000_hal::{
     gpio::{GpioPins, Output, PinState},
     gtc::GlobalTimerCounter,
     l2_cache,
-    uart::{ClockConfigRaw, Uart, UartConfig},
+    uart::{ClockConfig, Config, Uart},
 };
 
-use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
+use zynq7000::{Peripherals, slcr::LevelShifterConfig};
 use zynq7000_rt::{self as _, mmu::section_attrs::SHAREABLE_DEVICE, mmu_l1_table_mut};
 
 const USE_DHCP: bool = true;
@@ -206,7 +206,7 @@ async fn tcp_task(mut tcp: TcpSocket<'static>) -> ! {
 #[embassy_executor::main]
 #[unsafe(export_name = "main")]
 async fn main(spawner: Spawner) -> ! {
-    let mut dp = PsPeripherals::take().unwrap();
+    let mut dp = Peripherals::take().unwrap();
     l2_cache::init_with_defaults(&mut dp.l2c);
 
     // Enable PS-PL level shifters.
@@ -234,12 +234,12 @@ async fn main(spawner: Spawner) -> ! {
     zynq7000_embassy::init(clocks.arm_clocks(), gtc);
 
     // Set up the UART, we are logging with it.
-    let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
+    let uart_clk_config = ClockConfig::new_autocalc_with_error(clocks.io_clocks(), 115200)
         .unwrap()
         .0;
     let mut uart = Uart::new_with_mio(
         dp.uart_1,
-        UartConfig::new_with_clk_config(uart_clk_config),
+        Config::new_with_clk_config(uart_clk_config),
         (gpio_pins.mio.mio48, gpio_pins.mio.mio49),
     )
     .unwrap();

examples/zedboard/src/bin/l3gd20h-i2c-mio.rs

@@ -29,7 +29,7 @@ use zynq7000_hal::{
     uart,
 };
 
-use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
+use zynq7000::{Peripherals, slcr::LevelShifterConfig};
 use zynq7000_rt as _;
 
 // Define the clock frequency as a constant
@@ -48,7 +48,7 @@ pub extern "C" fn boot_core(cpu_id: u32) -> ! {
 #[embassy_executor::main]
 #[unsafe(export_name = "main")]
 async fn main(_spawner: Spawner) -> ! {
-    let mut dp = PsPeripherals::take().unwrap();
+    let mut dp = Peripherals::take().unwrap();
     l2_cache::init_with_defaults(&mut dp.l2c);
 
     // Enable PS-PL level shifters.
@@ -73,12 +73,12 @@ async fn main(_spawner: Spawner) -> ! {
     zynq7000_embassy::init(clocks.arm_clocks(), gtc);
 
     // Set up the UART, we are logging with it.
-    let uart_clk_config = uart::ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
+    let uart_clk_config = uart::ClockConfig::new_autocalc_with_error(clocks.io_clocks(), 115200)
         .unwrap()
         .0;
     let mut uart = uart::Uart::new_with_mio(
         dp.uart_1,
-        uart::UartConfig::new_with_clk_config(uart_clk_config),
+        uart::Config::new_with_clk_config(uart_clk_config),
         (gpio_pins.mio.mio48, gpio_pins.mio.mio49),
     )
     .unwrap();

examples/zedboard/src/bin/l3gd20h-spi-mio.rs

@@ -30,7 +30,7 @@ use zynq7000_hal::{
     uart::{self, TxAsync, on_interrupt_tx},
 };
 
-use zynq7000::{PsPeripherals, slcr::LevelShifterConfig, spi::DelayControl};
+use zynq7000::{Peripherals, slcr::LevelShifterConfig, spi::DelayControl};
 use zynq7000_rt as _;
 
 // Define the clock frequency as a constant
@@ -51,7 +51,7 @@ pub extern "C" fn boot_core(cpu_id: u32) -> ! {
 #[embassy_executor::main]
 #[unsafe(export_name = "main")]
 async fn main(spawner: Spawner) -> ! {
-    let mut dp = PsPeripherals::take().unwrap();
+    let mut dp = Peripherals::take().unwrap();
     l2_cache::init_with_defaults(&mut dp.l2c);
 
     // Enable PS-PL level shifters.
@@ -83,12 +83,12 @@ async fn main(spawner: Spawner) -> ! {
     zynq7000_embassy::init(clocks.arm_clocks(), gtc);
 
     // Set up the UART, we are logging with it.
-    let uart_clk_config = uart::ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
+    let uart_clk_config = uart::ClockConfig::new_autocalc_with_error(clocks.io_clocks(), 115200)
         .unwrap()
         .0;
     let mut uart = uart::Uart::new_with_mio(
         dp.uart_1,
-        uart::UartConfig::new_with_clk_config(uart_clk_config),
+        uart::Config::new_with_clk_config(uart_clk_config),
         (gpio_pins.mio.mio48, gpio_pins.mio.mio49),
     )
     .unwrap();

examples/zedboard/src/bin/qspi.rs

@@ -10,23 +10,8 @@ use embedded_io::Write;
 use log::{error, info};
 use zedboard::PS_CLOCK_FREQUENCY;
 use zedboard_bsp::qspi_spansion;
-use zynq7000_hal::{
-    BootMode,
-    clocks::Clocks,
-    configure_level_shifter,
-    gic::{GicConfigurator, GicInterruptHelper, Interrupt},
-    gpio::{GpioPins, Output, PinState},
-    gtc::GlobalTimerCounter,
-    l2_cache,
-    prelude::*,
-    qspi,
-    uart::{ClockConfigRaw, Uart, UartConfig},
-};
+use zynq7000_hal::{clocks, gic, gpio, gtc, prelude::*, qspi, uart, BootMode};
 
-use zynq7000::{
-    PsPeripherals,
-    slcr::{LevelShifterConfig, clocks::SrcSelIo},
-};
 use zynq7000_rt as _;
 
 const INIT_STRING: &str = "-- Zynq 7000 Zedboard QSPI example --\n\r";
@@ -50,35 +35,28 @@ const ERASE_PROGRAM_READ_TEST: bool = false;
 #[embassy_executor::main]
 #[unsafe(export_name = "main")]
 async fn main(_spawner: Spawner) -> ! {
-    let mut dp = PsPeripherals::take().unwrap();
-    l2_cache::init_with_defaults(&mut dp.l2c);
-
-    // Enable PS-PL level shifters.
-    configure_level_shifter(LevelShifterConfig::EnableAll);
-
+    let periphs = zynq7000_hal::init(zynq7000_hal::Config {
+        init_l2_cache: true,
+        level_shifter_config: Some(zynq7000_hal::LevelShifterConfig::EnableAll),
+        interrupt_config: Some(zynq7000_hal::InteruptConfig::AllInterruptsToCpu0),
+    })
+    .unwrap();
     // Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
-    let clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
-    // Set up the global interrupt controller.
-    let mut gic = GicConfigurator::new_with_init(dp.gicc, dp.gicd);
-    gic.enable_all_interrupts();
-    gic.set_all_spi_interrupt_targets_cpu0();
-    gic.enable();
-    unsafe {
-        gic.enable_interrupts();
-    }
-    let gpio_pins = GpioPins::new(dp.gpio);
+    let clocks = clocks::Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
+
+    let gpio_pins = gpio::GpioPins::new(periphs.gpio);
 
     // Set up global timer counter and embassy time driver.
-    let gtc = GlobalTimerCounter::new(dp.gtc, clocks.arm_clocks());
+    let gtc = gtc::GlobalTimerCounter::new(periphs.gtc, clocks.arm_clocks());
     zynq7000_embassy::init(clocks.arm_clocks(), gtc);
 
     // Set up the UART, we are logging with it.
-    let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
+    let uart_clk_config = uart::ClockConfig::new_autocalc_with_error(clocks.io_clocks(), 115200)
         .unwrap()
         .0;
-    let mut uart = Uart::new_with_mio(
-        dp.uart_1,
-        UartConfig::new_with_clk_config(uart_clk_config),
+    let mut uart = uart::Uart::new_with_mio(
+        periphs.uart_1,
+        uart::Config::new_with_clk_config(uart_clk_config),
         (gpio_pins.mio.mio48, gpio_pins.mio.mio49),
     )
     .unwrap();
@@ -96,10 +74,10 @@ async fn main(_spawner: Spawner) -> ! {
     info!("Boot mode: {:?}", boot_mode);
 
     let qspi_clock_config =
-        qspi::ClockConfig::calculate_with_loopback(SrcSelIo::IoPll, &clocks, 100.MHz())
+        qspi::ClockConfig::calculate_with_loopback(qspi::SrcSelIo::IoPll, &clocks, 100.MHz())
             .expect("QSPI clock calculation failed");
     let qspi = qspi::Qspi::new_single_qspi_with_feedback(
-        dp.qspi,
+        periphs.qspi,
         qspi_clock_config,
         embedded_hal::spi::MODE_0,
         qspi::IoType::LvCmos33,
@@ -176,7 +154,7 @@ async fn main(_spawner: Spawner) -> ! {
 
     let mut ticker = Ticker::every(Duration::from_millis(200));
 
-    let mut mio_led = Output::new_for_mio(gpio_pins.mio.mio7, PinState::Low);
+    let mut mio_led = gpio::Output::new_for_mio(gpio_pins.mio.mio7, gpio::PinState::Low);
     loop {
         mio_led.toggle().unwrap();
 
@@ -184,42 +162,42 @@ async fn main(_spawner: Spawner) -> ! {
     }
 }
 
-#[unsafe(no_mangle)]
-pub extern "C" fn _irq_handler() {
-    let mut gic_helper = GicInterruptHelper::new();
+#[zynq7000_rt::irq]
+fn irq_handler() {
+    let mut gic_helper = gic::GicInterruptHelper::new();
     let irq_info = gic_helper.acknowledge_interrupt();
     match irq_info.interrupt() {
-        Interrupt::Sgi(_) => (),
-        Interrupt::Ppi(ppi_interrupt) => {
-            if ppi_interrupt == zynq7000_hal::gic::PpiInterrupt::GlobalTimer {
+        gic::Interrupt::Sgi(_) => (),
+        gic::Interrupt::Ppi(ppi_interrupt) => {
+            if ppi_interrupt == gic::PpiInterrupt::GlobalTimer {
                 unsafe {
                     zynq7000_embassy::on_interrupt();
                 }
             }
         }
-        Interrupt::Spi(_spi_interrupt) => (),
-        Interrupt::Invalid(_) => (),
-        Interrupt::Spurious => (),
+        gic::Interrupt::Spi(_spi_interrupt) => (),
+        gic::Interrupt::Invalid(_) => (),
+        gic::Interrupt::Spurious => (),
     }
     gic_helper.end_of_interrupt(irq_info);
 }
 
-#[unsafe(no_mangle)]
-pub extern "C" fn _abort_handler() {
+#[zynq7000_rt::exception(DataAbort)]
+fn data_abort_handler(_faulting_addr: usize) -> ! {
     loop {
         nop();
     }
 }
 
-#[unsafe(no_mangle)]
-pub extern "C" fn _undefined_handler() {
+#[zynq7000_rt::exception(Undefined)]
+fn undefined_handler(_faulting_addr: usize) -> ! {
     loop {
         nop();
     }
 }
 
-#[unsafe(no_mangle)]
-pub extern "C" fn _prefetch_handler() {
+#[zynq7000_rt::exception(PrefetchAbort)]
+fn prefetch_handler(_faulting_addr: usize) -> ! {
     loop {
         nop();
     }

examples/zedboard/src/bin/uart-blocking.rs

@@ -20,10 +20,10 @@ use zynq7000_hal::{
     gpio::{GpioPins, Output, PinState},
     gtc::GlobalTimerCounter,
     l2_cache,
-    uart::{ClockConfigRaw, Uart, UartConfig},
+    uart::{ClockConfig, Config, Uart},
 };
 
-use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
+use zynq7000::{Peripherals, slcr::LevelShifterConfig};
 use zynq7000_rt as _;
 
 const INIT_STRING: &str = "-- Zynq 7000 Zedboard blocking UART example --\n\r";
@@ -101,7 +101,7 @@ impl UartMultiplexer {
 #[embassy_executor::main]
 #[unsafe(export_name = "main")]
 async fn main(_spawner: Spawner) -> ! {
-    let mut dp = PsPeripherals::take().unwrap();
+    let mut dp = Peripherals::take().unwrap();
     l2_cache::init_with_defaults(&mut dp.l2c);
 
     // Enable PS-PL level shifters.
@@ -123,12 +123,12 @@ async fn main(_spawner: Spawner) -> ! {
     zynq7000_embassy::init(clocks.arm_clocks(), gtc);
 
     // Set up the UART, we are logging with it.
-    let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
+    let uart_clk_config = ClockConfig::new_autocalc_with_error(clocks.io_clocks(), 115200)
         .unwrap()
         .0;
     let mut log_uart = Uart::new_with_mio(
         dp.uart_1,
-        UartConfig::new_with_clk_config(uart_clk_config),
+        Config::new_with_clk_config(uart_clk_config),
         (gpio_pins.mio.mio48, gpio_pins.mio.mio49),
     )
     .unwrap();
@@ -145,7 +145,7 @@ async fn main(_spawner: Spawner) -> ! {
 
     // UART0 routed through EMIO to PL pins.
     let mut uart_0 =
-        Uart::new_with_emio(dp.uart_0, UartConfig::new_with_clk_config(uart_clk_config)).unwrap();
+        Uart::new_with_emio(dp.uart_0, Config::new_with_clk_config(uart_clk_config)).unwrap();
     // Safety: Valid address of AXI UARTLITE.
     let mut uartlite = unsafe { AxiUartlite::new(AXI_UARTLITE_BASE_ADDR) };
 

examples/zedboard/src/bin/uart-non-blocking.rs

@@ -47,7 +47,7 @@ use zynq7000_hal::{
     gtc::GlobalTimerCounter,
     l2_cache,
     time::Hertz,
-    uart::{ClockConfigRaw, Uart, UartConfig},
+    uart::{ClockConfig, Config, Uart},
 };
 
 pub enum UartMode {
@@ -62,7 +62,7 @@ const INIT_STRING: &str = "-- Zynq 7000 Zedboard non-blocking UART example --\n\
 #[global_allocator]
 static HEAP: Heap = Heap::empty();
 
-use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
+use zynq7000::{Peripherals, slcr::LevelShifterConfig};
 use zynq7000_rt as _;
 
 // Define the clock frequency as a constant
@@ -166,7 +166,7 @@ impl UartMultiplexer {
 #[embassy_executor::main]
 #[unsafe(export_name = "main")]
 async fn main(spawner: Spawner) -> ! {
-    let mut dp = PsPeripherals::take().unwrap();
+    let mut dp = Peripherals::take().unwrap();
     l2_cache::init_with_defaults(&mut dp.l2c);
 
     // Enable PS-PL level shifters.
@@ -194,12 +194,12 @@ async fn main(spawner: Spawner) -> ! {
     zynq7000_embassy::init(clocks.arm_clocks(), gtc);
 
     // Set up the UART, we are logging with it.
-    let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
+    let uart_clk_config = ClockConfig::new_autocalc_with_error(clocks.io_clocks(), 115200)
         .unwrap()
         .0;
     let mut log_uart = Uart::new_with_mio(
         dp.uart_1,
-        UartConfig::new_with_clk_config(uart_clk_config),
+        Config::new_with_clk_config(uart_clk_config),
         (gpio_pins.mio.mio48, gpio_pins.mio.mio49),
     )
     .unwrap();
@@ -237,7 +237,7 @@ async fn main(spawner: Spawner) -> ! {
 
     // UART0 routed through EMIO to PL pins.
     let uart_0 =
-        Uart::new_with_emio(dp.uart_0, UartConfig::new_with_clk_config(uart_clk_config)).unwrap();
+        Uart::new_with_emio(dp.uart_0, Config::new_with_clk_config(uart_clk_config)).unwrap();
     // Safety: Valid address of AXI UARTLITE.
     let mut uartlite = unsafe { AxiUartlite::new(AXI_UARTLITE_BASE_ADDR) };
     // We need to call this before splitting the structure, because the interrupt signal is

examples/zedboard/src/main.rs

@@ -9,18 +9,8 @@ use embedded_hal::digital::StatefulOutputPin;
 use embedded_io::Write;
 use log::{error, info};
 use zedboard::PS_CLOCK_FREQUENCY;
-use zynq7000_hal::{
-    BootMode,
-    clocks::Clocks,
-    configure_level_shifter,
-    gic::{GicConfigurator, GicInterruptHelper, Interrupt},
-    gpio::{GpioPins, Output, PinState},
-    gtc::GlobalTimerCounter,
-    l2_cache,
-    uart::{ClockConfigRaw, Uart, UartConfig},
-};
+use zynq7000_hal::{clocks, gic, gpio, gtc, uart, BootMode};
 
-use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
 use zynq7000_rt as _;
 
 const INIT_STRING: &str = "-- Zynq 7000 Zedboard GPIO blinky example --\n\r";
@@ -37,35 +27,28 @@ pub extern "C" fn boot_core(cpu_id: u32) -> ! {
 #[embassy_executor::main]
 #[unsafe(export_name = "main")]
 async fn main(_spawner: Spawner) -> ! {
-    let mut dp = PsPeripherals::take().unwrap();
-    l2_cache::init_with_defaults(&mut dp.l2c);
-
-    // Enable PS-PL level shifters.
-    configure_level_shifter(LevelShifterConfig::EnableAll);
-
+    let periphs = zynq7000_hal::init(zynq7000_hal::Config {
+        init_l2_cache: true,
+        level_shifter_config: Some(zynq7000_hal::LevelShifterConfig::EnableAll),
+        interrupt_config: Some(zynq7000_hal::InteruptConfig::AllInterruptsToCpu0),
+    })
+    .unwrap();
     // Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
-    let clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
-    // Set up the global interrupt controller.
-    let mut gic = GicConfigurator::new_with_init(dp.gicc, dp.gicd);
-    gic.enable_all_interrupts();
-    gic.set_all_spi_interrupt_targets_cpu0();
-    gic.enable();
-    unsafe {
-        gic.enable_interrupts();
-    }
-    let mut gpio_pins = GpioPins::new(dp.gpio);
+    let clocks = clocks::Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
+
+    let mut gpio_pins = gpio::GpioPins::new(periphs.gpio);
 
     // Set up global timer counter and embassy time driver.
-    let gtc = GlobalTimerCounter::new(dp.gtc, clocks.arm_clocks());
+    let gtc = gtc::GlobalTimerCounter::new(periphs.gtc, clocks.arm_clocks());
     zynq7000_embassy::init(clocks.arm_clocks(), gtc);
 
     // Set up the UART, we are logging with it.
-    let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
+    let uart_clk_config = uart::ClockConfig::new_autocalc_with_error(clocks.io_clocks(), 115200)
         .unwrap()
         .0;
-    let mut uart = Uart::new_with_mio(
-        dp.uart_1,
-        UartConfig::new_with_clk_config(uart_clk_config),
+    let mut uart = uart::Uart::new_with_mio(
+        periphs.uart_1,
+        uart::Config::new_with_clk_config(uart_clk_config),
         (gpio_pins.mio.mio48, gpio_pins.mio.mio49),
     )
     .unwrap();
@@ -84,16 +67,16 @@ async fn main(_spawner: Spawner) -> ! {
 
     let mut ticker = Ticker::every(Duration::from_millis(200));
 
-    let mut mio_led = Output::new_for_mio(gpio_pins.mio.mio7, PinState::Low);
-    let mut emio_leds: [Output; 8] = [
-        Output::new_for_emio(gpio_pins.emio.take(0).unwrap(), PinState::Low),
-        Output::new_for_emio(gpio_pins.emio.take(1).unwrap(), PinState::Low),
-        Output::new_for_emio(gpio_pins.emio.take(2).unwrap(), PinState::Low),
-        Output::new_for_emio(gpio_pins.emio.take(3).unwrap(), PinState::Low),
-        Output::new_for_emio(gpio_pins.emio.take(4).unwrap(), PinState::Low),
-        Output::new_for_emio(gpio_pins.emio.take(5).unwrap(), PinState::Low),
-        Output::new_for_emio(gpio_pins.emio.take(6).unwrap(), PinState::Low),
-        Output::new_for_emio(gpio_pins.emio.take(7).unwrap(), PinState::Low),
+    let mut mio_led = gpio::Output::new_for_mio(gpio_pins.mio.mio7, gpio::PinState::Low);
+    let mut emio_leds: [gpio::Output; 8] = [
+        gpio::Output::new_for_emio(gpio_pins.emio.take(0).unwrap(), gpio::PinState::Low),
+        gpio::Output::new_for_emio(gpio_pins.emio.take(1).unwrap(), gpio::PinState::Low),
+        gpio::Output::new_for_emio(gpio_pins.emio.take(2).unwrap(), gpio::PinState::Low),
+        gpio::Output::new_for_emio(gpio_pins.emio.take(3).unwrap(), gpio::PinState::Low),
+        gpio::Output::new_for_emio(gpio_pins.emio.take(4).unwrap(), gpio::PinState::Low),
+        gpio::Output::new_for_emio(gpio_pins.emio.take(5).unwrap(), gpio::PinState::Low),
+        gpio::Output::new_for_emio(gpio_pins.emio.take(6).unwrap(), gpio::PinState::Low),
+        gpio::Output::new_for_emio(gpio_pins.emio.take(7).unwrap(), gpio::PinState::Low),
     ];
     loop {
         mio_led.toggle().unwrap();
@@ -108,42 +91,42 @@ async fn main(_spawner: Spawner) -> ! {
     }
 }
 
-#[unsafe(no_mangle)]
-pub extern "C" fn _irq_handler() {
-    let mut gic_helper = GicInterruptHelper::new();
+#[zynq7000_rt::irq]
+fn irq_handler() {
+    let mut gic_helper = gic::GicInterruptHelper::new();
     let irq_info = gic_helper.acknowledge_interrupt();
     match irq_info.interrupt() {
-        Interrupt::Sgi(_) => (),
-        Interrupt::Ppi(ppi_interrupt) => {
-            if ppi_interrupt == zynq7000_hal::gic::PpiInterrupt::GlobalTimer {
+        gic::Interrupt::Sgi(_) => (),
+        gic::Interrupt::Ppi(ppi_interrupt) => {
+            if ppi_interrupt == gic::PpiInterrupt::GlobalTimer {
                 unsafe {
                     zynq7000_embassy::on_interrupt();
                 }
             }
         }
-        Interrupt::Spi(_spi_interrupt) => (),
-        Interrupt::Invalid(_) => (),
-        Interrupt::Spurious => (),
+        gic::Interrupt::Spi(_spi_interrupt) => (),
+        gic::Interrupt::Invalid(_) => (),
+        gic::Interrupt::Spurious => (),
     }
     gic_helper.end_of_interrupt(irq_info);
 }
 
-#[unsafe(no_mangle)]
-pub extern "C" fn _abort_handler() {
+#[zynq7000_rt::exception(DataAbort)]
+fn data_abort_handler(_faulting_addr: usize) -> ! {
     loop {
         nop();
     }
 }
 
-#[unsafe(no_mangle)]
-pub extern "C" fn _undefined_handler() {
+#[zynq7000_rt::exception(Undefined)]
+fn undefined_handler(_faulting_addr: usize) -> ! {
     loop {
         nop();
     }
 }
 
-#[unsafe(no_mangle)]
-pub extern "C" fn _prefetch_handler() {
+#[zynq7000_rt::exception(PrefetchAbort)]
+fn prefetch_handler(_faulting_addr: usize) -> ! {
     loop {
         nop();
     }