rust/zynq7000-rs
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after some further deliberation, readability is more important
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This commit is contained in:
Robin Müller
2025-08-01 00:11:57 +02:00
parent e61360810e
commit fea2ea5b61
43 changed files with 419 additions and 419 deletions
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16
examples/zedboard/src/bin/ethernet.rs
View File

@@ -42,17 +42,16 @@ use zynq7000_hal::{
clocks::Clocks,
configure_level_shifter,
eth::{
AlignedBuffer, ClkDivCollection, EthernetConfig, EthernetLowLevel,
embassy_net::InterruptResult,
AlignedBuffer, ClockDivSet, EthernetConfig, EthernetLowLevel, embassy_net::InterruptResult,
},
gic::{GicConfigurator, GicInterruptHelper, Interrupt},
gpio::{GpioPins, Output, PinState},
gtc::GlobalTimerCounter,
l2_cache,
uart::{ClkConfigRaw, Uart, UartConfig},
uart::{ClockConfigRaw, Uart, UartConfig},
};
use zynq7000::{PsPeripherals, slcr::LevelShifterCfg};
use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
use zynq7000_rt::{self as _, mmu::section_attrs::SHAREABLE_DEVICE, mmu_l1_table_mut};
const USE_DHCP: bool = true;
@@ -213,7 +212,7 @@ async fn main(spawner: Spawner) -> ! {
l2_cache::init_with_defaults(&mut dp.l2c);
// Enable PS-PL level shifters.
configure_level_shifter(LevelShifterCfg::EnableAll);
configure_level_shifter(LevelShifterConfig::EnableAll);
// Configure the uncached memory region using the MMU.
mmu_l1_table_mut()
@@ -237,7 +236,7 @@ async fn main(spawner: Spawner) -> ! {
zynq7000_embassy::init(clocks.arm_clocks(), gtc);
// Set up the UART, we are logging with it.
let uart_clk_config = ClkConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
.unwrap()
.0;
let mut uart = Uart::new_with_mio(
@@ -280,15 +279,14 @@ async fn main(spawner: Spawner) -> ! {
info!("Ethernet Module ID: {mod_id:?}");
assert_eq!(mod_id, 0x20118);
let (clk_divs, clk_errors) =
ClkDivCollection::calculate_for_rgmii_and_io_clock(clocks.io_clocks());
let (clk_divs, clk_errors) = ClockDivSet::calculate_for_rgmii_and_io_clock(clocks.io_clocks());
debug!(
"Calculated RGMII clock configuration: {:?}, errors (missmatch from ideal rate in hertz): {:?}",
clk_divs, clk_errors
);
// Unwrap okay, we use a standard clock config, and the clock config should never fail.
let eth_cfg = EthernetConfig::new(
zynq7000_hal::eth::ClkConfig::new(clk_divs.cfg_1000_mbps),
zynq7000_hal::eth::ClockConfig::new(clk_divs.cfg_1000_mbps),
zynq7000_hal::eth::calculate_mdc_clk_div(clocks.arm_clocks()).unwrap(),
MAC_ADDRESS,
);

6
examples/zedboard/src/bin/l3gd20h-i2c-mio.rs
View File

@@ -29,7 +29,7 @@ use zynq7000_hal::{
uart,
};
use zynq7000::{PsPeripherals, slcr::LevelShifterCfg};
use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
use zynq7000_rt as _;
// Define the clock frequency as a constant
@@ -52,7 +52,7 @@ async fn main(_spawner: Spawner) -> ! {
l2_cache::init_with_defaults(&mut dp.l2c);
// Enable PS-PL level shifters.
configure_level_shifter(LevelShifterCfg::EnableAll);
configure_level_shifter(LevelShifterConfig::EnableAll);
// Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
let clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
@@ -73,7 +73,7 @@ async fn main(_spawner: Spawner) -> ! {
zynq7000_embassy::init(clocks.arm_clocks(), gtc);
// Set up the UART, we are logging with it.
let uart_clk_config = uart::ClkConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
let uart_clk_config = uart::ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
.unwrap()
.0;
let mut uart = uart::Uart::new_with_mio(

6
examples/zedboard/src/bin/l3gd20h-spi-mio.rs
View File

@@ -30,7 +30,7 @@ use zynq7000_hal::{
uart::{self, TxAsync, on_interrupt_tx},
};
use zynq7000::{PsPeripherals, slcr::LevelShifterCfg, spi::DelayControl};
use zynq7000::{PsPeripherals, slcr::LevelShifterConfig, spi::DelayControl};
use zynq7000_rt as _;
// Define the clock frequency as a constant
@@ -55,7 +55,7 @@ async fn main(spawner: Spawner) -> ! {
l2_cache::init_with_defaults(&mut dp.l2c);
// Enable PS-PL level shifters.
configure_level_shifter(LevelShifterCfg::EnableAll);
configure_level_shifter(LevelShifterConfig::EnableAll);
// Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
let mut clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
@@ -83,7 +83,7 @@ async fn main(spawner: Spawner) -> ! {
zynq7000_embassy::init(clocks.arm_clocks(), gtc);
// Set up the UART, we are logging with it.
let uart_clk_config = uart::ClkConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
let uart_clk_config = uart::ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
.unwrap()
.0;
let mut uart = uart::Uart::new_with_mio(

8
examples/zedboard/src/bin/uart-blocking.rs
View File

@@ -20,10 +20,10 @@ use zynq7000_hal::{
gpio::{GpioPins, Output, PinState},
gtc::GlobalTimerCounter,
l2_cache,
uart::{ClkConfigRaw, Uart, UartConfig},
uart::{ClockConfigRaw, Uart, UartConfig},
};
use zynq7000::{PsPeripherals, slcr::LevelShifterCfg};
use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
use zynq7000_rt as _;
const INIT_STRING: &str = "-- Zynq 7000 Zedboard blocking UART example --\n\r";
@@ -105,7 +105,7 @@ async fn main(_spawner: Spawner) -> ! {
l2_cache::init_with_defaults(&mut dp.l2c);
// Enable PS-PL level shifters.
configure_level_shifter(LevelShifterCfg::EnableAll);
configure_level_shifter(LevelShifterConfig::EnableAll);
// Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
let clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
// Set up the global interrupt controller.
@@ -123,7 +123,7 @@ async fn main(_spawner: Spawner) -> ! {
zynq7000_embassy::init(clocks.arm_clocks(), gtc);
// Set up the UART, we are logging with it.
let uart_clk_config = ClkConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
.unwrap()
.0;
let mut log_uart = Uart::new_with_mio(

8
examples/zedboard/src/bin/uart-non-blocking.rs
View File

@@ -47,7 +47,7 @@ use zynq7000_hal::{
gtc::GlobalTimerCounter,
l2_cache,
time::Hertz,
uart::{ClkConfigRaw, Uart, UartConfig},
uart::{ClockConfigRaw, Uart, UartConfig},
};
pub enum UartMode {
@@ -62,7 +62,7 @@ const INIT_STRING: &str = "-- Zynq 7000 Zedboard non-blocking UART example --\n\
#[global_allocator]
static HEAP: Heap = Heap::empty();
use zynq7000::{PsPeripherals, slcr::LevelShifterCfg};
use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
use zynq7000_rt as _;
// Define the clock frequency as a constant
@@ -170,7 +170,7 @@ async fn main(spawner: Spawner) -> ! {
l2_cache::init_with_defaults(&mut dp.l2c);
// Enable PS-PL level shifters.
configure_level_shifter(LevelShifterCfg::EnableAll);
configure_level_shifter(LevelShifterConfig::EnableAll);
// Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
let clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
@@ -194,7 +194,7 @@ async fn main(spawner: Spawner) -> ! {
zynq7000_embassy::init(clocks.arm_clocks(), gtc);
// Set up the UART, we are logging with it.
let uart_clk_config = ClkConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
.unwrap()
.0;
let mut log_uart = Uart::new_with_mio(

8
examples/zedboard/src/main.rs
View File

@@ -17,10 +17,10 @@ use zynq7000_hal::{
gpio::{GpioPins, Output, PinState},
gtc::GlobalTimerCounter,
l2_cache,
uart::{ClkConfigRaw, Uart, UartConfig},
uart::{ClockConfigRaw, Uart, UartConfig},
};
use zynq7000::{PsPeripherals, slcr::LevelShifterCfg};
use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
use zynq7000_rt as _;
const INIT_STRING: &str = "-- Zynq 7000 Zedboard GPIO blinky example --\n\r";
@@ -41,7 +41,7 @@ async fn main(_spawner: Spawner) -> ! {
l2_cache::init_with_defaults(&mut dp.l2c);
// Enable PS-PL level shifters.
configure_level_shifter(LevelShifterCfg::EnableAll);
configure_level_shifter(LevelShifterConfig::EnableAll);
// Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
let clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
@@ -60,7 +60,7 @@ async fn main(_spawner: Spawner) -> ! {
zynq7000_embassy::init(clocks.arm_clocks(), gtc);
// Set up the UART, we are logging with it.
let uart_clk_config = ClkConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
let uart_clk_config = ClockConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
.unwrap()
.0;
let mut uart = Uart::new_with_mio(