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d94e97734f
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continue fsbl
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2025-07-31 11:45:53 +02:00 |
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f118f292de
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add DDRC into singleton
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2025-07-30 12:32:11 +02:00 |
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11b5f77bbe
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continue with FSBL
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2025-07-30 12:29:55 +02:00 |
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d1c7aba6f7
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continue DDR regs
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2025-07-30 01:23:06 +02:00 |
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6be08c439b
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wow, DDR init is complex
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2025-07-28 11:08:15 +02:00 |
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54cc78acac
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continue fsbl
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2025-07-28 11:08:15 +02:00 |
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8d62eb7580
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l2 cache init now done in user app
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2025-07-28 10:19:14 +02:00 |
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3b23b6bca8
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Ethernet and smoltcp/embassy-net support
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2025-07-27 17:36:52 +02:00 |
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138cbc5ea7
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small docs improvements
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2025-06-26 20:31:53 +02:00 |
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f842673e3a
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init commit
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2025-04-11 20:39:36 +02:00 |
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