Async SPI working

zynq7000-hal/src/spi/asynch.rs

@@ -441,6 +441,8 @@ impl Future for SpiFuture {
 impl Drop for SpiFuture {
     fn drop(&mut self) {
         if !self.finished_regularly.get() {
+            // It might be sufficient to disable and enable the SPI.. But this definitely
+            // ensures the SPI is fully reset.
             self.spi.reset_and_reconfigure(self.config);
         }
     }