rust/zynq7000-rs
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minor docs improvements #8

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muellerr merged 1 commits from minor-docs-improvements into main 2025-07-28 11:07:59 +02:00
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7
zynq7000-rt/README.md
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@@ -5,8 +5,11 @@ Startup code and minimal runtime for the AMD Zynq7000 SoC to write bare metal Ru
This run-time crate is strongly based on the This run-time crate is strongly based on the
[startup code provided by AMD](https://github.com/Xilinx/embeddedsw/blob/master/lib/bsp/standalone/src/arm/cortexa9/gcc/boot.S). [startup code provided by AMD](https://github.com/Xilinx/embeddedsw/blob/master/lib/bsp/standalone/src/arm/cortexa9/gcc/boot.S).
One major difference is that the MMU table is specified as Rust code. There are also modification Some major differences:
to the stack setup code, because a different linker script is used.
- No L2 cache initialization is performed.
- MMU table is specified as Rust code.
- Modification to the stack setup code, because a different linker script is used.
This crate pulls in the [cortex-a-rt](https://github.com/us-irs/cortex-ar/tree/cortex-a-addition/cortex-a-rt) This crate pulls in the [cortex-a-rt](https://github.com/us-irs/cortex-ar/tree/cortex-a-addition/cortex-a-rt)
crate to provide ARM vectors and the linker script. crate to provide ARM vectors and the linker script.

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zynq7000-rt/src/lib.rs
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@@ -1,7 +1,12 @@
//! Rust bare metal run-time support for the AMD Zynq 7000 SoCs //! # Rust bare metal run-time support for the AMD Zynq 7000 SoCs
//! //!
//! This includes basic low-level startup code similar to the bare-metal boot routines //! This includes basic low-level startup code similar to the bare-metal boot routines
//! [provided by Xilinx](https://github.com/Xilinx/embeddedsw/tree/master/lib/bsp/standalone/src/arm/cortexa9/gcc). //! [provided by Xilinx](https://github.com/Xilinx/embeddedsw/tree/master/lib/bsp/standalone/src/arm/cortexa9/gcc).
//! Some major differences:
//!
//! - No L2 cache initialization is performed.
//! - MMU table is specified as Rust code.
//! - Modification to the stack setup code, because a different linker script is used.
#![no_std] #![no_std]
#[cfg(feature = "rt")] #[cfg(feature = "rt")]
pub use cortex_a_rt::*; pub use cortex_a_rt::*;