52 lines
1.3 KiB
Rust
52 lines
1.3 KiB
Rust
//! The MMU structures live inside a dedicated shared crate so it can be used by both the Zynq
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//! runtime crate and teh HAL crate.
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#![no_std]
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use cortex_ar::{
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asm::{dsb, isb},
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cache::clean_and_invalidate_l1_cache,
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mmu::SectionAttributes,
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register::{BpIAll, TlbIAll},
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};
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pub const NUM_L1_PAGE_TABLE_ENTRIES: usize = 4096;
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#[derive(Debug, PartialEq, Eq, thiserror::Error)]
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#[error("address is not aligned to 1MB boundary")]
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pub struct AddrNotAlignedToOneMb;
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#[repr(C, align(16384))]
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pub struct L1Table(pub [u32; NUM_L1_PAGE_TABLE_ENTRIES]);
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impl L1Table {
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#[inline(always)]
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pub const fn as_ptr(&self) -> *const u32 {
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self.0.as_ptr()
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}
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#[inline(always)]
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pub const fn as_mut_ptr(&mut self) -> *mut u32 {
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self.0.as_mut_ptr()
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}
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pub fn update(
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&mut self,
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addr: u32,
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section_attrs: SectionAttributes,
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) -> Result<(), AddrNotAlignedToOneMb> {
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if addr & 0x000F_FFFF != 0 {
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return Err(AddrNotAlignedToOneMb);
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}
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let index = addr as usize / 0x10_0000;
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self.0[index] = (self.0[index] & 0xFFF0_0000) | section_attrs.as_raw_bits();
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clean_and_invalidate_l1_cache();
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TlbIAll::write();
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BpIAll::write();
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dsb();
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isb();
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Ok(())
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}
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}
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