2022-01-24 16:33:22 +01:00
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#include <fsfw_hal/linux/uio/UioMapper.h>
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2022-11-02 10:26:45 +01:00
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#include <linux/ipcore/PapbVcInterface.h>
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2023-03-23 15:43:14 +01:00
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#include <unistd.h>
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2022-01-26 17:59:31 +01:00
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2023-03-30 13:36:44 +02:00
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#include <cstring>
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2023-03-27 17:42:54 +02:00
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#include <ctime>
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2021-09-19 12:27:48 +02:00
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2023-03-27 21:39:37 +02:00
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#include "fsfw/serviceinterface/ServiceInterface.h"
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2023-06-26 17:08:39 +02:00
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PapbVcInterface::PapbVcInterface(LinuxLibgpioIF* gpioComIF, gpioId_t papbEmptyId,
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2023-10-13 15:10:52 +02:00
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std::string uioFile, int mapNum, size_t maxPacketSize)
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: gpioComIF(gpioComIF),
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papbEmptyId(papbEmptyId),
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packetBuf(maxPacketSize),
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uioFile(std::move(uioFile)),
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mapNum(mapNum) {}
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PapbVcInterface::~PapbVcInterface() {}
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2022-01-24 16:33:22 +01:00
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ReturnValue_t PapbVcInterface::initialize() {
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UioMapper uioMapper(uioFile, mapNum);
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2023-03-30 23:52:37 +02:00
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ReturnValue_t result = uioMapper.getMappedAdress(const_cast<uint32_t**>(&vcBaseReg),
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UioMapper::Permissions::READ_WRITE);
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if (result != returnvalue::OK) {
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return result;
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}
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return returnvalue::OK;
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}
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2023-10-13 09:20:51 +02:00
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ReturnValue_t PapbVcInterface::write(const uint8_t* data, size_t size, size_t& writtenSize) {
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2023-03-30 13:36:44 +02:00
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// There are no packets smaller than 4, this is considered a configuration error.
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if (size < 4) {
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return returnvalue::FAILED;
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}
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2023-10-13 15:24:06 +02:00
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// The user must call advance until completion before starting a new packet transfer.
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if (writeActiveStatus) {
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return IS_BUSY;
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2023-10-13 09:39:50 +02:00
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}
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if (size > packetBuf.capacity()) {
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sif::error << "PapbVcInterface: Packet with size " << size << " larger than maximum configured"
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<< " byte size " << packetBuf.capacity() << std::endl;
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return returnvalue::FAILED;
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}
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std::memcpy(packetBuf.data(), data, size);
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currentPacketSize = size;
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currentPacketIndex = 0;
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if (pollReadyForPacket()) {
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startPacketTransfer(ByteWidthCfg::ONE);
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} else {
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return DirectTmSinkIF::IS_BUSY;
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}
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2023-06-29 00:33:58 +02:00
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if (not pollReadyForOctet(MAX_BUSY_POLLS)) {
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abortPacketTransfer();
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return returnvalue::FAILED;
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}
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2023-10-13 15:10:52 +02:00
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return advanceWrite(writtenSize);
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}
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void PapbVcInterface::startPacketTransfer(ByteWidthCfg initWidth) {
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*vcBaseReg = CONFIG_DATA_INPUT | initWidth;
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}
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bool PapbVcInterface::pollReadyForPacket() const {
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// Check if PAPB interface is ready to receive data. Use the configuration register for this.
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// Bit 5, see PTME ptme_001_01-0-7-r2 Table 31.
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uint32_t reg = *vcBaseReg;
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return (reg >> 6) & 0b1;
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}
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ReturnValue_t PapbVcInterface::advanceWrite(size_t& writtenSize) {
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if (!writeActiveStatus) {
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return NO_WRITE_ACTIVE;
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}
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if (not pollReadyForPacket()) {
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return IS_BUSY;
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}
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for (size_t idx = currentPacketIndex; idx < currentPacketSize; idx++) {
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if (not pollReadyForOctet(MAX_BUSY_POLLS)) {
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if (not pollReadyForPacket()) {
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return PARTIALLY_WRITTEN;
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}
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abortPacketTransfer();
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return returnvalue::FAILED;
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}
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2023-10-13 15:10:52 +02:00
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*(vcBaseReg + DATA_REG_OFFSET) = static_cast<uint32_t>(packetBuf[currentPacketIndex]);
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writtenSize++;
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}
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if (not pollReadyForOctet(MAX_BUSY_POLLS)) {
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abortPacketTransfer();
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return returnvalue::FAILED;
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}
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completePacketTransfer();
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return returnvalue::OK;
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}
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bool PapbVcInterface::writeActive() const { return writeActiveStatus; }
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2023-06-26 17:08:39 +02:00
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bool PapbVcInterface::isVcInterfaceBufferEmpty() {
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ReturnValue_t result = returnvalue::OK;
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2022-05-04 14:08:27 +02:00
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gpio::Levels papbEmptyState = gpio::Levels::HIGH;
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2022-01-24 16:33:22 +01:00
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2022-05-04 14:08:27 +02:00
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result = gpioComIF->readGpio(papbEmptyId, papbEmptyState);
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2022-08-24 17:27:47 +02:00
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if (result != returnvalue::OK) {
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2023-06-26 17:08:39 +02:00
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sif::error << "PapbVcInterface::isVcInterfaceBufferEmpty: Failed to read papb empty signal"
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<< std::endl;
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return true;
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}
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2022-05-04 14:08:27 +02:00
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if (papbEmptyState == gpio::Levels::HIGH) {
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return true;
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}
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return false;
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}
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2023-06-26 17:08:39 +02:00
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bool PapbVcInterface::isBusy() const { return not pollReadyForPacket(); }
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2023-03-23 18:31:47 +01:00
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void PapbVcInterface::cancelTransfer() { abortPacketTransfer(); }
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2023-03-10 18:04:04 +01:00
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2023-06-29 00:33:58 +02:00
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inline bool PapbVcInterface::pollReadyForOctet(uint32_t maxCycles) const {
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uint32_t reg;
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uint32_t idx = 0;
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while (idx < maxCycles) {
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reg = *vcBaseReg;
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// Busy bit.
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if (not((reg >> 5) & 0b1)) {
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return true;
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}
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idx++;
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}
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return false;
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}
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2023-10-13 15:24:06 +02:00
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void PapbVcInterface::abortPacketTransfer() {
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*vcBaseReg = CONFIG_ABORT;
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writeActiveStatus = false;
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currentPacketIndex = 0;
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currentPacketSize = 0;
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}
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void PapbVcInterface::completePacketTransfer() {
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*vcBaseReg = CONFIG_END;
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writeActiveStatus = false;
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currentPacketIndex = 0;
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currentPacketSize = 0;
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}
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