2021-08-17 17:11:59 +02:00
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#ifndef COMMON_CONFIG_DEVCONF_H_
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#define COMMON_CONFIG_DEVCONF_H_
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2021-03-07 14:06:29 +01:00
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2022-05-17 13:40:19 +02:00
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#include <cstdint>
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2022-05-26 11:46:28 +02:00
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#include "fsfw/timemanager/clockDefinitions.h"
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#include "fsfw_hal/linux/spi/spiDefinitions.h"
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#include "fsfw_hal/linux/uart/UartCookie.h"
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2021-03-07 14:06:29 +01:00
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/**
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* SPI configuration will be contained here to let the device handlers remain independent
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* of SPI specific properties.
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*/
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namespace spi {
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2021-09-23 15:20:55 +02:00
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// Default values, changing them is not supported for now
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2021-09-15 18:50:23 +02:00
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static constexpr uint32_t DEFAULT_LIS3_SPEED = 976'000;
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2021-12-17 14:20:22 +01:00
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static constexpr uint32_t LIS3_TRANSITION_DELAY = 5000;
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2021-03-07 14:06:29 +01:00
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static constexpr spi::SpiModes DEFAULT_LIS3_MODE = spi::SpiModes::MODE_3;
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static constexpr uint32_t DEFAULT_RM3100_SPEED = 976'000;
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2021-12-17 14:20:22 +01:00
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static constexpr uint32_t RM3100_TRANSITION_DELAY = 5000;
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2021-03-07 14:06:29 +01:00
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static constexpr spi::SpiModes DEFAULT_RM3100_MODE = spi::SpiModes::MODE_3;
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2021-09-15 18:50:23 +02:00
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static constexpr uint32_t DEFAULT_L3G_SPEED = 976'000;
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2021-12-17 14:20:22 +01:00
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static constexpr uint32_t L3G_TRANSITION_DELAY = 5000;
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2021-03-07 14:06:29 +01:00
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static constexpr spi::SpiModes DEFAULT_L3G_MODE = spi::SpiModes::MODE_3;
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2022-02-22 20:44:23 +01:00
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/**
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* Some MAX1227 could not be reached with frequencies around 4 MHz. Maybe this is caused by
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* the decoder and buffer circuits. Thus frequency is here defined to 1 MHz.
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*/
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static const uint32_t SUS_MAX1227_SPI_FREQ = 976'000;
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2022-03-22 11:57:48 +01:00
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static constexpr spi::SpiModes SUS_MAX_1227_MODE = spi::SpiModes::MODE_3;
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2022-02-22 20:44:23 +01:00
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2022-05-14 17:04:51 +02:00
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static constexpr dur_millis_t RAD_SENSOR_CS_TIMEOUT = 120;
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2022-02-22 20:44:23 +01:00
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static constexpr uint32_t DEFAULT_MAX_1227_SPEED = 976'000;
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2021-05-02 13:48:39 +02:00
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static constexpr spi::SpiModes DEFAULT_MAX_1227_MODE = spi::SpiModes::MODE_3;
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2022-03-04 15:26:36 +01:00
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static constexpr uint32_t PL_PCDU_MAX_1227_SPEED = 976'000;
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2021-05-24 01:20:44 +02:00
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static constexpr uint32_t DEFAULT_ADIS16507_SPEED = 976'000;
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static constexpr spi::SpiModes DEFAULT_ADIS16507_MODE = spi::SpiModes::MODE_3;
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2021-03-07 14:06:29 +01:00
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2021-09-16 17:24:34 +02:00
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static constexpr uint32_t RW_SPEED = 300'000;
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2021-06-21 09:50:26 +02:00
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static constexpr spi::SpiModes RW_MODE = spi::SpiModes::MODE_0;
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2022-05-14 17:04:51 +02:00
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static constexpr dur_millis_t RTD_CS_TIMEOUT = 50;
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2021-09-16 17:24:34 +02:00
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static constexpr uint32_t RTD_SPEED = 2'000'000;
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2021-10-29 19:15:14 +02:00
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static constexpr spi::SpiModes RTD_MODE = spi::SpiModes::MODE_3;
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2021-08-17 19:50:48 +02:00
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2022-05-17 13:40:19 +02:00
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} // namespace spi
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2021-03-07 14:06:29 +01:00
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2021-08-17 17:11:59 +02:00
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namespace uart {
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2021-08-20 14:08:11 +02:00
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static constexpr size_t HYPERION_GPS_REPLY_MAX_BUFFER = 1024;
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2022-04-14 07:52:21 +02:00
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static constexpr UartBaudRate SYRLINKS_BAUD = UartBaudRate::RATE_38400;
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2022-06-21 16:44:14 +02:00
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static constexpr UartBaudRate SCEX_BAUD = UartBaudRate::RATE_57600;
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2022-04-14 07:52:21 +02:00
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static constexpr UartBaudRate GNSS_BAUD = UartBaudRate::RATE_9600;
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static constexpr UartBaudRate PLOC_MPSOC_BAUD = UartBaudRate::RATE_115200;
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static constexpr UartBaudRate PLOC_SUPV_BAUD = UartBaudRate::RATE_115200;
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static constexpr UartBaudRate STAR_TRACKER_BAUD = UartBaudRate::RATE_921600;
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2021-08-17 17:48:51 +02:00
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2022-05-17 13:40:19 +02:00
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} // namespace uart
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2021-08-17 17:11:59 +02:00
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#endif /* COMMON_CONFIG_DEVCONF_H_ */
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